CN216528896U - Gallium oxide-based semiconductor device - Google Patents

Abstract

The utility model discloses a gallium oxide-based semiconductor device, which is characterized in that a silicon substrate is subjected to graphical processing, an isolation strip is processed on the upper surface of the silicon substrate, a plurality of mutually disconnected hexagonal growth platforms are separated from the upper surface of the silicon substrate, a GaN thin film layer is grown on the hexagonal growth platforms, and then an alpha-Ga thin film layer is grown on the GaN thin film layer₂O₃A thin film layer; due to the design of the hexagonal growth platform on the upper surface of the silicon substrate layer, the GaN films grown on the silicon substrate layer are not connected with each other, the stress caused by lattice mismatch and thermal mismatch cannot form resultant force in a large area range, the whole stress is broken into zero, the stress influence can be greatly reduced, and the high-quality GaN film is prepared; in addition, alpha-Ga grows on the GaN thin film layer₂O₃A thin film layer for avoiding the growth of alpha-Ga directly on the silicon substrate₂O₃The upper surface of the film layer and the silicon substrate layer is oxidized to generate silicon oxide, thereby affecting the quality of the film.

Description

Gallium oxide-based semiconductor device

Technical Field

The present invention relates to the field of semiconductor devices and manufacturing techniques, and more particularly to gallium oxide based semiconductor devices.

Background

The power electronic device is also called a power semiconductor device, is mainly used for circuit control of power equipment, is a core device for electric energy control and conversion of equipment such as industrial facilities and household appliances, and can perform typical power processing including frequency conversion, voltage transformation, current transformation, power management and the like. Silicon-based semiconductor power devices are the most commonly used power devices in power systems at present, but the performance of the silicon-based semiconductor power devices is close to the theoretical limit determined by the materials of the silicon-based semiconductor power devices, so that the increase of the power density of the silicon-based semiconductor power devices is in a saturation trend.

Gallium oxide is used as a novel wide bandgap semiconductor material, the bandgap width of the gallium oxide is between 4.7 and 5.3eV, the advantages of the gallium oxide in the aspects of breakdown field strength, Bargea optimum value, cost and the like are outstanding, the crystal forms of five gallium oxides of alpha, beta, gamma, delta and epsilon are discovered at present, and research in the present stage is carried out to surround beta-Ga₂O₃And alpha-Ga₂O₃The research of (2) is more; wherein, beta-Ga₂O₃The band gap is about 4.8 eV; alpha-Ga₂O₃The stability is inferior, and the forbidden band width is about 5.3 eV;

internationally, the belief value is usually used to characterize the degree of material suitability for power devices, for β -Ga₂O₃Material, itThe value of Balix is 3444 times that of the first generation semiconductor material Si, 4 times that of the third generation wide band gap semiconductor material GaN, 10 times that of SiC, beta-Ga₂O₃The power device and the GaN and SiC power devices have lower on-resistance and lower power consumption under the same withstand voltage condition, can greatly reduce the electric energy loss of the devices during working, and have wide and promising application prospect.

However, beta-Ga₂O₃The material has low thermal conductivity and is based on beta-Ga₂O₃In order to solve the problem, the conventional technology mostly peels off the epitaxial layer from the source substrate and transfers the epitaxial layer to the substrate with high thermal conductivity to prepare a device to improve heat dissipation. It should be noted that the source substrate and the epitaxial semiconductor layer belong to homoepitaxy, and the stripping difficulty is high; in addition, even after the semiconductor layer is successfully stripped, the semiconductor layer needs to be bonded with a new substrate, and the processes are difficult to realize, complex and high in cost;

therefore, it is desirable to solve the heat dissipation problem by a simpler method;

in addition, the known semiconductor device needs to deposit a dielectric layer on the surface of the semiconductor layer for insulation and passivation protection, which further increases the process complexity and cost.

SUMMERY OF THE UTILITY MODEL

In view of the above, the present invention is directed to a gallium oxide-based semiconductor device, which improves the performance of a semiconductor device due to beta-Ga₂O₃The material has low thermal conductivity, resulting in being based on beta-Ga₂O₃The semiconductor device manufactured by the substrate has poor heat dissipation effect.

In order to achieve the above object, the present invention provides a gallium oxide-based semiconductor device, comprising:

a gallium oxide-based semiconductor device comprising, from bottom to top: a gallium oxide single crystal substrate and a laminated structure; the method is characterized in that: the gallium oxide single crystal substrate has an insulating characteristic, is partially etched through, and is deposited with a lower metal layer in the partially etched through area.

Preferably, the gallium oxide single crystal substrate is a crystal body having a monoclinic structure.

Further, the laminated structure includes one or more of a crystalline oxide semiconductor thin film layer, a polycrystalline layer, a metal thin film layer, an insulating layer, or a passivation layer.

Furthermore, the lower metal layer is one or more layers.

Furthermore, the lower metal layers are multiple layers, and other non-metal conducting layers are also included among the multiple lower metal layers.

Further, the other non-metal conducting layer is a doped polysilicon layer.

Further, the semiconductor device is a schottky diode, a pn junction diode, a metal oxide semiconductor field effect transistor, an insulated gate bipolar transistor, a light emitting diode, an electrostatic induction transistor, a junction field effect transistor, a high electron mobility transistor, or a metal semiconductor field effect transistor.

Compared with the prior art, the utility model has the following beneficial effects:

(1) the utility model is prepared by mixing beta-Ga₂O₃The single crystal substrate is processed in an insulating way and is partially etched through, and then the electrical contact is formed between the introduced metal layer and the semiconductor epitaxial layer in the local etching through area of the substrate, so that the heat generated by the semiconductor device during working can be quickly conducted out from the metal layer deposited in the etching through area of the substrate, and the problem of beta-Ga is solved₂O₃The problem of poor heat dissipation of the semiconductor device caused by low thermal conductivity of the material;

(2) compared with the prior art that the source substrate and the epitaxial layer are stripped and transferred, the technical scheme of the utility model simplifies the manufacturing process;

(3) the utility model relates to beta-Ga subjected to insulation treatment₂O₃The single crystal substrate can play the role of insulation protection, and for some semiconductor devices, an additional insulating medium layer does not need to be deposited.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and the protection scope of the present invention is not limited to the embodiments. For a person skilled in the art, other figures can also be obtained from these figures without inventive exercise.

Fig. 1 is a schematic diagram of a first suitable example of a schottky diode of the present invention;

fig. 2 is a schematic diagram of a second suitable example of a schottky diode of the present invention;

fig. 3 is a schematic diagram of a third suitable example of a schottky diode of the present invention;

FIG. 4 is a schematic diagram of one suitable example of a pn junction diode of the present invention;

FIG. 5 is a schematic diagram of a first suitable example of a MOSFET of the present invention;

FIG. 6 is a schematic diagram of a second suitable example of a MOSFET of the present invention;

FIG. 7 is a schematic diagram of one suitable example of an insulated gate bipolar transistor of the present invention;

FIG. 8 is a schematic diagram of one suitable example of a light emitting diode of the present invention;

fig. 9 is a schematic diagram of a fourth suitable example of a schottky diode of the present invention;

fig. 10 is a flow chart of a method of making the schottky diode of fig. 9;

the technical characteristics corresponding to the marks in the attached drawings are as follows:

101 gallium oxide single crystal substrate

102a n-form beta-Ga₂O₃Semiconductor layer

102b n + -type beta-Ga₂O₃Semiconductor layer

102 n type beta-Ga₂O₃Semiconductor layer

103a p-form beta-Ga₂O₃Semiconductor layer

103b p + -type beta-Ga₂O₃Semiconductor layer

103 p type beta-Ga₂O₃Semiconductor layer

104 passivation layer

105a anodic metal layer

105b cathode metal layer

106a anode metal layer

107a anodic metal layer

107b cathode metal layer

108 gate insulating layer

109a polysilicon

109b heavily doped p + type drain region

109c heavily doped p + -type source region

109d metal layer

110a gate electrode

110b drain electrode

110c source electrode

111a gate electrode

111b collector electrode

111c emitter

112a first electrode

112b second electrode

112c light-transmissive electrode

113 light emitting layer

Detailed Description

In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the utility model. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.

The utility model discloses the design does not need the substrate to shift for semiconductor device's preparation, through carrying out local corrosion to insulating gallium oxide single crystal substrate and wearing the processing, in the regional deposit lower metal layer of corroding wearing of substrate, make lower metal layer direct and laminated structure electrical contact, like this, semiconductor device during operation, the heat that produces can be through the fine transmission of lower metal layer, the heat dissipation of semiconductor device has greatly been improved; in addition, the insulating single crystal substrate also plays a role of insulation protection. In order to explain the technical means of the present invention, the following description will be made by way of specific examples.

First embodiment

As shown in fig. 1, a Schottky Barrier Diode (SBD) according to a first example of the present invention is shown. The gallium oxide schottky diode semiconductor device shown in fig. 1 adopts a vertical structure in which electrodes are respectively arranged on the front and back surfaces of a semiconductor layer, and comprises: anodic metal layer 105a, partially etched-through beta-Ga₂O₃ Single crystal substrate 101, lightly doped n-type beta-Ga₂O₃Semiconductor layer 102a heavily doped n + -type beta-Ga₂O₃ A semiconductor layer 102b, a cathode metal layer 105 b; anode metal layer 105a and lightly doped n-type Ga₂O₃The semiconductor layer 102a constitutes a schottky barrier;

in FIG. 1, beta-Ga₂O₃The single crystal substrate 101 is subjected to doping treatment for insulation. More specifically, the doping element is an Fe element;

in FIG. 1, beta-Ga₂O₃Semiconductor layer 102a and beta-Ga₂O₃The semiconductor layer 102b can be formed by a known method such as Metal Organic Chemical Vapor Deposition (MOCVD), Halide Vapor Phase Epitaxy (HVPE), or atomized CVD (Mist-CVD);

in fig. 1, the materials of the schottky electrode (i.e., the anode metal layer 105a) and the ohmic electrode (i.e., the cathode metal layer 105b) may be known electrode materials, and as the electrode materials, for example: metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, or Ag, or alloys thereof; metal oxide conductive films such as tin oxide, zinc oxide, indium tin oxide, and zinc indium oxide; organic conductive compounds such as polyaniline, polythiophene, and polypyrrole, or mixtures thereof;

in fig. 1, the schottky electrode and the ohmic electrode can be formed by a known method such as a vacuum deposition method or a sputtering method. More specifically, when the schottky electrode is formed, a layer made of Ni and a layer made of Al may be stacked.

The schottky diode (SBD) of figure 1, when working, the heat that the device produced can follow the metal electrode layer of device top and bottom both ends very fast conduction away, very big improvement the radiating effect of gallium oxide base power device.

When beta-Ga is present₂O₃When the thickness of the single crystal substrate 101 is thick, the etching treatment may be performed on β -Ga first₂O₃The single crystal substrate 101 is subjected to thinning treatment.

Second embodiment

Fig. 2 shows a second example of a Schottky Barrier Diode (SBD) according to the present invention. The schottky diode (SBD) of fig. 2 has an anode metal layer 106a in addition to the structure of fig. 1, i.e., the schottky diode (SBD) has two anode metal layers, an anode metal layer 105a as an inner layer, and lightly doped n-type β -Ga₂O₃The semiconductor layer 102a constitutes a schottky contact; an anode metal layer 106a as an outer layer for electrical connection with the outside; the material of the anode metal layer 106a may be selected from known electrode materials in fig. 1.

Third embodiment

Fig. 3 shows a third example of a Schottky Barrier Diode (SBD) according to the present invention. The schottky diode (SBD) of fig. 3 has a passivation layer 104 in addition to the structure of fig. 2, which has better insulation properties than the schottky diode (SBD) of fig. 1 and 2, for example, the material of the passivation layer 104 is AlN or Hf₂O₃、Al₂O₃、MgO、SiO₂Or Si₃N₄And the like. The passivation layer can be formed by, for example, sputtering, vacuum deposition, or CVDAnd the like by a known method.

Fourth embodiment

Fig. 4 shows an example of a pn junction diode according to the present invention.

The pn-junction diode semiconductor device of fig. 4, comprising: anodic metal layer 107a, partially etched through beta-Ga₂O₃ Single crystal substrate 101, heavily doped p + -type beta-Ga₂O₃Semiconductor layer 103b heavily doped n + -type beta-Ga₂O₃ A semiconductor layer 102b, a cathode metal layer 107 b;

the material of the anode metal layer 107a and the cathode metal layer 107b may be a known electrode material, and as the electrode material, for example: metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, or Ag, or alloys thereof; metal oxide conductive films such as tin oxide, zinc oxide, indium tin oxide, and zinc indium oxide; and organic conductive compounds such as polyaniline, polythiophene, and polypyrrole, and mixtures thereof. The metal electrode can be formed by a known method such as a vacuum deposition method or a sputtering method.

In the pn junction diode shown in the attached figure 4, when the diode works, heat generated by the device can be quickly conducted out from the metal electrode layers at the top and the bottom of the device, and the heat dissipation effect of the gallium oxide-based power device is greatly improved.

Fifth embodiment

Fig. 5 shows a first example of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) according to the present invention.

The MOSFET semiconductor device of fig. 5, comprising: partially etched through beta-Ga₂O₃ Single crystal substrate 101, lightly doped n-type beta-Ga₂O₃ A semiconductor layer 102a, a heavily doped p + -type drain region 109b, a heavily doped p + -type source region 109c, a gate insulating layer 108, a polysilicon gate region 109a, and a metal layer 109 d;

FIG. 5 is an n-channel enhancement MOSFET having a substrate doped to be insulating and then a semiconductor stack formed on the substrate, where the substrate functions as homoepitaxy and insulation;

β-Ga₂O₃the single crystal substrate has low heat conductivity and poor heat conduction effect, and the substrate is locally etched through and then deposited with a metal layer, so that a heat dissipation channel is provided through the bottom metal layer, and the heat dissipation of a device is improved.

Sixth embodiment

Fig. 6 shows a second example of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) according to the present invention.

The semiconductor arrangement of the MOSFET of fig. 6, comprising: partially etched through beta-Ga₂O₃ Single crystal substrate 101, heavily doped n + -type beta-Ga₂O₃Semiconductor layer 102b, lightly doped p-type beta-Ga₂O₃ A semiconductor layer 103a, a gate insulating layer 108, a polysilicon gate region 109a, a gate electrode 110a, a drain electrode 110b, a source electrode 110 c;

fig. 6 shows a trench MOSFET, in which a vertical device structure is formed by etching through a substrate, depositing a metal layer as a drain electrode, and simultaneously, the bottom metal layer can also be used as a heat dissipation channel to improve the heat dissipation of the device.

Seventh embodiment

As shown in fig. 7, this is an example of an Insulated Gate Bipolar Transistor (IGBT) according to the present invention.

The semiconductor device of the IGBT in fig. 7 includes: partially etched through beta-Ga₂O₃ Single crystal substrate 101, p-type beta-Ga₂O₃Semiconductor layer 103, n-type beta-Ga₂O₃Semiconductor layer 102, lightly doped n-type beta-Ga₂O₃Semiconductor layer 102a heavily doped n + -type beta-Ga₂O₃Semiconductor layer 102b, p-type beta-Ga₂O₃ A semiconductor layer 103, a gate insulating layer 108, a gate electrode 111a, a collector 111b, and an emitter 111 c.

Eighth embodiment

Fig. 8 shows an example of a light emitting diode according to the present invention.

The semiconductor device of the light emitting diode of fig. 8, comprising: partially etched through beta-Ga₂O₃ Single crystal substrate 101, second electrode 112b, n-type beta-Ga₂O₃Semiconductor layer 102, light-emitting layer 113, p-type beta-Ga₂O₃ A semiconductor layer 103, a light-transmitting electrode 112c, and a first electrode 112 a;

as a material of the light-transmissive electrode, for example, a conductive material containing an oxide of indium (In) or titanium (Ti) is used. More specifically, for example, In₂O₃、ZnO、SnO₂、Ga₂O₃、TiO₂、CeO₂Or a mixed crystal of two or more of these or a material in which doping is performed. These materials can be provided by a known method such as a sputtering method, whereby a light-transmissive electrode can be formed. After the formation of the light-transmissive electrode, thermal annealing for the purpose of transparency of the light-transmissive electrode may be performed.

In the light-emitting diode of fig. 8, the first electrode 112a is a positive electrode, the second electrode 112b is a negative electrode, and current is caused to flow through the p-type semiconductor layer 103, the light-emitting layer 113, and the n-type semiconductor layer 102 via both electrodes, whereby the light-emitting layer 113 emits light;

examples of the material of the first electrode 112a and the second electrode 112b include: metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, or Ag, or alloys thereof; and a metal oxide conductive film such as tin oxide, zinc oxide, Indium Tin Oxide (ITO), or Indium Zinc Oxide (IZO). The method for forming the electrode is not particularly limited, and may be appropriately selected in consideration of adequacy with the above-mentioned materials from wet methods such as a printing method and a coating method, physical methods such as a vacuum deposition method, a sputtering method and an ion plating method, chemical methods such as a CVD method and a plasma CVD method, and the like.

Ninth embodiment

Fig. 9 shows a fourth example of a Schottky Barrier Diode (SBD) according to the present invention. The schottky diode (SBD) of fig. 9, comprising: partially etched through beta-Ga₂O₃A single-crystal substrate 101 is provided,

lightly doped n-type beta-Ga₂O₃Semiconductor layer 102a, heavily doped n + typeOf beta-Ga₂O₃ A semiconductor layer 102b, a cathode metal layer 105b, an anode metal layer 105a, a doped polysilicon layer 109a, and an anode metal layer 106 a; wherein 105a is used as an inner layer and lightly doped n-type beta-Ga₂O₃The semiconductor layer 102a constitutes a schottky contact; 106a as an outer layer for electrical connection with the outside, and 109a as an intermediate layer between 105a and 106a for electrical connection.

Fig. 10 shows a method of manufacturing the schottky diode (SBD) of fig. 9, comprising the steps of:

step S1 of providing a gallium monoxide single crystal substrate 101 insulated by doping treatment;

step S2, growing lightly doped n-type Ga on the insulated gallium oxide single crystal substrate 101₂O₃ A semiconductor layer 102 a;

step S3, in the lightly doped n-type Ga₂O₃Growing heavily doped n + -type Ga on the semiconductor layer 102a₂O₃ A semiconductor layer 102 b;

step S4, heavily doping n + type Ga₂O₃On the semiconductor layer 102b, a cathode metal layer 105b is deposited, the cathode metal layer being heavily doped with Ga of n + -type₂O₃The semiconductor layer 102b constitutes an ohmic contact;

step S5, an optional step, of performing appropriate thinning according to the thickness of the single crystal substrate 101;

step S6, etching the local part of the gallium oxide single crystal substrate 101 from the bottom of the substrate 101 to etch the substrate 101 through to lightly doped n-type Ga₂O₃The surface of the semiconductor layer 102 a;

step S7, etching n-type Ga in the local through-substrate area₂O₃Depositing an anode metal layer 105a on the surface of the semiconductor layer 102a, the anode metal layer 105a and lightly doped n-type Ga₂O₃The semiconductor layer 102a constitutes a schottky contact;

step S8, depositing a polysilicon layer 109a on the anode metal layer 105a deposited in step S7, and doping the polysilicon layer 109a to convert it into an electrically good conductor layer;

in step S9, an anode metal layer 106a is deposited on the polysilicon layer 109a deposited in step S8, and the anode metal layer 106a is electrically connected to the outside.

The above embodiments have only exemplified the structure of the semiconductor device such as schottky diode, pn junction diode, mosfet, igbt, and led, and the inventive concept of the present application can be applied to semiconductor devices such as electrostatic induction transistor, junction field effect transistor, hemt, and mosfet.

In addition, the above embodiments only exemplify the method for manufacturing the schottky diode (SBD), and based on the inventive concept of the present application, the above method can be extended to pn junction diodes, metal oxide semiconductor field effect transistors, insulated gate bipolar transistors, light emitting diodes, electrostatic induction transistors, junction field effect transistors, high electron mobility transistors, or metal semiconductor field effect transistors according to the specific structure of different semiconductor devices.

It should be understood that the drawings of the above embodiments are only for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.

Claims (7)

1. A gallium oxide-based semiconductor device comprising, from bottom to top: a gallium oxide single crystal substrate and a laminated structure; the method is characterized in that: the gallium oxide single crystal substrate has an insulating characteristic, is partially etched through, and is deposited with a lower metal layer in the partially etched through area.

2. The semiconductor device according to claim 1, wherein: the gallium oxide single crystal substrate is a crystal body having a monoclinic structure.

3. The semiconductor device according to claim 1, wherein: the laminated structure includes one or more of a crystalline oxide semiconductor thin film layer, a polycrystalline layer, a metal thin film layer, an insulating layer, or a passivation layer.

4. The semiconductor device according to claim 1, wherein: the lower metal layer is one or more layers.

5. The semiconductor device according to claim 1, wherein: the lower metal layers are multiple layers, and other non-metal conducting layers are also included among the multiple lower metal layers.

6. The semiconductor device according to claim 5, wherein: the other non-metal conducting layer is a doped polysilicon layer.

7. The semiconductor device according to any one of claims 1 to 6, wherein: the semiconductor device is a Schottky diode, a pn junction diode, a metal oxide semiconductor field effect transistor, an insulated gate bipolar transistor, a light emitting diode, an electrostatic induction transistor, a junction field effect transistor, a high electron mobility transistor or a metal semiconductor field effect transistor.

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