CN216980607U - Array circuit board, device array, light-emitting device and display screen - Google Patents

Abstract

The embodiment of the utility model discloses an array circuit board, a device array, a light-emitting device and a display screen. The array circuit board includes: the circuit board unit comprises a fixed frame and a plurality of circuit board units which are arranged in the fixed frame in an array manner; the circuit board unit comprises a plurality of electrodes and bonding pads, the electrodes are arranged on the bottom surfaces of the bonding pads, and the bonding pads are in one-to-one correspondence with the electrodes; two adjacent bonding pads in the circuit board unit are isolated by hollowing, and two adjacent electrodes are isolated by hollowing; at least one common bonding pad is arranged in two adjacent circuit board units, and the bonding pad close to the fixing frame in the circuit board unit is connected with the fixing frame; therefore, the surface area of the bonding pad in the circuit board unit is increased, and meanwhile, the connection path between the light-emitting chip and the bonding wire area is improved, so that the light-emitting chip is reliably arranged, the circuit board is prevented from deforming, a large number of circuit board units can be arranged in the array circuit board, and the high utilization rate of the circuit board function area is ensured.

Description

Array circuit board, device array, light-emitting device and display screen

Technical Field

The embodiment of the utility model relates to the technical field of display, in particular to an array circuit board, a device array, a light-emitting device and a display screen.

Background

With the improvement of light emitting efficiency and the reduction of manufacturing cost, semiconductor light emitting sources have been widely used in the fields of backlight, display, illumination, and the like. The semiconductor Light source includes various types such as an LED (Light Emitting Diode), an OLED (Organic Light Emitting Diode), a COB (Chip on Board), a Light Emitting device, a module, a lamp panel, and a Light bar.

Referring to fig. 1 to 2, the related art array circuit board includes a fixing frame 200 and a plurality of circuit board units 100 arranged in an array in the fixing frame 200, and the circuit board units 100 include a plurality of pads 101, a plurality of intermediate metals 102, and a plurality of electrodes 103. The bonding pads 101 correspond to the intermediate metals 102 one to one, the electrodes 103 correspond to the intermediate metals 102 one to one, the intermediate metals 102 are located between the corresponding bonding pads 101 and the corresponding electrodes 103, the light emitting chip can be disposed on a side of the bonding pads 101 far away from the intermediate metals 102, and the intermediate metals 102 are generally used for improving the packaging effect of the light emitting chip.

However, the array circuit board is imperfect in that: on one hand, due to the arrangement of the intermediate metal 102, the bonding pad 101 is in a long strip shape, so that the surface area of the bonding pad 101 for arranging the light-emitting chip is small, and the light-emitting chip is not firmly bonded due to slurry scattering during die bonding; on the other hand, the connection path 1012 between the light emitting chip on the pad 101 of the circuit board unit 100 and the wire bonding area 1011 thereof is long, and the metal connecting strip 104 connecting the pads 101 of two adjacent circuit board units 100 has insufficient supporting force, so that the light emitting chip is easy to swing during die bonding and wire bonding to cause insecure adhesion; on the other hand, the circuit board is easily deformed in the process of manufacturing the metal connecting strip 104, and meanwhile, the longer metal connecting strip 104 results in a smaller number of circuit board units 100 arranged in the array circuit board, and further results in a smaller number of light emitting chips arranged on the array circuit board, which results in waste of the functional area of the circuit board.

SUMMERY OF THE UTILITY MODEL

Embodiments of the present invention provide an array circuit board, a device array, a light emitting device, and a display screen, so as to increase the surface area of a pad in a circuit board unit and improve the connection path between a light emitting chip and a bonding wire region, thereby ensuring reliable arrangement of the light emitting chip and avoiding deformation of the circuit board, and enabling a greater number of circuit board units to be arranged in the array circuit board, thereby ensuring a higher utilization rate of a functional region of the circuit board.

In a first aspect, an embodiment of the present invention provides an array circuit board, including a fixing frame and a plurality of circuit board units arranged in the fixing frame in an array arrangement;

the circuit board unit comprises a plurality of electrodes and bonding pads, the electrodes are arranged on the bottom surfaces of the bonding pads, and the bonding pads correspond to the electrodes one to one;

the two adjacent bonding pads in the circuit board unit are isolated in a hollow way, and the two adjacent electrodes are isolated in a hollow way;

at least one common welding pad is arranged in the two adjacent circuit board units, and the welding pad close to the fixed frame in the circuit board units is connected with the fixed frame.

Optionally, the pad and the corresponding electrode are integrally disposed, and an area of the pad is greater than or equal to an area of the corresponding electrode.

Optionally, a ratio of the area of the pad to the area of the corresponding electrode is in a range of [1, 2 ].

Optionally, the array circuit board further comprises a positioning through hole, the positioning through hole is located at the vertex angle of the circuit board unit, the positioning through hole penetrates through the circuit board unit, and two adjacent circuit board units share the positioning through hole.

Optionally, the circuit board unit further includes an identification member, and the identification member is disposed on a bottom surface of one of the pads in the circuit board unit.

Optionally, the fixing frame comprises a cutting line, the extension direction of the cutting line being the same as the extension direction of the fixing frame.

Optionally, the fixed frame includes a plurality of stress holes, and is a plurality of the stress hole is followed the circumference interval distribution of fixed frame, the stress hole runs through fixed frame.

In a second aspect, embodiments of the present invention further provide a device array, including the array wiring board, the plurality of light emitting chips, and the array encapsulation layer as described in the first aspect;

the light-emitting chips are arranged on the top surfaces of the corresponding bonding pads and are electrically connected with the corresponding bonding pads;

the array packaging layer at least covers the light-emitting chip.

In a third aspect, the embodiment of the present invention further provides a light emitting device, which is cut from the device array according to the second aspect;

the light-emitting device comprises a circuit board unit, a plurality of light-emitting chips and a device packaging layer, wherein the device packaging layer at least covers the light-emitting chips.

In a fourth aspect, embodiments of the present invention further provide a display screen, including the light emitting device according to the third aspect.

According to the array circuit board provided by the embodiment of the utility model, the circuit board units only comprise the electrodes and the bonding pads, at least one common bonding pad is arranged in two adjacent circuit board units, and the bonding pad close to the fixing frame in each circuit board unit is connected with the fixing frame, so that the bonding pads between the two adjacent circuit board units are integrally arranged, the surface area of the bonding pads in the circuit board units is increased, meanwhile, the connecting path between the light-emitting chip and the bonding wire area is shortened and thickened, the reliable arrangement of the light-emitting chip is ensured, slurry scattering does not occur during die bonding, and the bonding pads are not easy to swing; and the arrangement of the metal connecting strips is avoided, so that the array circuit board can be provided with a large number of circuit board units while the circuit board is prevented from deforming in the manufacturing process, and the higher utilization rate of the circuit board functional area is ensured.

Drawings

FIG. 1 is a schematic diagram of a front-side top-view structure of an array circuit board in the prior art;

FIG. 2 is a schematic diagram of a back side plan view of the array circuit board shown in FIG. 1;

fig. 3 is a schematic three-dimensional structure diagram of an array circuit board according to an embodiment of the present invention;

fig. 4 is a schematic front-side top-view structural diagram of an array circuit board according to an embodiment of the present invention;

fig. 5 is a schematic diagram of a back-side top-view structure of an array circuit board according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of a three-dimensional structure of an array of devices according to an embodiment of the present invention;

FIG. 7 is a schematic diagram of a top-down front view of a device array without an array encapsulation layer according to an embodiment of the present invention;

fig. 8 is a schematic diagram of a top-down structure of a device array without an array encapsulation layer according to an embodiment of the present invention;

fig. 9 is a schematic three-dimensional structure of a light emitting device according to an embodiment of the present invention;

fig. 10 is a schematic front-side top-view structural diagram of a light emitting device provided in an embodiment of the present invention without a device encapsulation layer.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the utility model and are not limiting of the utility model. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

Fig. 3 is a schematic diagram of a three-dimensional structure of an array circuit board according to an embodiment of the present invention, fig. 4 is a schematic diagram of a front-side top-view structure of an array circuit board according to an embodiment of the present invention, and fig. 5 is a schematic diagram of a back-side top-view structure of an array circuit board according to an embodiment of the present invention. Referring to fig. 3 to 5, the array wiring board 300 includes: a fixing frame 500 and a plurality of circuit board units 400 arranged in an array in the fixing frame 500; the circuit board unit 400 comprises a plurality of pads 401 and a plurality of electrodes 402, wherein the electrodes 402 are arranged on the bottom surfaces of the pads 401, and the pads 401 correspond to the electrodes 402 one by one; two adjacent bonding pads 401 in the circuit board unit 400 are isolated in a hollow manner, and two adjacent electrodes 402 are isolated in a hollow manner; at least one common bonding pad 401 is arranged in two adjacent circuit board units 400, and the bonding pad 401 close to the fixing frame 500 in the circuit board units 400 is connected with the fixing frame 500.

Specifically, the array wiring board 300 may be a metal plate, and the material of the metal plate may be copper, silver, or gold. The fixing frame 500 may not only support the plurality of circuit board units 400 arranged in an array, but also limit the number of the plurality of circuit board units 400 arranged in an array.

The multiple bonding pads 401 in the circuit board unit 400 include at least one positive bonding pad and at least one negative bonding pad to arrange the light emitting chip, for example, the positive bonding pad is connected with the positive electrode of the light emitting chip, and the negative bonding pad is connected with the negative electrode of the light emitting chip; the electrode 402 is disposed on the bottom surface of the pad 401, and the light emitting chip may be disposed on the top surface of the pad 401. The two adjacent pads 401 in the circuit board unit 400 are isolated in a hollow manner, the two adjacent electrodes 402 in the circuit board unit 400 are isolated in a hollow manner, so that the pads 401 and the electrodes 402 in a single circuit board unit obtained after cutting are insulated from each other, meanwhile, the plastic package material is arranged between the two adjacent pads 401 and the two adjacent electrodes 402 in the circuit board unit 400, and the hollow area 403 is filled with the plastic package material similarly. In addition, the present embodiment does not limit the specific shapes of the pads 401 and the electrodes 402, and the shapes of the pads 401 are different from each other in the wiring board unit 400 as exemplarily illustrated in fig. 4, while the shapes of the electrodes 402 are different from each other in the same shape of the partial electrodes 402 in the wiring board unit 400. Generally, the shape of the circuit board unit 400 is regular, which is beneficial to the rational utilization of the functional area, and is beneficial to the convenient cutting of the array circuit board 300, and the fabrication of the light emitting device with regular shape.

At least one common bonding pad 401 is arranged in two adjacent circuit board units 400, that is, at least one bonding pad 401 is integrally arranged in two adjacent circuit board units 400. Referring to the exemplary illustration in FIG. 4, the wiring board unit 400-2 is adjacent to the wiring board unit 400-1; the circuit board unit 400-1 comprises a pad 401-1, a pad 401-2, a pad 401-3 and a pad 401-4; the circuit board unit 400-2 comprises a pad 401-5, a pad 401-6, a pad 401-7 and a pad 401-8; the pad 401-5 in the board unit 400-2 is provided integrally with the pad 401-2 in the board unit 400-1, and the pad 401-8 in the board unit 400-2 is provided integrally with both the pad 401-4 and the pad 401-2 in the board unit 400-1.

Accordingly, compared with fig. 4 and fig. 1 in the prior art, in the embodiment of the present invention, the circuit board units 400 only include the pads 401 and the electrodes 402 without disposing intermediate metal, and at least one common pad 401 is disposed in two adjacent circuit board units 400, so that the surface area of the pad 401 in the circuit board unit 400 is increased, and meanwhile, the connection path 1012 between the light emitting chip and the wire bonding area 1011 is shortened and thickened, thereby ensuring reliable disposition of the light emitting chip, for example, no slurry scattering occurs during die bonding and the pad 401 is not easy to swing; in addition, at least one bonding pad 401 in two adjacent circuit board units 400 is integrally arranged, so that a metal connecting strip for connecting the bonding pads 401 is prevented from being arranged between the two adjacent circuit board units 400, the circuit board can be prevented from being deformed in the manufacturing process, meanwhile, the arrangement between the circuit board units 400 is more compact, a greater number of circuit board units 400 can be arranged in the array circuit board 300, a greater number of light-emitting chips can be arranged, and the utilization rate of a circuit board functional area is improved.

The bonding pads 401 near the fixing frame 500 in the circuit board units 400 are connected to the fixing frame 500, thereby realizing the supporting function of the fixing frame 500 on the plurality of circuit board units 400 arranged in an array. The connection relationship between the pad 401 close to the fixing frame 500 and the fixing frame 500 in the circuit board unit 400 can be integrally set, and compared with connection through a metal connecting strip, the connection structure is beneficial to increasing the surface area of the pad 401 close to the fixing frame 500, avoiding deformation of the circuit board in the manufacturing process and facilitating higher utilization rate of a circuit board function area. Referring to an exemplary illustration in fig. 4, the pad 401-1 in the circuit board unit 400-1 is close to the fixing frame 500, so that the pad 401-1 can be arranged in close connection with the fixing frame 500, specifically integrally arranged, and also for example, the pad 401-2 in the circuit board unit 400-1 is close to the fixing frame 500, so that the pad 401-2 is integrally arranged with the fixing frame 500.

On the basis of the above embodiments, optionally, the pads 401 are provided integrally with the corresponding electrodes 402, and the area of the pads 401 is larger than or equal to the area of the corresponding electrodes 402. Specifically, the pads 401 and the corresponding electrodes 402 are integrally disposed, so that not only can a good electrical connection relationship be ensured between the pads 401 and the corresponding electrodes 402, but also the electrodes 402 can be prevented from falling off from the bottom surfaces of the corresponding pads 401.

When the bonding pads 401 and the corresponding electrodes 402 are integrally arranged, a whole piece of copper foil can be used as a base material, and etching is directly performed on the top surface and the bottom surface of the copper foil through a preset circuit board structure to form the required array circuit board 300, so that the manufacturing process of the array circuit board 300 is simpler, and the structure of the array circuit board 300 is more reliable. The pad 401 is used to carry a light emitting chip, and the electrode 402 may be used as a connection terminal, and thus, the surface area of the electrode 402 may be set to be smaller than or equal to the surface area of the pad 401 to save consumables. When the surface area of the electrode 402 is smaller than that of the pad 401, the hollow area 403 between two adjacent pads 401 is larger than the hollow area 403 between two adjacent electrodes 402, which is beneficial for filling more plastic packaging material between two adjacent electrodes 402 when the circuit board 300 is in plastic packaging array, so as to achieve better packaging effect.

On the basis of the above embodiments, optionally, the value range of the ratio of the area of the pad 401 to the area of the corresponding electrode 402 is [1, 2], so that reliable connection between the pad 401 and the light emitting chip can be ensured, cost can be reasonably controlled, and reliable connection between the electrode 402 and an external circuit can be ensured.

On the basis of the above embodiments, with continuing reference to fig. 5, optionally, the circuit board unit 400 further includes an identification member 405, and the identification member 405 is disposed on the bottom surface of one pad 401 in the circuit board unit 400. Specifically, the identifier 405 is mainly used for polarity recognition of the electrodes 402 on the back surface of the array wiring board 300. The shape of the marker 405 is not particularly limited in the embodiment of the present invention, and as the marker 405 exemplarily illustrated in fig. 5 has a triangular prism shape, the volume of the marker 405 may be smaller than the volumes of the electrode 402 and the pad 401, so as to avoid affecting the array circuit board 300.

Based on the foregoing embodiments, with reference to fig. 3 to fig. 5, optionally, the array circuit board 300 further includes a positioning through hole 404, the positioning through hole 404 is located at a vertex of the circuit board unit 400, the positioning through hole 404 penetrates through the circuit board unit 400, and two adjacent circuit board units 400 share the positioning through hole 404.

Specifically, the positioning through holes 404 are used to position the area where the circuit board unit 400 is located, for example, at least four positioning through holes 404 may be used to position the area where one circuit board unit 400 is located. Compared with the positioning of the circuit board unit 400 based on the metal connecting strip in fig. 1, the positioning is more accurate through the positioning through holes 404, and the deformation of the circuit board can be avoided as much as possible because the metal connecting strip is not required to be arranged for positioning, so that the process is simpler, and the utilization rate of the functional area is increased. For example, the positioning through hole 404 may be formed by laser dotting, and the embodiment of the present invention does not limit the specific manner of forming the positioning through hole 404.

When the array wiring board 300 is cut, the cutting may be performed along the row direction x or the column direction y in which the plurality of positioning through holes 404 are arranged. For example, in fig. 4, a complete circuit board unit 400 can be cut by cutting along the first line segment x1 and the second line segment y 1. Compared with the method for cutting the array circuit board 300 based on the metal connecting strips in fig. 1, the cutting based on the positioning through holes 404 is beneficial to ensuring accurate alignment during cutting; furthermore, cutting is carried out based on positioning hole 404, and the top angle of circuit board unit 400 is provided with through holes, so that burrs and burrs cannot be formed on the top angle of the circuit board unit 400 obtained by cutting, the top angle is not easy to deform, and the top angle of the circuit board unit 400 is a quarter of half hole.

Generally, after the light emitting chip is mounted on the array circuit board 300, the light emitting chip and the array circuit board 300 need to be plastically packaged. In the plastic packaging process, the plastic packaging material is filled into the hollow area 403 between the two adjacent electrodes 402 from the hollow area 403 between the two adjacent bonding pads 401, and as the hollow area 403 between the two adjacent bonding pads 401 is smaller than the hollow area 403 between the two adjacent electrodes 402 under normal conditions, the hollow area 403 between the two adjacent electrodes 402 is difficult to be filled with the plastic packaging material, so that the plastic packaging effect is poor, and the bonding force between the plastic packaging material and the functional area of the circuit board is insufficient, so that water and oxygen enter the light-emitting chip from the hollow area 403 between the two adjacent electrodes 402, which is not filled with the plastic packaging material, and the light-emitting chip is damaged.

In this regard, the positioning through holes 404 provided in the embodiment of the present invention may also be used to fill plastic package material. Thus, the plastic package material can be filled from the hollow area 403 between the two adjacent bonding pads 401 to the hollow area 403 between the two adjacent electrodes 402, and can also be filled from the positioning through holes 404 to the hollow area 403 between the two adjacent electrodes 402, so that the plastic package material can be filled in the hollow area 403 between the two adjacent electrodes 402, the plastic package effect on the light-emitting chip and the array circuit board 300 is ensured, the bonding force between the plastic package material and the functional area of the circuit board is ensured, and the water and oxygen are better prevented from invading the light-emitting chip.

On the basis of the above embodiments, with reference to fig. 3 to 5, optionally, the fixing frame 500 includes a cutting line 501, the extending direction of the cutting line 501 is the same as the extending direction of the fixing frame 500, specifically, the cutting line 501 may be formed by perforations arranged at intervals, and the perforations penetrate through the fixing frame 500. Specifically, the cutting line 501 is mainly used for positioning and identification during cutting, the distance between the perforations of the cutting line 501 can be relatively large, and the extension line of the cutting line 501 can pass through the positioning through hole 404, so as to facilitate accurate positioning and accurate cutting. It should be understood that the specific arrangement of the cutting lines 501 may be other than the through holes arranged at intervals, so as to precisely position and cut the array circuit board 300 or the device array 600.

Based on the above embodiments, with reference to fig. 3 to 5, optionally, the fixing frame 500 includes a plurality of stress holes 502, the stress holes 502 are distributed at intervals along the circumferential direction of the fixing frame 500, and the stress holes 502 penetrate through the fixing frame 500. Specifically, the stress holes 502 are mainly used for preventing the array circuit board 300 from warping in the plastic package process and releasing stress between the plastic package material and the array circuit board 300. The specific shape of the stress holes 502 is not limited in this embodiment, as exemplarily illustrated in fig. 5, the stress holes 502 are long-striped, so as to avoid affecting the supporting function of the fixing frame 500 on the circuit board units 400 arranged in an array, the number of the stress holes 502 distributed on each frame of the fixing frame 500 may also be set according to actual needs, and optionally, the stress holes 502 are disposed at the central position on the frame.

The embodiment of the utility model also provides a device array. Fig. 6 is a schematic three-dimensional structure diagram of a device array according to an embodiment of the present invention, fig. 7 is a schematic front-side top-down structure diagram of the device array provided by the embodiment of the present invention without an array encapsulation layer, and fig. 8 is a schematic back-side top-down structure diagram of the device array provided by the embodiment of the present invention without an array encapsulation layer. With reference to fig. 6 to 8, the device array 600 includes the array wiring board 300 provided in any of the above embodiments, and includes an array package layer 602 and a plurality of light emitting chips 700; the light emitting chips 700 are disposed on the top surfaces of the corresponding bonding pads 401, and the light emitting chips 700 are electrically connected to the corresponding bonding pads 401; the array encapsulation layer 602 covers at least the light emitting chip 700.

Specifically, the light emitting chip 700 may be an LED chip, the light emitting chip 700 may be a red light emitting chip, a green light emitting chip, or a blue light emitting chip, and a plurality of light emitting chips 700 with different colors or the same color may be disposed in the same circuit board unit 400.

Illustratively, the circuit board unit 400 includes four bonding pads 401, and three light emitting chips 700 are correspondingly disposed, wherein one light emitting chip 700 is correspondingly disposed on each of the three bonding pads 401, and the bonding pads 401 are electrically connected to the corresponding light emitting chips 700, for example, by bonding wires 601, and the remaining one bonding pad 401 is electrically connected to each of the three light emitting chips 700. When the three bonding pads 401 are all positive bonding pads and the remaining bonding pad 401 is a negative bonding pad, the three light emitting chips 700 are connected in a common cathode mode, and when the three bonding pads 401 are all negative bonding pads and the remaining bonding pad 401 is a positive bonding pad, the three light emitting chips 700 are connected in a common anode mode. Wherein, the three light emitting chips 700 may be light emitting chips of different colors, respectively.

When the device array 600 illustrated in fig. 7 is subjected to plastic packaging, mold pressing plastic packaging may be used for implementing the plastic packaging, so that the array packaging layer 602 in fig. 6 covers the light emitting chip 700, covers the surface of the bonding pad 401 close to the light emitting chip 700 and not covered by the light emitting chip 700, covers the hollow area 403 between two adjacent bonding pads 401 and the hollow area 403 between two adjacent electrodes 402, and exposes the surface of the electrode 402 far from the bonding pad 401 and the fixing frame 500, that is, the array packaging layer 602 does not cover the fixing frame 500 and the surface of the electrode 402 far from the bonding pad 401.

In the molding of the device array 600 shown in fig. 7, a protective film may be provided on the side of the electrode 402 away from the pad 401, and the array package layer 602 and the protective film may be provided on the opposite sides of the array wiring board 300. If stress exists between the array packaging layer 602 and the array circuit board 300 due to reasons such as heating, and at this time, due to the arrangement of the protective film, stress also exists between the protective film and the array circuit board 300, and the deformation direction of the protective film may be opposite to the deformation direction of the array packaging layer 602, so that the overall effect is obtained that the total stress borne by the array circuit board 300 located between the array packaging layer 602 and the protective film is zero, that is, the array circuit board 300 is not stressed, and therefore the array circuit board 300 is not deformed such as shrinkage and is in a stable and unchangeable state.

On this basis, another advantage of providing the protective film is that, in the process of plastic packaging the light-emitting chip 700 and the array circuit board 300, the plastic packaging material can be prevented from overflowing to the surface of the electrode 402 away from the pad 401, even if the plastic packaging material overflows from the hollow area 403 or the positioning through hole 404, the plastic packaging material only overflows to the protective film, and after the plastic packaging is finished, the protective film is torn off, so that the electrode 402 is not affected, that is, the electrode 402 is well protected.

Embodiments of the present invention also provide a light emitting device, which is obtained by cutting the device array 600 of any of the above embodiments. Fig. 9 is a schematic three-dimensional structure diagram of a light emitting device according to an embodiment of the present invention, and fig. 10 is a schematic front plan structure diagram of the light emitting device according to the embodiment of the present invention when a device encapsulation layer is not disposed. Referring to fig. 9 and 10, a light emitting device 800 includes a wiring board unit, a device encapsulation layer 801, and a plurality of light emitting chips 700, and the device encapsulation layer 801 covers at least the light emitting chips 700.

Specifically, the device encapsulation layer 801 of the light emitting device 800 is obtained by cutting the array encapsulation layer 602 in the device array 600 (the device encapsulation layer in fig. 9 is filled in black only to distinguish the array encapsulation layer from the device encapsulation layer, and actually the device encapsulation layer and the array encapsulation layer are the same material, and the device encapsulation layer is obtained by cutting through the array encapsulation layer). As illustrated in fig. 9, the light emitting device 800 obtained by cutting the device array 600 has a side surface exposed from the side surface of the pad 401.

Embodiments of the present invention further provide a display screen, where the display screen includes a plurality of light emitting devices 800 provided in any of the above embodiments, and one light emitting device 800 may be one pixel of the display screen. The display screen and the luminescent device belong to the same utility model concept, can realize the same technological effect, and the repeated content here is no longer repeated.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the utility model. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (10)

1. An array circuit board is characterized by comprising a fixed frame and a plurality of circuit board units arranged in the fixed frame in an array manner;

the circuit board unit comprises a plurality of electrodes and bonding pads, the electrodes are arranged on the bottom surfaces of the bonding pads, and the bonding pads correspond to the electrodes one to one;

the two adjacent bonding pads in the circuit board unit are isolated in a hollow way, and the two adjacent electrodes are isolated in a hollow way;

at least one common welding pad is arranged in the two adjacent circuit board units, and the welding pad close to the fixed frame in the circuit board units is connected with the fixed frame.

2. The array wiring board of claim 1, wherein the pads are integrally disposed with the corresponding electrodes, and the pads have an area greater than or equal to the area of the corresponding electrodes.

3. The array board of claim 2, wherein the ratio of the area of the pad to the area of the corresponding electrode is in the range of [1, 2 ].

4. The array circuit board of claim 1, further comprising positioning vias located at the corners of the circuit board units, wherein the positioning vias penetrate through the circuit board units, and two adjacent circuit board units share the positioning vias.

5. The array board of claim 1, wherein the board elements further comprise an identifier disposed on a bottom surface of one of the pads in the board element.

6. The array wiring board of claim 1, wherein the fixing frame includes a cutting line, and an extending direction of the cutting line is the same as an extending direction of the fixing frame.

7. The array circuit board of claim 1, wherein the fixed frame includes a plurality of stress holes spaced apart along a circumference of the fixed frame, the stress holes extending through the fixed frame.

8. A device array comprising the array wiring board of any one of claims 1 to 7, a plurality of light emitting chips, and an array encapsulation layer;

the light-emitting chips are arranged on the top surfaces of the corresponding bonding pads and are electrically connected with the corresponding bonding pads;

the array packaging layer at least covers the light-emitting chip.

9. A light emitting device cut from the device array according to claim 8;

the light-emitting device comprises a circuit board unit, a plurality of light-emitting chips and a device packaging layer, wherein the device packaging layer at least covers the light-emitting chips.

10. A display panel comprising the light-emitting device according to claim 9.

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