CN216979752U - Data interface equipment - Google Patents

Data interface equipment Download PDF

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Publication number
CN216979752U
CN216979752U CN202220535611.6U CN202220535611U CN216979752U CN 216979752 U CN216979752 U CN 216979752U CN 202220535611 U CN202220535611 U CN 202220535611U CN 216979752 U CN216979752 U CN 216979752U
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module
pcie
data
bus conversion
data interface
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CN202220535611.6U
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Inventor
吕剑维
邓勇
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Hunan Zetian Zhihang Electronic Technology Co ltd
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Hunan Zetian Zhihang Electronic Technology Co ltd
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Abstract

The utility model discloses data interface equipment, which comprises an AD acquisition module, a data uploading module, a bus conversion module and a PCIE module which are sequentially connected, wherein the AD acquisition module is used for acquiring an analog signal transmitted by an AD chip; the data uploading module is used for uploading the analog signals acquired by the AD acquisition module to the bus conversion module; the bus conversion module is used for converting the analog signals uploaded by the data uploading module into PCIE signals; the PCIE module is used for sending the PCIE signal converted by the bus conversion module to the CPU. The data interface equipment provided by the utility model has high information processing real-time performance and is easy to maintain or expand.

Description

Data interface equipment
Technical Field
The utility model relates to the technical field of data acquisition equipment, and particularly discloses data interface equipment.
Background
With the continuous development of modern information technology, analog quantity acquisition and various standard interfaces are indispensable in the fields of internet, industrial control, national defense and the like, the analog quantity acquisition is the basis of subsequent data analysis, and the speed and the precision of the analog quantity acquisition have great influence on subsequent processing; for current electronic devices, a standard interface module is one of the most common communication interfaces. However, the existing data acquisition equipment has poor information processing real-time performance and is difficult to maintain or expand.
Therefore, the existing data acquisition equipment has poor information processing real-time performance and is difficult to maintain or expand, and the technical problem to be solved is urgent.
SUMMERY OF THE UTILITY MODEL
The utility model provides data interface equipment, and aims to solve the technical problems of poor information processing real-time performance and difficulty in maintenance or expansion of the conventional data acquisition equipment.
The utility model relates to a data interface device, which comprises an AD acquisition module, a data uploading module, a bus conversion module and a PCIE module which are sequentially connected, wherein the AD acquisition module is used for acquiring an analog signal transmitted by an AD chip; the data uploading module is used for uploading the analog signals acquired by the AD acquisition module to the bus conversion module; the bus conversion module is used for converting the analog signals uploaded by the data uploading module into PCIE signals; the PCIE module is used for sending the PCIE signal converted by the bus conversion module to the CPU.
Furthermore, the data interface device also comprises a register control module, and the register control module is respectively connected with the data uploading module and the bus conversion module.
Furthermore, the data interface device also comprises an interface module, and the interface module is respectively connected with the register control module and the bus conversion module.
Further, the interface module comprises an RS422, RS232 and/or RS485 interface.
Further, the model of the AD acquisition module is Taida DVP04 AD-SL.
Further, the model of the AD chip is AD 7606.
Further, the PCIE module is connected to the CPU through a PCIE interface.
Furthermore, the model of the PCIE module is GAP _ AAA-PCI-017-K04.
The beneficial effects obtained by the utility model are as follows:
the utility model provides a data interface device, which adopts an AD acquisition module, a data uploading module, a bus conversion module and a PCIE module which are connected in sequence, and acquires an analog signal transmitted by an AD chip through the AD acquisition module; the data uploading module uploads the analog signals acquired by the AD acquisition module to the bus conversion module; the bus conversion module converts the analog signals uploaded by the data uploading module into PCIE signals; the PCIE module is used for sending the PCIE signal converted by the bus conversion module to the CPU. The data interface equipment provided by the utility model has high information processing real-time performance and is easy to maintain or expand.
Drawings
FIG. 1 is a functional block diagram of a first embodiment of a data interface device provided by the present invention;
FIG. 2 is a functional block diagram of a second embodiment of a data interface device provided in the present invention;
fig. 3 is a functional block diagram of a third embodiment of a data interface device provided by the present invention.
The reference numbers illustrate:
10. an AD acquisition module; 20. a data uploading module; 30. a bus conversion module; 40. a PCIE module; 50. a register control module; 60. and an interface module.
Detailed Description
In order to better understand the technical solution, the technical solution will be described in detail with reference to the drawings and the specific embodiments.
As shown in fig. 1 and fig. 2, a first embodiment of the present invention provides a data interface device, which includes an AD acquisition module 10, a data uploading module 20, a bus conversion module 30, and a PCIE module 40, which are connected in sequence, where the AD acquisition module 10 is configured to acquire an analog signal transmitted by an AD chip; the data uploading module 20 is configured to upload the analog signal acquired by the AD acquiring module 10 to the bus converting module 30; the bus conversion module 30 is configured to convert the analog signal uploaded by the data uploading module 20 into a PCIE signal; the PCIE module 40 is configured to send the PCIE signal converted by the bus conversion module 30 to the CPU. In this embodiment, the model number adopted by the AD chip is AD 7606. The AD acquisition module 10 is of a model of Taida DVP04 AD-SL. The PCIE module 40 is of a model GAP _ AAA-PCI-017-K04. The PCIE module 40 is connected to the CPU through a PCIE interface.
Preferably, please refer to fig. 2, where fig. 2 is a functional block diagram of a second embodiment of the data interface device provided in the present invention, and on the basis of the first embodiment, the data interface device further includes a register control module 50, where the register control module 50 is respectively connected to the data uploading module 20 and the bus conversion module 30, and is configured to store the uploaded analog signal of the data uploading module 20 and the PCIE signal converted by the bus conversion module, and the processing real-time performance is high.
Further, referring to fig. 3, fig. 3 is a functional block diagram of a third embodiment of the data interface device provided by the present invention, on the basis of the second embodiment, the data interface device provided by this embodiment further includes an interface module 60, where the interface module 60 is respectively connected to the register control module 50 and the bus conversion module 30, and is used to perform interface conversion on the PCIE signal converted by the bus conversion module and the analog signal stored in the register control module 50 through a multi-path serial port, and the processing real-time performance is high. In this embodiment, the interface module 60 includes an RS422 interface, an RS232 interface and/or an RS485 interface, and may be other interfaces, which are all within the protection scope of this patent.
As shown in fig. 1 to fig. 3, the data interface device provided in this embodiment has the following operating principle;
analog signals enter the AD acquisition module 10 through an AD chip, the AD acquisition module 10 finishes acquisition of analog quantity, AD data are stored in FIFO, the data uploading module 20 realizes a handshake protocol with the CPU, and after the analog signals are converted and transmitted through the bus conversion module 30 and the PCIE module 40, the analog signals are uploaded to the CPU through a PCI-E x1 bus, and acquisition of the analog signals by the CPU is finished. The CPU exchanges information with the outside through the 7-way expansion interface module 60. The CPU end can configure the sampling rate and the sampling mode of the analog signal and the baud rate and the mode of the serial port through different commands.
The data interface device provided by this embodiment adopts an AD acquisition module, a data upload module, a bus conversion module, and a PCIE module that are connected in sequence, and acquires an analog signal transmitted by an AD chip through the AD acquisition module; the data uploading module uploads the analog signals acquired by the AD acquisition module to the bus conversion module; the bus conversion module converts the analog signals uploaded by the data uploading module into PCIE signals; the PCIE module is used for sending the PCIE signal converted by the bus conversion module to the CPU. The data interface equipment provided by the utility model has high information processing real-time performance and is easy to maintain or expand.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the utility model. It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the utility model. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (8)

1. The data interface equipment is characterized by comprising an AD acquisition module (10), a data uploading module (20), a bus conversion module (30) and a PCIE module (40) which are sequentially connected, wherein the AD acquisition module (10) is used for acquiring analog signals transmitted by an AD chip; the data uploading module (20) is used for uploading the analog signals acquired by the AD acquisition module (10) to the bus conversion module (30); the bus conversion module (30) is used for converting the analog signals uploaded by the data uploading module (20) into PCIE signals; the PCIE module (40) is used for sending the PCIE signal converted by the bus conversion module (30) to the CPU.
2. The data interface device according to claim 1, wherein the data interface device further comprises a register control module (50), the register control module (50) being connected to the data upload module (20) and the bus conversion module (30), respectively.
3. A data interface device according to claim 2, characterized in that said data interface device further comprises an interface module (60), said interface module (60) being connected to said register control module (50) and said bus conversion module (30), respectively.
4. A data interface device according to claim 3, characterized in that the interface module (60) comprises an RS422, RS232 and/or RS485 interface.
5. The data interface device according to claim 1, characterized in that the AD acquisition module (10) is of the type tada DVP04 AD-SL.
6. The data interface device of claim 1, wherein the AD chip is of a model AD 7606.
7. The data interface device of claim 1, wherein the PCIE module (40) is coupled to the CPU through a PCIE interface.
8. The data interface device of claim 1, wherein the PCIE module (40) is model GAP _ AAA-PCI-017-K04.
CN202220535611.6U 2022-03-11 2022-03-11 Data interface equipment Active CN216979752U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202220535611.6U CN216979752U (en) 2022-03-11 2022-03-11 Data interface equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202220535611.6U CN216979752U (en) 2022-03-11 2022-03-11 Data interface equipment

Publications (1)

Publication Number Publication Date
CN216979752U true CN216979752U (en) 2022-07-15

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Application Number Title Priority Date Filing Date
CN202220535611.6U Active CN216979752U (en) 2022-03-11 2022-03-11 Data interface equipment

Country Status (1)

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CN (1) CN216979752U (en)

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