CN115541961A - Multi-path positive and negative pulse current synchronous sampling circuit - Google Patents
Multi-path positive and negative pulse current synchronous sampling circuit Download PDFInfo
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- CN115541961A CN115541961A CN202211177758.3A CN202211177758A CN115541961A CN 115541961 A CN115541961 A CN 115541961A CN 202211177758 A CN202211177758 A CN 202211177758A CN 115541961 A CN115541961 A CN 115541961A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0007—Frequency selective voltage or current level measuring
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
- G01R15/04—Voltage dividers
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
- G01R19/2506—Arrangements for conditioning or analysing measured signals, e.g. for indicating peak values ; Details concerning sampling, digitizing or waveform capturing
- G01R19/2509—Details concerning sampling, digitizing or waveform capturing
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
The invention discloses a multi-path positive and negative pulse current synchronous sampling circuit, which comprises a plurality of sampling units, wherein each sampling unit uses the same devices and connection modes; the operational amplifier circuit uses an operational amplifier and five resistors R1 to R5, the positive and negative power supply ports are respectively connected with 5V and-5V, the non-inverting input end is respectively connected with 5V through R1, the input signal through R2 and the ground through R3, and the inverting input end is respectively connected with the output end through R4 and the ground through R5; the four input ends of the digital signal controller are respectively connected with the output ends of the four operational amplifiers through resistors R61 to R64, the three output ends are respectively used as TRI, TXD and RXD outputs, and the TRI, TXD and RXD of each sampling unit are respectively connected in parallel.
Description
Technical Field
The invention belongs to the technical field of electronic circuits, and particularly relates to a pulse sampling technology.
Background
The high-voltage pulse power supply needs to monitor the output current waveform of multiple pulses to check whether each pulse load loop works normally. Some pulse current peak values are as high as tens of thousands of amperes, and strong electromagnetic fields are formed at the moment of discharge, so that strong interference is generated to the outside. These electromagnetic interferences are mainly radiated interferences and conducted interferences, as well as inductive interferences and coupling interferences.
An ARM chip or a DSP is adopted to be matched with a CPLD circuit, a plurality of bipolar A/D conversion chips are coordinately controlled in time sequence, the conditioned current signals are synchronously converted, and each conversion result is stored into an extended SRAM. The circuit has complex time sequence control, the operating voltage of the device core is as low as 1.8V, the operation speed is high, and interference avoidance is almost impossible.
In view of the inherent characteristics of the circuit, the interference problem is solved well, and only by reducing the sampling rate and the number of effective sampling points and applying various algorithms to perform software filtering processing, a good pulse current waveform can be obtained.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a multi-path positive and negative pulse current synchronous sampling circuit, and in order to achieve the purpose, the invention adopts the following technical scheme.
The sampling circuit comprises a plurality of sampling units, each sampling unit uses the same device and connection mode, the sampling units use four groups of operational amplifier circuits and a digital signal controller, and each group of operational amplifier circuits uses the same device and connection mode.
The operational amplifier circuit uses an operational amplifier and five resistors R1 to R5, the positive and negative power supply ports are respectively connected with 5V and-5V, the non-inverting input end is respectively connected with 5V through R1, the input signal through R2 and the ground through R3, and the inverting input end is respectively connected with the output end through R4 and the ground through R5.
Four input ends of the digital signal controller are respectively connected with output ends of the four operational amplifiers through resistors R61 to R64, three output ends are respectively used as TRI, TXD and RXD outputs, and the TRI, TXD and RXD of each sampling unit are respectively connected in parallel.
The operational amplifier uses TLC2274, the R1 and R2 are 20K, the R3, R4 and R5 are 10K, the input signal is superposed with 5V and input into the non-inverting input end, if-5V to 5V are input, 0 to 5V is output, and the bipolar current signal is biased into a unipolar voltage signal.
The digital signal controller uses a dsPIC3OF4012 chip OF a micro-core company, has 4096 bytes OF SRAM storage space, 5 l 6-bit timers, 2 UARTs, 1 CAN communication interface, 6 analog input channels and 4 sampling amplifiers, is embedded with a successive approximation register structure and serves as an ADC module with the maximum sampling rate OF 1Msps, and collects signals generated by a voltage division circuit.
The dsPIC3OF4012 chip uses 5V to supply power, automatically samples unipolar voltage signals, triggers conversion once in each sampling period, generates interruption after each sampling period, sends data to the upper computer, the MCU starts conversion once, after the conversion is finished,
and data is read, and the MCU does not wait, so that the sampling processing efficiency is improved.
Initializing an internal ADC module, synchronizing an external clock, setting an address counter to zero, autonomously generating a control signal, controlling the ADC module by a synchronizing signal TRI, respectively collecting each path of input signals, and converting and inputting the signals into an RAM for storage.
The invention uses few devices, only consists of 3 operational amplifiers, 3 digital signal controllers with 28 pins and a small number of peripheral resistance-capacitance devices, designs a simple and economic microsecond circuit, does not use a bipolar A/D conversion chip, synchronously completes the bipolar analog quantity sampling of 12 paths of positive and negative pulse currents at high speed, has the interval of 2uS for each sampling point, achieves the sampling precision of 1 per thousand, is suitable for the multi-path waveform acquisition of the pulse currents, has the core working voltage of 5V, reduces the core speed to the A/D clock period, does not need a complex time sequence control circuit, has super-strong immunity to strong electromagnetic interference, does not need software filtering on the acquired data, can acquire good current waveforms, and has cost performance superior to other circuits with the same functions.
Drawings
Fig. 1 is a 12-way sampling circuit, fig. 2 is an operational amplifier circuit, fig. 3 is a digital controller circuit, and fig. 4 is a pin definition.
Detailed Description
The technical scheme of the invention is specifically described by taking a 12-path sampling circuit as an example in combination with the attached drawings.
The 12-path sampling circuit comprises 3 sampling units, as shown in fig. 1, each sampling unit comprises a digital signal controller which is respectively N1, N2 and N3, and four groups of operational amplifier circuits.
The same devices and connection modes are used for each group of operational amplifier circuits, namely N4A, N4B, N4C, N D, N5A, N B, N5C, N D, N6A, N B, N6C, N D.
The connection of N4A is shown in figure 2, the positive and negative power supply ports are respectively connected with 5V and-5V, the non-inverting input end is respectively connected with 5V through R1, the input signal through R2 and the grounding through R3, and the inverting input end is respectively connected with the output end through R4 and the grounding through R5.
The corresponding N1 connections are shown in fig. 3, four input terminals are respectively connected to the output terminals of the four operational amplifiers via resistors R61 to R64, and three output terminals are respectively used as TRI, TXD, RXD outputs.
The other N2 and N3 are connected in the same manner, the resistance values are also the same, the definition of each pin is as shown in fig. 4, and TRI, TXD, RXD of each sampling unit are respectively connected in parallel.
After linking, the compiler manifest is as follows:
the above-described embodiments are not intended to limit the present invention, and any modifications, equivalents, improvements, etc. made within the spirit and principle of the present invention are included in the scope of the present invention.
Claims (5)
1. A multi-path positive and negative pulse current synchronous sampling circuit is characterized by comprising: the sampling circuit comprises a plurality of sampling units, each sampling unit uses the same device and connection mode, the sampling units use four groups of operational amplifier circuits and a digital signal controller, and each group of operational amplifier circuits uses the same device and connection mode; the operational amplifier circuit uses an operational amplifier and five resistors R1 to R5, the positive and negative power supply ports are respectively connected with 5V and-5V, the non-inverting input end is respectively connected with 5V through R1, the input signal through R2 and the ground through R3, and the inverting input end is respectively connected with the output end through R4 and the ground through R5; the four input ends of the digital signal controller are respectively connected with the output ends of the four operational amplifiers through resistors R61 to R64, the three output ends are respectively used as TRI, TXD and RXD outputs, and the TRI, TXD and RXD of each sampling unit are respectively connected in parallel.
2. The multi-channel positive-negative pulse current synchronous sampling circuit according to claim 1, wherein the operational amplifier uses TLC2274, R1 and R2 have resistance values of 20k, R3, R4, and R5 have resistance values of 10K, an input signal is superimposed with 5V and input to the non-inverting input terminal, and if-5V to 5V are input, 0V to 5V are output, and the bipolar current signal is biased to be a unipolar voltage signal.
3. The multi-path positive and negative pulse current synchronous sampling circuit as claimed in claim 2, wherein the digital signal controller uses a dsPIC3OF4012 chip OF the micro-core company, 5V power supply is used, unipolar voltage signals are automatically sampled, conversion is triggered once in each sampling period, interruption is generated after each path OF sampling is finished, data is sent to the upper computer, MCU starts conversion once, data is read after conversion is finished, and MCU does not wait.
4. The multi-channel positive-negative pulse current synchronous sampling circuit according to claim 3, further comprising: initializing an internal ADC module, synchronizing an external clock, setting an address counter to zero, autonomously generating a control signal, controlling the ADC module by a synchronizing signal TRI, respectively acquiring each path of input signals, and converting and inputting the signals into an RAM for storage.
5. A12-path positive and negative pulse current synchronous sampling circuit is characterized by comprising: the multi-channel positive and negative pulse current synchronous sampling circuit adopted by any one of claims 1 to 4 comprises 3 sampling units.
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CN202211177758.3A CN115541961A (en) | 2022-09-27 | 2022-09-27 | Multi-path positive and negative pulse current synchronous sampling circuit |
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CN202211177758.3A CN115541961A (en) | 2022-09-27 | 2022-09-27 | Multi-path positive and negative pulse current synchronous sampling circuit |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116643080A (en) * | 2023-05-11 | 2023-08-25 | 昆山迈致治具科技有限公司 | Pulse type direct current sampling and measuring device |
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- 2022-09-27 CN CN202211177758.3A patent/CN115541961A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116643080A (en) * | 2023-05-11 | 2023-08-25 | 昆山迈致治具科技有限公司 | Pulse type direct current sampling and measuring device |
CN116643080B (en) * | 2023-05-11 | 2023-11-10 | 昆山迈致治具科技有限公司 | Pulse type direct current sampling and measuring device |
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