CN203479876U - Digital multimeter based on PXI/PCI bus - Google Patents

Digital multimeter based on PXI/PCI bus Download PDF

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CN203479876U
CN203479876U CN201320561129.0U CN201320561129U CN203479876U CN 203479876 U CN203479876 U CN 203479876U CN 201320561129 U CN201320561129 U CN 201320561129U CN 203479876 U CN203479876 U CN 203479876U
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resistance
signal
negative
positive
output
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郭恩全
孙金宝
王江
郭建
杨朋
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Shaanxi Hitech Electronic Co Ltd
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Shaanxi Hitech Electronic Co Ltd
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Abstract

The utility model provides a digital multimeter based on a PXI/PCI bus. The digital multimeter comprises a digital module and a simulation module. The digital module comprises a FPGA, a PXI interface, an external trigger, an isolation power supply and an isolation circuit. The isolation circuit, the PXI interface and the external trigger are connected with the FPGA. An output terminal of the PXI interface is connected with an input terminal of the isolation power supply. The simulation module comprises an input terminal, a protection circuit, a signal route, resistor measurement, direct voltage measurement, alternating and direct current measurement, alternating voltage measurement, multipath selection, a conditioning circuit, a reference and an AD conversion circuit. The input terminal, the protection circuit and the signal route are successively connected. The size of multimeter of the utility model is small, noises are low and precision is high so that system integration is convenient. Simultaneously, user exploitation cost is effectively reduced so that the digital multimeter possesses a high practical engineering value.

Description

A kind of digital multimeter based on PXI/PCI bus
Technical field
The utility model belongs to electronic instrumentation, relates to a kind of digital multimeter, relates in particular to a kind of digital multimeter based on PXI/PCI bus.
Background technology
At present, digital multimeter manufacturer on the market mainly contains Fluke, Keithley, Agilent tri-major companies, and conventional digital multimeter is mainly desk type digital universal meter and hand-held digital multimeter.
Mainly there is following problem in existing desk type digital universal meter: 1, volume and weight is larger, is not easy to use; 2, be not easy to the system integration, 3, back noise is large.
Mainly there is following problem in existing hand-held digital multimeter: 1, continuous power is not enough; 2, figure place is low, measuring accuracy is poor; 3, back noise is large.
Summary of the invention
The problem existing for existing digital multimeter, the utility model proposes a kind of digital multimeter based on PXI/PCI bus, and this digital multimeter volume is little, noise is low, precision is high, be convenient to the system integration.Meanwhile, effectively reduce User Exploitation cost, make digital multimeter there is very high engineering practical value.
Technical solution of the present utility model is:
The utility model provides a kind of digital multimeter based on PXI/PCI bus, and its special character is: comprise digital module and analog module; Described digital module comprises FPGA, PXI interface, external trigger, insulating power supply and buffer circuit; Described buffer circuit, PXI interface, external trigger are all connected with FPGA; Described PXI interface output terminal is connected with the input end of insulating power supply;
Described analog module comprises input end, holding circuit, signal route, resistance measurement, DC voltage measurement, alterating and direct current flow measurement, ac voltage measurement, multichannel selection, modulate circuit, benchmark and A/D convertor circuit; Described input end, holding circuit and signal route are connected successively;
The output terminal of described signal route is connected with the input end of DC voltage measurement, alterating and direct current flow measurement and ac voltage measurement respectively; The output terminal of described DC voltage measurement, alterating and direct current flow measurement and ac voltage measurement is connected with the input end that multichannel is selected respectively; The output terminal that described multichannel is selected is connected with the input end of modulate circuit; The output terminal of described modulate circuit is connected with the input end of A/D convertor circuit; The output terminal of described benchmark is connected with the input end of A/D convertor circuit, resistance measurement respectively; The output terminal of described resistance measurement is connected with the input end of signal route; Described buffer circuit is connected with A/D convertor circuit; Described insulating power supply is powered to analog module;
Above-mentioned modulate circuit comprises signal input circuit and signal output apparatus; Described signal input circuit comprises positive signal input block, negative signal input block and the first interlaminated resistance R-1; Described positive signal input block comprises positive signal amplifier U1, positive signal change-over switch SW-1 and positive signal resistance unit; Described negative signal input block comprises negative signal amplifier U2, negative signal change-over switch SW-2 and negative signal resistance unit; Described positive signal resistance unit comprises the positive signal resistance R J-1 of N series connection; Described positive signal change-over switch SW-1 comprises N+1 input end and an output terminal; Described negative signal resistance unit comprises the negative signal resistance R J-2 of N series connection; Described negative signal change-over switch SW-2 comprises N+1 input end and an output terminal; N is more than or equal to 1 integer; The output terminal of one termination positive signal amplifier U1 of described positive signal resistance unit; The output terminal of one termination negative signal amplifier U2 of described negative signal resistance unit; The other end of described positive signal resistance unit is connected with the other end of negative signal resistance unit by the first interlaminated resistance R-1; Described N positive signal resistance R J-1 is serially connected in respectively between N+1 the input end of positive signal change-over switch SW-1; Described N negative signal resistance R J-2 is serially connected in respectively between N+1 the input end of negative signal change-over switch SW-2; The negative input of the output termination positive signal amplifier U1 of described positive signal change-over switch SW-1; The negative input of the output termination negative signal amplifier U2 of described negative signal change-over switch SW-2; Described positive signal input block and negative signal input block structural symmetry, parameter is consistent;
Above-mentioned signal output apparatus comprises positive signal output unit, negative signal output unit, the second interlaminated resistance R-2; Described positive signal output unit comprises positive signal amplifier U3, positive signal output resistance unit and output capacitance C1; Described negative signal output unit comprises negative signal amplifier U4, negative signal output resistance unit and output capacitance C2; Described positive signal output resistance unit comprises the positive anode signal output resistance RJ-3 of M series connection and the positive cathode signal output resistance RJ-4 of M series connection; Described negative signal output resistance unit comprises the negative anode signal output resistance RJ-5 of M series connection and the negative cathode signal output resistance RJ-6 of M series connection; M is more than or equal to 1 integer; The negative input of a termination positive signal amplifier U3 of described output capacitance C1; The output terminal of another termination positive signal amplifier U3 of described output capacitance C1; The positive cathode signal output resistance RJ-4 of described M series connection is in parallel with output capacitance C1; The negative input of a termination negative signal amplifier U4 of described output capacitance C2; Another termination of described output capacitance C2 connects the output terminal of negative signal amplifier U4; The negative cathode signal output resistance RJ-6 of described M series connection is in parallel with output capacitance C2; The electrode input end of a termination positive signal amplifier U3 of the positive anode signal output resistance RJ-3 of described M series connection; Another termination positive signal input block of the positive anode signal output resistance RJ-3 of described M series connection; The electrode input end of a termination negative signal amplifier U4 of the negative anode signal output resistance RJ-5 of described M series connection; Another termination Vcm of the negative anode signal output resistance RJ-5 of described M series connection; A termination negative signal input block of the positive cathode signal output resistance RJ-4 of described M series connection; The negative cathode signal output resistance RJ-6 of M the series connection of another termination of the positive cathode signal output resistance RJ-4 of described M series connection; The positive anode signal output resistance RJ-3 of described M series connection is connected with the negative cathode signal output resistance RJ-6 of M series connection by the second interlaminated resistance R-2; Described positive signal output unit is all consistent with negative signal output unit structure and parameter;
Above-mentioned positive signal change-over switch SW-1 and negative signal change-over switch SW-2 are mechanical switch, analog switch, wire jumper or relay;
Resistance in above-mentioned positive signal resistance unit, negative signal resistance unit and the first interlaminated resistance R-1 is conventional, electric-resistance, precision resistance, discrete resistor, network resistor;
Resistance in above-mentioned positive signal output resistance unit, negative signal output resistance unit and the second interlaminated resistance R-2 is conventional, electric-resistance, precision resistance, discrete resistor, network resistor.
Advantage of the present utility model:
1, the utility model is based on PXI/PCI interface, standard 3U size, and volume and weight is little, easy to carry and use;
2, the utility model is used in PCI/PXI cabinet, very convenient with compunication, convenient manipulate measurement data on computers;
3, noise is low, precision is high.This digital multimeter adopts unique circuit structure, can not only effectively reduce the back noise of board, and precision index is also improved accordingly simultaneously.
Accompanying drawing explanation
Fig. 1 is general structure schematic diagram of the present utility model;
Fig. 2 is the circuit theory diagrams of modulate circuit of the present utility model;
Fig. 3 is the circuit diagram of modulate circuit of the present utility model;
Fig. 4 is the another kind of circuit diagram of the signal input circuit in the utility model modulate circuit.
Embodiment
Referring to Fig. 1-Fig. 2, the utility model provides a kind of digital multimeter based on PXI/PCI bus, comprises digital module and analog module; Digital module comprises FPGA, PXI interface, external trigger, insulating power supply and buffer circuit; Buffer circuit, PXI interface, external trigger are all connected with FPGA; PXI interface output terminal is connected with the input end of insulating power supply; Analog module comprises input end, holding circuit, signal route, resistance measurement, DC voltage measurement, alterating and direct current flow measurement, ac voltage measurement, multichannel selection, modulate circuit, benchmark and A/D convertor circuit; Described input end, holding circuit and signal route are connected successively; The output terminal of signal route is connected with the input end of DC voltage measurement, alterating and direct current flow measurement and ac voltage measurement respectively; The output terminal of DC voltage measurement, alterating and direct current flow measurement and ac voltage measurement is connected with the input end that multichannel is selected respectively; The output terminal that multichannel is selected is connected with the input end of modulate circuit; The output terminal of modulate circuit is connected with the input end of A/D convertor circuit; The output terminal of benchmark is connected with the input end of A/D convertor circuit, resistance measurement respectively; The output terminal of resistance measurement is connected with the input end of signal route; Buffer circuit is connected with A/D convertor circuit; Insulating power supply is powered to analog module.
Modulate circuit comprises signal input circuit and signal output apparatus; Signal input circuit comprises positive signal input block, negative signal input block and the first interlaminated resistance R-1; Positive signal input block comprises positive signal amplifier U1, positive signal change-over switch SW-1 and positive signal resistance unit; Negative signal input block comprises negative signal amplifier U2, negative signal change-over switch SW-2 and negative signal resistance unit; Positive signal resistance unit comprises the positive signal resistance R J-1 of N series connection; Positive signal change-over switch SW-1 comprises N+1 input end and an output terminal; Negative signal resistance unit comprises the negative signal resistance R J-2 of N series connection; Negative signal change-over switch SW-2 comprises N+1 input end and an output terminal; N is more than or equal to 1 integer; The output terminal of one termination positive signal amplifier U1 of positive signal resistance unit; The output terminal of one termination negative signal amplifier U2 of negative signal resistance unit; The other end of positive signal resistance unit is connected with the other end of negative signal resistance unit by the first interlaminated resistance R-1; N positive signal resistance R J-1 is serially connected in respectively between N+1 the input end of positive signal change-over switch SW-1; N negative signal resistance R J-2 is serially connected in respectively between N+1 the input end of negative signal change-over switch SW-2; The negative input of the output termination positive signal amplifier U1 of positive signal change-over switch SW-1; The negative input of the output termination negative signal amplifier U2 of negative signal change-over switch SW-2; Positive signal input block and negative signal input block structural symmetry, parameter is consistent.
Signal output apparatus comprises positive signal output unit, negative signal output unit, the second interlaminated resistance R-2; Positive signal output unit comprises positive signal amplifier U3, positive signal output resistance unit and output capacitance C1; Negative signal output unit comprises negative signal amplifier U4, negative signal output resistance unit and output capacitance C2; Positive signal output resistance unit comprises the positive anode signal output resistance RJ-3 of M series connection and the positive cathode signal output resistance RJ-4 of M series connection; Negative signal output resistance unit comprises the negative anode signal output resistance RJ-5 of M series connection and the negative cathode signal output resistance RJ-6 of M series connection; M is more than or equal to 1 integer; The negative input of a termination positive signal amplifier U3 of output capacitance C1; The output terminal of another termination positive signal amplifier U3 of output capacitance C1; The positive cathode signal output resistance RJ-4 of M series connection is in parallel with output capacitance C1; The negative input of a termination negative signal amplifier U4 of output capacitance C2; Another termination of output capacitance C2 connects the output terminal of negative signal amplifier U4; The negative cathode signal output resistance RJ-6 of M series connection is in parallel with output capacitance C2; The electrode input end of a termination positive signal amplifier U3 of the positive anode signal output resistance RJ-3 of M series connection; Another termination positive signal input block of the positive anode signal output resistance RJ-3 of M series connection; The electrode input end of a termination negative signal amplifier U4 of the negative anode signal output resistance RJ-5 of M series connection; Another termination Vcm of the negative anode signal output resistance RJ-5 of M series connection; A termination negative signal input block of the positive cathode signal output resistance RJ-4 of M series connection; The negative cathode signal output resistance RJ-6 of M the series connection of another termination of the positive cathode signal output resistance RJ-4 of M series connection; The positive anode signal output resistance RJ-3 of M series connection is connected with the negative cathode signal output resistance RJ-6 of M series connection by the second interlaminated resistance R-2; Positive signal output unit is all consistent with negative signal output unit structure and parameter.
Positive signal change-over switch SW-1 and negative signal change-over switch SW-2 are mechanical switch, analog switch, wire jumper or relay.
Resistance in positive signal resistance unit, negative signal resistance unit and the first interlaminated resistance R-1 is conventional, electric-resistance, precision resistance, discrete resistor, network resistor.
Resistance in positive signal output resistance unit, negative signal output resistance unit and the second interlaminated resistance R-2 is conventional, electric-resistance, precision resistance, discrete resistor, network resistor.
Positive signal change-over switch and negative signal change-over switch can be Split type structures, and optimum is integrative-structure, two switches move simultaneously and switching result consistent.
The utility model provides a kind of digital multimeter based on PXI/PCI bus.Can realize the measurement to DC voltage, alternating voltage, DC current, alternating current, frequency/period, two lines/four-wire ohm, diode (connectedness).For combined-voltage, measure, be divided into 100mV, 1V, 10V, 100V and 300V totally 5 ranges.DC current measurement is divided into 10mA, 100mA, 1A and 3A totally 4 ranges, and ac current measurement is divided into 1A and two ranges of 3A.For resistance test, there are 100 Ω, 1k Ω, 10k Ω, 100k Ω, 1M Ω, 10M Ω and 100M Ω totally 7 ranges.Continuity testing is equivalent to resistance measurement in fact, the similar resistance measurement of diode measurement principle, and voltage range is fixed as 1VDC, and measured value, in 0.3V~0.8V, is forward conduction.And there is the functions such as automatic range, program control calibration, overload protection.
This module adopts low noise insulating power supply technology, high-precision A/D switch technology, and precision resistance is measured the technology such as network technology and software algorithm and has been realized the requirement of user to high-acruracy survey.Meanwhile, this module also possesses digitizer function, can carry out Real-time Collection and demonstration to tested waveform, is widely used in high precision measuring system.
Referring to Fig. 1, the utility model is comprised of Digital and analog two parts;
Wherein, numerical portion comprises external trigger, FPGA, PXI interface, insulating power supply and buffer circuit.Numerical portion is realized Trigger Function, the steering logic of PXI bus, control and power supply to simulation part.
The function of various piece is as follows:
A) FPGA is the implementation center of numerical portion, completes the interface to PXI, the control of external trigger and buffer circuit.Complete the co-ordination between each functional module simultaneously;
B) external trigger is subject to the control of FPGA, can send also and can receive trigger pip, is mainly used to synchronous board external logic;
C) insulating power supply, from the power taking of PXI interface circuit, for whole simulation all modules partly provide direct supply, is isolated between the input of insulating power supply and output;
D) buffer circuit is subject to the control of FPGA, and the duty according to the instruction configuration simulation part AD modular converter of FPGA receives the data that AD modular converter collects simultaneously.
Simulation part completes conditioning and the collection of simulating signal, comprises input end, holding circuit, and signal route, resistance measurement, DC voltage measurement, alterating and direct current flow measurement, ac voltage measurement, multichannel is selected, modulate circuit, benchmark, A/D convertor circuit.The function of various piece is as follows:
A) input end: be signal foremost, signal enters multimeter from input end, then enters the holding circuit of rear class;
B) holding circuit: complete overvoltage protection, overcurrent protection to input signal, then signal is sent into signal routing module;
C) signal route: the setting according to user to measurement function, the signal of holding circuit output is correspondingly sent into the resistance measurement of rear class, DC voltage measurement, alterating and direct current flow measurement, alternating voltage is surveyed module, during resistance measurement, be wherein that resistance measuring module is given signal routing module by signal, because need a current source output during resistance measurement;
D) resistance measurement: be used for carrying out two lines, four-wire ohm measurement, when user sets resistance measurement function, signal routing module will be communicated with resistance measuring module.Resistance measuring module needs base modules that a stable reference voltage is provided;
C) DC voltage measurement: be used for carrying out DC voltage measurement, when user sets DC voltage measurement function, signal routing module will be communicated with DC voltage measurement module.DC voltage measurement module is exported to multichannel by signal and is selected module;
D) alterating and direct current flow measurement: be used for exchanging, DC current measurement, when user sets interchange, DC current measurement function, signal routing module will with exchange, DC current measurement module is communicated with.Alterating and direct current flow measurement module is exported to multichannel by signal and is selected module;
E) ac voltage measurement: be used for carrying out ac voltage measurement, when user sets ac voltage measurement function, signal routing module will be communicated with ac voltage measurement module.Ac voltage measurement module is exported to multichannel by signal and is selected module;
F) multichannel is selected: according to user's setting, select accordingly DC voltage measurement, and alterating and direct current flow measurement, the Voltage-output of ac voltage measurement module, and give modulate circuit by voltage signal
G) modulate circuit: receive the output signal that multichannel is selected module, and signal condition is arrived in the range ability of A/D convertor circuit, then give A/D convertor circuit by signal;
H) benchmark: be A/D convertor circuit, resistance measuring module provides the voltage signal of high precision high stability degree;
I) A/D convertor circuit: be used for the simulating signal of acquisition and conditioning circuit output, and simulating signal is converted to digital signal, give FPGA by buffer circuit, A/D convertor circuit needs base modules that stable voltage signal is provided.
Referring to Fig. 3-Fig. 4, be modulate circuit theory diagram, this modulate circuit is instrument amplifier circuit structure, has the feature of high input impedance and high cmrr, circuit structure symmetry, is conducive to eliminate common-mode noise and temperature is floated, thereby reaches low noise and Low Drift Temperature.
Generally, AD acquisition chip all can have high frequency sampling noiset, and this noise can affect preamplifying circuit, can make precision amplify, system linear degree and noise variation.Near AD, place electric capacity, can average current pulse, reflection and vibration.And general high precision operating amplifier can only drive the electric capacity of hundreds of pF, the circuit structure of this modulate circuit, is conducive to drive large electric capacity, can drive the large electric capacity of uF level, thereby reduces the sampling noiset of AD.
Number in the figure is the resistance of RJ, and R is precision resistance, is not limited to discrete resistor, and also network resistor etc., decisive action to the gain of circuit and warm levitating.A, B, C, D is four operational amplifiers.Circuit is divided into two-stage, and function at different levels is as follows:
A) first order
The first order is the input stage of modulate circuit, and the circuit structure of the first order is symmetrical, for typical instrument amplifier structure, can pass through change-over switch SW, realizes the switching of gain.First order circuit structure can not introduced gain by the error of switch internal resistance, because switch is connected with the negative terminal of operational amplifier A and B, can thinks and not have electric current to flow through.
SW is the switch of broad sense, can be mechanical switch, analog switch, wire jumper, the components and parts that relay etc. can switching signal.In Fig. 2, take difference analogue switch as example, and there are A and B double switch in its inside.Switch A comprises DA, S1A, S2A, the several pins of S3A; Switch B comprises DB, S1B, S2B, S3B pin.Have three kinds of states, state 1:DA is communicated with S1A, and DB is communicated with S1B simultaneously; State 2:DA is communicated with S2A, and DB is communicated with S2B simultaneously; State 3:DA is communicated with S3A, and DB is communicated with S3B simultaneously.
Referring to Fig. 3,5 resistance of take in figure are example, can realize 3 kinds of gains, resistance R J2=RJ4 wherein, and RJ3=RJ5, is a kind of circuit structure of symmetry.Also can change the number of resistance, change the number of gain, if Fig. 4 is the situation of two kinds of gains, Fig. 3 compares with Fig. 4, has removed resistance R J3 and RJ5, the corresponding number of states that reduces simulation.Identical reason, the number of increase resistance, also can realize the increase of gain quantity, and reason is equivalent to change into three kinds of gains Fig. 3 from two kinds of gains of Fig. 4.
In Fig. 3
When SW is operated in " state 1 ", SW is switched to a1 and b1, and gaining is:
0.5 RJ 1 + RJ 2 + RJ 3 0.5 RJ 1 ;
When SW is operated in " state 2 ", SW is switched to a2 and b2, and gaining is:
0.5 RJ 1 + RJ 2 + RJ 3 0.5 RJ 1 + RJ 2 ;
When SW is operated in " state 3 ", SW is switched to a3 and b3, and gaining is:
0.5 RJ 1 + RJ 2 + RJ 3 0.5 RJ 1 + RJ 2 + RJ 3 = 1 .
For example: realize 1,10,100 3 kinds of gains, resistance R J1 selects 400 Ω; RJ2, RJ4 selects 1.8k Ω; RJ3, RJ5 selects 18k Ω.By formula above, can be calculated three gains as follows:
0.5 * 400 + 1800 + 18000 0.5 * 400 = 20000 200 = 100 ,
0.5 * 400 + 1800 + 18000 0.5 * 400 + 1800 = 20000 2000 = 10 ,
0.5 * 400 + 1800 + 18000 0.5 * 400 + 1800 + 18000 = 1 .
The first order both can realize differential signal input, also can realize single-ended signal input, in Fig. 3, with differential signal, was input as example, i.e. Vi+ in figure and Vi-, when input signal is while being single-ended, receive Vi-with reference on the ground.If the gain of the first order switches to G, the first order is output as G * (V so i+-V i-), during single-ended input, think that Vi-is 0.Signal is amplified into the second level through the first order.
B) second level
The output signal that the second level receives the first order, realizes the decay of signal, common mode voltage stack, difference output.The second level is by resistance R J6, RJ7, and RJ8, RJ9, RJ10, RJ11, R1, R2, capacitor C 1, C2 and operational amplifier C and D form.
R1 in this grade of circuit, R2, C1, the circuit structure of C2 is beneficial to and drives large electric capacity, thereby reduces the sampling noiset of AD.R1, R2, C1, C2 is on not impact of attenuation multiple.Capacitor C 1, the selection of C2 will meet the bandwidth requirement of whole circuit, and C1 and RJ9 form RC low-pass filter, and C2 and RJ10 form RC low-pass filter, and the upper cut-off frequency of these two low-pass filters all will adapt with the bandwidth of whole amplifying circuit.Resistance R 1, R2 plays the effect of isolation resistance, general resistance is less than 100 Ω, in most cases 10 Ω can meet the demands, concrete numerical value when reality is debugged, according to the capacitance size of whole drives, the parameter of operational amplifier C and D and determining.
Attenuation multiple is by precision resistance RJ6, RJ7, and RJ8, RJ9 determines, must meet RJ6=RJ8, RJ7=RJ9, attenuation multiple is
Figure BDA0000380773800000101
for example: if 0.2 times of error is wanted in the second level, the optional 1k Ω of RJ6 and RJ8 so, the optional 5k Ω of RJ7 and RJ9.
RJ10, RJ11 and operational amplifier D realize the stack of common mode voltage, must meet RJ10=RJ11.Wherein Vcm is common mode voltage, and resistance R 3 is optional resistance.
The second level is output as differential signal Vo+ and Vo-, and common mode voltage is Vcm.Can directly connect rear class AD acquisition chip.
Remove RJ10, RJ11, R2, R3, C2, operational amplifier D and common mode voltage Vcm, and Vo-is received with reference on the ground, can realize Single-end output.
The gain of whole modulate circuit is determined jointly by the first order and second level circuit.For example the gain of the first order is 1,10,100, the second level decay to 0.2, the gain of so whole modulate circuit is 0.2,2,20.

Claims (6)

1. the digital multimeter based on PXI/PCI bus, is characterized in that: comprise digital module and analog module; Described digital module comprises FPGA, PXI interface, external trigger, insulating power supply and buffer circuit; Described buffer circuit, PXI interface, external trigger are all connected with FPGA; Described PXI interface output terminal is connected with the input end of insulating power supply;
Described analog module comprises input end, holding circuit, signal route, resistance measurement, DC voltage measurement, alterating and direct current flow measurement, ac voltage measurement, multichannel selection, modulate circuit, benchmark and A/D convertor circuit; Described input end, holding circuit and signal route are connected successively;
The output terminal of described signal route is connected with the input end of DC voltage measurement, alterating and direct current flow measurement and ac voltage measurement respectively; The output terminal of described DC voltage measurement, alterating and direct current flow measurement and ac voltage measurement is connected with the input end that multichannel is selected respectively; The output terminal that described multichannel is selected is connected with the input end of modulate circuit; The output terminal of described modulate circuit is connected with the input end of A/D convertor circuit; The output terminal of described benchmark is connected with the input end of A/D convertor circuit, resistance measurement respectively; The output terminal of described resistance measurement is connected with the input end of signal route; Described buffer circuit is connected with A/D convertor circuit; Described insulating power supply is powered to analog module.
2. the digital multimeter based on PXI/PCI bus according to claim 1, is characterized in that: described modulate circuit comprises signal input circuit and signal output apparatus;
Described signal input circuit comprises positive signal input block, negative signal input block and the first interlaminated resistance R-1;
Described positive signal input block comprises positive signal amplifier U1, positive signal change-over switch SW-1 and positive signal resistance unit;
Described negative signal input block comprises negative signal amplifier U2, negative signal change-over switch SW-2 and negative signal resistance unit;
Described positive signal resistance unit comprises the positive signal resistance R J-1 of N series connection; Described positive signal change-over switch SW-1 comprises N+1 input end and an output terminal; Described negative signal resistance unit comprises the negative signal resistance R J-2 of N series connection; Described negative signal change-over switch SW-2 comprises N+1 input end and an output terminal; N is more than or equal to 1 integer;
The output terminal of one termination positive signal amplifier U1 of described positive signal resistance unit; The output terminal of one termination negative signal amplifier U2 of described negative signal resistance unit; The other end of described positive signal resistance unit is connected with the other end of negative signal resistance unit by the first interlaminated resistance R-1;
Described N positive signal resistance R J-1 is serially connected in respectively between N+1 the input end of positive signal change-over switch SW-1;
Described N negative signal resistance R J-2 is serially connected in respectively between N+1 the input end of negative signal change-over switch SW-2;
The negative input of the output termination positive signal amplifier U1 of described positive signal change-over switch SW-1;
The negative input of the output termination negative signal amplifier U2 of described negative signal change-over switch SW-2;
Described positive signal input block and negative signal input block structural symmetry, parameter is consistent.
3. the digital multimeter based on PXI/PCI bus according to claim 2, is characterized in that: described signal output apparatus comprises positive signal output unit, negative signal output unit, the second interlaminated resistance R-2;
Described positive signal output unit comprises positive signal amplifier U3, positive signal output resistance unit and output capacitance C1;
Described negative signal output unit comprises negative signal amplifier U4, negative signal output resistance unit and output capacitance C2;
Described positive signal output resistance unit comprises the positive anode signal output resistance RJ-3 of M series connection and the positive cathode signal output resistance RJ-4 of M series connection; Described negative signal output resistance unit comprises the negative anode signal output resistance RJ-5 of M series connection and the negative cathode signal output resistance RJ-6 of M series connection; M is more than or equal to 1 integer;
The negative input of a termination positive signal amplifier U3 of described output capacitance C1; The output terminal of another termination positive signal amplifier U3 of described output capacitance C1; The positive cathode signal output resistance RJ-4 of described M series connection is in parallel with output capacitance C1;
The negative input of a termination negative signal amplifier U4 of described output capacitance C2; Another termination of described output capacitance C2 connects the output terminal of negative signal amplifier U4; The negative cathode signal output resistance RJ-6 of described M series connection is in parallel with output capacitance C2;
The electrode input end of a termination positive signal amplifier U3 of the positive anode signal output resistance RJ-3 of described M series connection; Another termination positive signal input block of the positive anode signal output resistance RJ-3 of described M series connection;
The electrode input end of a termination negative signal amplifier U4 of the negative anode signal output resistance RJ-5 of described M series connection; Another termination Vcm of the negative anode signal output resistance RJ-5 of described M series connection;
A termination negative signal input block of the positive cathode signal output resistance RJ-4 of described M series connection; The negative cathode signal output resistance RJ-6 of M the series connection of another termination of the positive cathode signal output resistance RJ-4 of described M series connection;
The positive anode signal output resistance RJ-3 of described M series connection is connected with the negative cathode signal output resistance RJ-6 of M series connection by the second interlaminated resistance R-2;
Described positive signal output unit is all consistent with negative signal output unit structure and parameter.
4. the digital multimeter based on PXI/PCI bus according to claim 2, is characterized in that: described positive signal change-over switch SW-1 and negative signal change-over switch SW-2 are mechanical switch, analog switch, wire jumper or relay.
5. the digital multimeter based on PXI/PCI bus according to claim 2, is characterized in that: the resistance in described positive signal resistance unit, negative signal resistance unit and the first interlaminated resistance R-1 is conventional, electric-resistance, precision resistance, discrete resistor, network resistor.
6. the digital multimeter based on PXI/PCI bus according to claim 3, is characterized in that: the resistance in described positive signal output resistance unit, negative signal output resistance unit and the second interlaminated resistance R-2 is conventional, electric-resistance, precision resistance, discrete resistor, network resistor.
CN201320561129.0U 2013-07-03 2013-09-11 Digital multimeter based on PXI/PCI bus Expired - Fee Related CN203479876U (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103885417A (en) * 2014-03-24 2014-06-25 上海航天电子通讯设备研究所 AC and DC hybrid type excitation signal sending device based on PCI bus
CN104764944A (en) * 2014-12-12 2015-07-08 陕西海泰电子有限责任公司 Portable multifunctional tester integrated with display screen
CN105842509A (en) * 2016-03-18 2016-08-10 深圳市鼎阳科技有限公司 Universal meter and reading method
CN107907736A (en) * 2017-12-27 2018-04-13 广东东方电讯科技有限公司 Digitize non-linear simulation front end measuring circuit
CN111624385A (en) * 2019-02-28 2020-09-04 华东师范大学 Portable electrical measurement universal meter based on stm32 and working method thereof
CN114280520A (en) * 2021-11-12 2022-04-05 中国船舶重工集团公司第七0九研究所 Digital channel multi-parameter parallel calibration device of integrated circuit test system

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103885417A (en) * 2014-03-24 2014-06-25 上海航天电子通讯设备研究所 AC and DC hybrid type excitation signal sending device based on PCI bus
CN103885417B (en) * 2014-03-24 2017-03-08 上海航天电子通讯设备研究所 A kind of alternating current-direct current hybrid pumping signal dispensing device based on pci bus
CN104764944A (en) * 2014-12-12 2015-07-08 陕西海泰电子有限责任公司 Portable multifunctional tester integrated with display screen
CN105842509A (en) * 2016-03-18 2016-08-10 深圳市鼎阳科技有限公司 Universal meter and reading method
CN107907736A (en) * 2017-12-27 2018-04-13 广东东方电讯科技有限公司 Digitize non-linear simulation front end measuring circuit
CN111624385A (en) * 2019-02-28 2020-09-04 华东师范大学 Portable electrical measurement universal meter based on stm32 and working method thereof
CN114280520A (en) * 2021-11-12 2022-04-05 中国船舶重工集团公司第七0九研究所 Digital channel multi-parameter parallel calibration device of integrated circuit test system

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