CN211785771U - Current sampling circuit and fan driving system - Google Patents
Current sampling circuit and fan driving system Download PDFInfo
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- CN211785771U CN211785771U CN202020115603.7U CN202020115603U CN211785771U CN 211785771 U CN211785771 U CN 211785771U CN 202020115603 U CN202020115603 U CN 202020115603U CN 211785771 U CN211785771 U CN 211785771U
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Abstract
The utility model provides a current sampling circuit and fan actuating system, the first sampling interface, first level adjustment module and the first port of this circuit electricity in proper order are connected, and second sampling interface, second level adjustment module and second sampling port electricity in proper order are connected. The first level adjusting module and the second level adjusting module are arranged, so that the function of converting the voltage at the first sampling interface and the second sampling interface into the voltage at the first sampling port and the voltage at the second sampling port is realized, and a proper voltage reference is provided for sampling; meanwhile, the impedance of the first level adjusting module is symmetrical to the impedance of the second level adjusting module, and the impedance of the first sampling port is symmetrical to the impedance of the second sampling port, so that common-mode interference can be effectively inhibited; that is, the utility model provides a circuit is not using under the prerequisite that fortune was put, can filter the interference equally and gather the data of high accuracy, has both satisfied the user demand, can practice thrift the cost again.
Description
Technical Field
The utility model relates to an analog integrated circuit design field particularly, relates to a current sampling circuit and fan actuating system.
Background
With the development of information technology and semiconductor technology, Integrated Circuits (ICs) are widely used in various electronic devices to achieve small size, high speed, and low power consumption. The current detection circuit is used as an important module of an analog IC, and has been widely applied to current protection/monitoring equipment, programmable current sources, linear/switching power supplies, various chargers and battery fuel gauges.
At present, a core module of a current detection circuit mainly comprises a high-precision sampling resistor and a high-gain operational amplifier. The high-gain operational amplifier not only causes the power consumption of the circuit to be larger, but also has higher price, and does not meet the requirement that the commodity continuously pursues low cost.
SUMMERY OF THE UTILITY MODEL
In view of this, the utility model provides a current sampling circuit and fan driving system to solve the problem that how to realize electric current and/or voltage collection under the prerequisite without operational amplifier.
In a first aspect, an embodiment provides a current sampling circuit, including: the sampling module comprises a first sampling port and a second sampling port, the first level adjusting module and the first sampling port are sequentially and electrically connected, the second sampling port, the second level adjusting module and the second sampling port are sequentially and electrically connected, the impedance of the first level adjusting module is symmetrical to that of the second level adjusting module, and the impedance of the first sampling port is symmetrical to that of the second sampling port;
the first level adjustment module is used for converting a first voltage of the first sampling interface into a second voltage and transmitting the second voltage to the first sampling port;
the second level adjustment module is configured to convert a third voltage of the second sampling interface into a fourth voltage, and transmit the fourth voltage to the second sampling port;
the sampling module is used for synchronously acquiring the second voltage and the fourth voltage and determining a sampling current based on the second voltage and the fourth voltage.
The first level adjusting module and the second level adjusting module are arranged, so that the function of converting the voltages at the first sampling interface and the second sampling interface into the voltages at the first sampling port and the second sampling port is realized, and a proper voltage reference is provided for sampling; meanwhile, the impedance of the first level adjusting module is symmetrical to the impedance of the second level adjusting module, and the impedance of the first sampling port is symmetrical to the impedance of the second sampling port, so that common-mode interference can be effectively inhibited; that is, the utility model provides a circuit is not using under the prerequisite that fortune was put, can filter the interference equally and gather the data of high accuracy, has both satisfied the user demand, can practice thrift the cost again.
In an optional embodiment, the first level adjustment module includes a first voltage division unit, the second level adjustment module includes a second voltage division unit, the first sampling interface, the first voltage division unit, and the first sampling port are electrically connected in sequence, and the second sampling interface, the second voltage division unit, and the second sampling port are electrically connected in sequence;
the first voltage division unit is used for converting a first voltage of the first sampling interface into a second voltage and transmitting the second voltage to the first sampling port;
the second voltage division unit is configured to convert a third voltage of the second sampling interface into a fourth voltage, and transmit the fourth voltage to the second sampling port.
In an optional implementation manner, the first voltage dividing unit includes a first resistor and a second resistor, the second voltage dividing unit includes a third resistor and a fourth resistor, one end of the power supply, one end of the second resistor and one end of the first resistor are sequentially electrically connected, the other end of the first resistor is electrically connected to the first sampling interface, the first sampling port is electrically connected between the first resistor and the second resistor, one end of the power supply, one end of the fourth resistor and one end of the third resistor are sequentially electrically connected, the other end of the third resistor is electrically connected to the second sampling interface, and the second sampling port is electrically connected between the third resistor and the fourth resistor.
In an optional implementation manner, the first level adjustment module further includes a first filtering unit, the second level adjustment module further includes a second filtering unit, one end of the first filtering unit is electrically connected between the first resistor and the second resistor, the other end of the first filtering unit is electrically connected to the first sampling port, one end of the second filtering unit is electrically connected between the third resistor and the fourth resistor, and the other end of the second filtering unit is electrically connected to the second sampling port.
Understandably, by arranging the first filtering unit and the second filtering unit, differential mode interference in a loop can be effectively filtered, so that sampling precision is improved, and errors are reduced.
In an optional implementation manner, the first filtering unit includes a fifth resistor and a first capacitor, the second filtering unit includes a sixth resistor and a second capacitor, one end of the fifth resistor is connected in series with the first capacitor and then grounded, the other end of the fifth resistor is electrically connected between the first resistor and the second resistor, one end of the sixth resistor is connected in series with the second capacitor and then grounded, the other end of the sixth resistor is electrically connected between the third resistor and the fourth resistor, the first sampling port is electrically connected between the fifth resistor and the first capacitor, and the second sampling port is electrically connected between the sixth resistor and the second capacitor.
In an alternative embodiment, the first resistor and the third resistor have the same impedance, the second resistor and the fourth resistor have the same impedance, the fifth resistor and the sixth resistor have the same impedance, and the first capacitor and the second capacitor have the same impedance.
In an optional embodiment, the current sampling circuit further includes a filter capacitor, one end of the filter capacitor is electrically connected between the first resistor and the fifth resistor, and the other end of the filter capacitor is electrically connected between the third resistor and the sixth resistor.
In an optional embodiment, the current sampling circuit further includes a first voltage clamping module electrically connected to the first level adjustment module, and a second voltage clamping module electrically connected to the second level adjustment module.
It can be understood that, by arranging the first voltage clamping module and the second voltage clamping module, the voltages of the first sampling port and the second sampling port can be clamped in a safe range, and the sampling module is prevented from being damaged by large current.
In an alternative embodiment, the first voltage clamping module includes a first diode, a second diode, the second voltage clamping module includes a third diode and a fourth diode, a power supply is electrically connected to a cathode of the first diode, an anode of the first diode is electrically connected to a cathode of the second diode, an anode of the second diode is grounded, the first level adjustment module is electrically connected between the first diode and the second diode, the power supply is electrically connected to a cathode of the third diode, an anode of the third diode is electrically connected to a cathode of the fourth diode, an anode of the fourth diode is grounded, and the second level adjustment module is electrically connected between the third diode and the fourth diode.
In a second aspect, an embodiment provides a fan driving system, where the fan driving system includes a driving circuit and the current sampling circuit according to any one of the foregoing embodiments, where the current sampling circuit is electrically connected to the driving circuit.
In an alternative embodiment, the drive circuit (210) comprises an inverter module comprising a first leg, a first sampling resistor in series with the first leg, a second leg, and a second sampling resistor in series with the second leg, the other ends of the first sampling resistor and the second sampling resistor are both grounded, the fan driving system (200) comprises two current sampling circuits (100), the first sampling interface (110) of one of the current sampling circuits (100) is electrically connected with one end of the first sampling resistor, the first sampling interface (110) of the other one of the current sampling circuits (100) is electrically connected with one end of the second sampling resistor, and the two current sampling circuits (100) share the same second level adjustment module (140) and are electrically connected with the other ends of the first sampling resistor and the second sampling resistor.
Drawings
Fig. 1 is a circuit structure block diagram of the current sampling circuit provided by the present invention.
Fig. 2 is a circuit block diagram of a current sampling circuit provided by the present invention.
Fig. 3 is a circuit diagram of the current sampling circuit provided by the present invention.
Fig. 4 is a circuit structure block diagram of the fan driving system provided by the present invention.
Fig. 5 is a circuit diagram of a fan drive system.
Icon: 100-a current sampling circuit; 110-a first sampling interface; 120-a second sampling interface; 130-a first level adjustment module; 132-a first voltage dividing unit; 134-a first filtering unit; 140-a second level adjustment module; 142-a second voltage dividing unit; 144-a second filtering unit; 150-a sampling module; 152-a first sampling port; 154-a second sampling port; 160-a first voltage clamping module; 170-a second voltage clamping module; 200-a fan drive system; 210-drive circuit.
Detailed Description
In the prior art, a power converter generally adopts a digital control mode, and in a power circuit which utilizes current to form closed-loop control and protection, current sampling is the basis of the normal operation of the whole circuit. In the power circuit, the most common method for sampling the current is to detect the voltage across a sampling resistor connected in series in the main power circuit to obtain the corresponding current value. However, the current sampling is affected by the problems of common mode interference, small signal strength and the like, the operational amplifiers are used for realizing the signal amplification and impedance matching functions of the current sampling, and in some occasions, two or more operational amplifiers need to be cascaded to enhance the functions. However, the high-gain operational amplifier not only causes the power consumption of the circuit to be larger, but also has higher price, and is not in line with the requirement of continuously pursuing low cost of the product. Therefore, the utility model provides a current sampling circuit and fan actuating system to realize the collection of electric current and/or voltage under the prerequisite that does not use operational amplifier.
In order to make the aforementioned objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.
First embodiment
Fig. 1 is a block diagram of a circuit structure of a current sampling circuit 100 according to the present invention. The current sampling circuit 100 includes a first sampling interface 110, a second sampling interface 120, a first level adjustment module 130, a second level adjustment module 140, a sampling module 150, a first voltage clamping module 160, and a second voltage clamping module 170. The sampling module 150 includes a first sampling port 152 and a second sampling port 154, the first sampling interface 110, the first level adjustment module 130 and the first sampling port 152 are electrically connected in sequence, the second sampling interface 120, the second level adjustment module 140 and the second sampling port 154 are electrically connected in sequence, the first voltage clamping module 160 is electrically connected to the first level adjustment module 130, and the second voltage clamping module 170 is electrically connected to the second level adjustment module 140.
Generally, the most common method of current sampling is to obtain the corresponding current value by the voltage across a sampling resistor connected in series in the main power loop. Therefore, the first sampling interface 110 and the second sampling interface 120 are respectively located at two ends of the sampling resistor, and are used for connecting voltages at two ends of the sampling resistor.
In order to reduce the loss of the sampling resistor, the resistance of the sampling resistor is usually in the range of 1m Ω to 1 Ω.
The first level adjustment module 130 and the second level adjustment module 140 are used to convert the voltage across the sampling resistor into a voltage meeting the requirement of the sampling module 150 for the input voltage. Specifically, the first level adjustment module 130 is configured to convert a first voltage of the first sampling interface 110 into a second voltage and transmit the second voltage to the first sampling port 152, and the second level adjustment module 140 is configured to convert a third voltage of the second sampling interface 120 into a fourth voltage and transmit the fourth voltage to the second sampling port 154.
It can be understood that, since the sampling resistor is smaller, the voltage difference between the first sampling interface 110 and the second sampling interface 120 is smaller, that is, the voltage difference between the first voltage and the third voltage is smaller, and therefore, the voltage value needs to be adjusted by the first level adjustment module 130 and the second level adjustment module 140 to achieve the effect of amplifying the voltage difference.
In addition, it should be noted that the impedance of the first level adjustment module 130 is symmetrical to the impedance of the second level adjustment module 140 in the present invention. Because the first level adjustment module 130 and the second level adjustment module 140 have an impedance symmetry relationship, the relationship can effectively suppress common mode interference, thereby improving the accuracy of current sampling and reducing errors.
Specifically, please refer to fig. 2, which is a further circuit block diagram of the current sampling circuit 100 according to the present invention. The first level adjustment module 130 includes a first voltage division unit 132 and a first filtering unit 134, and the second level adjustment module 140 includes a second voltage division unit 142 and a second filtering unit 144. The first sampling interface 110, the first voltage dividing unit 132, the first filtering unit 134 and the first sampling port 152 are electrically connected in sequence, and the second sampling interface 120, the second voltage dividing unit 142, the second filtering unit 144 and the second sampling port 154 are electrically connected in sequence.
The order of the first voltage dividing means 132 and the first filtering means 134 may be changed, and the order of the second voltage dividing means 142 and the second filtering means 144 may be changed. That is, in another alternative embodiment, the connection relationship of the current sampling circuit 100 may be: the first sampling interface 110, the first filtering unit 134, the first voltage dividing unit 132 and the first sampling port 152 are electrically connected in sequence, and the second sampling interface 120, the second filtering unit 144, the second voltage dividing unit 142 and the second sampling port 154 are electrically connected in sequence.
The first voltage dividing unit 132 is configured to convert the first voltage of the first sampling interface 110 into a second voltage, and transmit the second voltage to the first sampling port 152; the second voltage dividing unit 142 is configured to convert the third voltage of the second sampling interface 120 into a fourth voltage and transmit the fourth voltage to the second sampling port 154.
Please refer to fig. 3, which is a circuit diagram of the current sampling circuit 100 according to the present invention. The first voltage dividing unit 132 includes a first resistor R1 and a second resistor R2, the second voltage dividing unit 142 includes a third resistor R3 and a fourth resistor R4, the power Vcc, one end of the second resistor R2 and one end of the first resistor R1 are electrically connected in sequence, the other end of the first resistor R1 is electrically connected to the first sampling interface 110, the first sampling port 152 is electrically connected between the first resistor R1 and the second resistor R2, the power Vcc, one end of the fourth resistor R4 and one end of the third resistor R3 are electrically connected in sequence, the other end of the third resistor R3 is electrically connected to the second sampling interface 120, and the second sampling port 154 is electrically connected between the third resistor R3 and the fourth resistor R4.
It is understood that the first resistor R1 and the second resistor R2 form a voltage divider circuit to convert the first voltage into the second voltage; the third resistor R3 and the fourth resistor R4 form another voltage divider circuit to convert the third voltage to the fourth voltage.
One end of the first filter unit 134 is electrically connected between the first resistor R1 and the second resistor R2, the other end of the first filter unit 134 is electrically connected to the first sampling port 152, one end of the second filter unit 144 is electrically connected between the third resistor R3 and the fourth resistor R4, and the other end of the second filter unit 144 is electrically connected to the second sampling port 154; the first filtering unit 134 and the second filtering unit 144 are used for filtering the interference signal.
As shown in fig. 3, the first filter unit 134 includes a fifth resistor R5 and a first capacitor C1, the second filter unit 144 includes a sixth resistor R6 and a second capacitor C2, one end of the fifth resistor R5 is connected in series with the first capacitor C1 and then grounded, the other end of the fifth resistor R5 is electrically connected between the first resistor R1 and the second resistor R2, one end of the sixth resistor R6 is connected in series with the second capacitor C2 and then grounded, the other end of the sixth resistor R6 is electrically connected between the third resistor R3 and the fourth resistor R4, the first sampling port 152 is electrically connected between the fifth resistor R5 and the first capacitor C1, and the second sampling port 154 is electrically connected between the sixth resistor R6 and the second capacitor C2.
It can be understood that the RC filter circuit formed by the first resistor R1, the fifth resistor R5 and the first capacitor C1, and the RC filter circuit formed by the third resistor R3, the sixth resistor R6 and the second capacitor C2 can effectively filter out differential mode interference in the circuit, so that the module can receive a relatively real current signal, so as to improve the accuracy of current sampling and reduce the error of the sampling result.
It should be noted that, in the current sampling circuit 100 provided by the present invention, there are two propagation paths for the common mode interference, one is the first level adjustment module 130 formed by the first resistor R1, the second resistor R2, the fifth resistor R5 and the first capacitor C1, and the other is the second level adjustment module 140 formed by the third resistor R3, the fourth resistor R4, the sixth resistor R6 and the second capacitor C2, and only if the impedance of the first level adjustment module 130 is symmetrical to the impedance of the second level adjustment module 140, the influence of the common mode interference on the signal sampling can be effectively suppressed.
It should be noted that, by making the sum of the impedances of the first resistor R1, the second resistor R2, the fifth resistor R5, and the first capacitor C1 equal to the sum of the impedances of the third resistor R3, the fourth resistor R4, the sixth resistor R6, and the second capacitor C2, the impedance of the first level adjustment module 130 and the impedance of the second level adjustment module 140 can be symmetric.
Therefore, in order to make the impedance of the first level adjustment module 130 symmetrical to the impedance of the second level adjustment module 140, in an alternative embodiment, the impedance of the first resistor R1 is equal to that of the third resistor R3, the impedance of the second resistor R2 is equal to that of the fourth resistor R4, the impedance of the fifth resistor R5 is equal to that of the sixth resistor R6, and the impedance of the first capacitor C1 is equal to that of the second capacitor C2.
It should be noted that the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 may be replaced by equivalent resistor networks. For example, if the first resistor R1 is 100 Ω, the first resistor R1 may be replaced by two series-connected resistors of 50 Ω.
Similarly, the first capacitor C1 and the second capacitor C2 may be replaced by equivalent capacitor networks. For example, if the first capacitor C1 is 660pF, the first capacitor C1 may be replaced by two capacitors connected in parallel at 1320 pF.
In an optional implementation manner, the present invention provides a current sampling circuit 100, which further includes a filter capacitor C3, wherein one end of the filter capacitor C3 is electrically connected between the first resistor R1 and the fifth resistor R5, and the other end of the filter capacitor C3 is electrically connected between the third resistor R3 and the sixth resistor R6.
It can be understood that, by providing the filter capacitor C3, a filter circuit can be formed with the first resistor R1 and the third resistor R3, further filtering the differential mode interference in the circuit.
The first voltage clamping module 160 is electrically connected to the first level adjustment module 130, and the second voltage clamping module 170 is electrically connected to the second level adjustment module 140.
By providing the first voltage clamping module 160 and the second voltage clamping module 170, the voltages of the first sampling port 152 and the second sampling port 154 can be clamped within a safe range, thereby preventing the sampling module 150 from being damaged by a large current.
With reference to fig. 3, the first voltage clamping module 160 includes a first diode D1 and a second diode D2, the second voltage clamping module 170 includes a third diode D3 and a fourth diode D4, the power Vcc is electrically connected to the cathode of the first diode D1, the anode of the first diode D1 is electrically connected to the cathode of the second diode D2, the anode of the second diode D2 is grounded, the first level adjustment module 130 is electrically connected between the first diode D1 and the second diode D2, the power Vcc is electrically connected to the cathode of the third diode D3, the anode of the third diode D3 is electrically connected to the cathode of the fourth diode D4, the anode of the fourth diode D4 is grounded, and the second level adjustment module 140 is electrically connected between the third diode D3 and the fourth diode D4.
The sampling module 150 is configured to synchronously acquire the second voltage and the fourth voltage, and determine a sampling current based on the second voltage and the fourth voltage.
In an alternative embodiment, referring to fig. 3, the sampling module 150 includes a first sampling port 152, a second sampling port 154, a first analog-to-digital conversion unit ADC1, a second analog-to-digital conversion unit ADC2, a first voltage holder S/H-a, a second voltage holder S/H-B, and a controller MCU, wherein the first sampling port 152, the first analog-to-digital conversion unit ADC1, the first voltage holder S/H-a, and the controller are electrically connected in sequence, and the second sampling port 154, the second analog-to-digital conversion unit ADC2, the second voltage holder S/H-B, and the controller MCU are electrically connected in sequence.
The first analog-to-digital conversion module ADC1 and the second analog-to-digital conversion unit ADC2 are configured to convert an analog signal into a digital signal, and the first voltage keeper S/H-a and the second voltage keeper S/H-B are configured to keep a level value of the digital signal, so as to facilitate acquisition by the controller MCU.
In an alternative embodiment, the impedance of the loop of the first sampling port 152, the first analog-to-digital conversion unit ADC1 and the first voltage holder S/H-a is symmetrical to the impedance of the loop of the second sampling port 154, the second analog-to-digital conversion unit ADC2 and the second voltage holder S/H-B, so that the common mode interference in the loop can be effectively filtered.
In an alternative embodiment, the first sampling port 152, the second sampling port 154, the first analog-to-digital conversion unit ADC1, the second analog-to-digital conversion unit ADC2, the first voltage keeper S/H-a, the second voltage keeper S/H-B and the controller MCU may be integrated into a single device, for example, a single chip. The first sampling port 152 and the second sampling port 154 may be input/output interfaces of a single chip.
In another alternative embodiment, the sampling module 150 may also include only one voltage keeper, which is electrically connected to both the first analog-to-digital converting unit ADC1 and the second analog-to-digital converting unit ADC2, and is used for simultaneously keeping the level values of the digital signals output by the first analog-to-digital converting unit ADC1 and the second analog-to-digital converting unit ADC 2.
The sampling current, the second voltage, and the fourth voltage satisfy the following equation:
where i is the sampling current u2Is a second voltage u4And G is a fourth voltage, G is a predetermined voltage division coefficient, and Rs is the resistance value of the sampling resistor.
The voltage division coefficient is related to the resistances of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6, and once the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 are determined, the voltage division coefficient can be determined. For example, if the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 are equal to each other, the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 are equal to each other
Second embodiment
The utility model also provides a fan actuating system 200, please refer to fig. 4, for the utility model provides a fan actuating system 200's circuit structure block diagram. Fan drive system 200 includes drive circuit 210 and current sampling circuit 100, and current sampling circuit 100 is connected with drive circuit 210 electricity.
In an alternative embodiment, the fan driving system 200 may include a current sampling circuit 100, and the sampling resistor is connected in parallel to two ends of the power source Vcc, so that the current sampling circuit 100 may collect the input current.
In another alternative embodiment, the fan driving system 200 may include two current sampling circuits 100 (as shown in fig. 5), wherein the driving circuit 210 includes an inverter module, and the inverter module includes a first bridge arm and a first bridge armFirst sampling resistor R with bridge arms connected in seriess1A second bridge arm and a second sampling resistor R connected in series with the second bridge arms2First sampling resistor Rs1And a second sampling resistor Rs2The other end of the current sampling circuit 100 is grounded, and the first sampling interface 110 and the first sampling resistor R of one of the current sampling circuits 100 are connected to grounds1Is electrically connected to the first sampling interface 110 of the other current sampling circuit 100 and the second sampling resistor Rs2Is electrically connected to the first sampling resistor R, the two current sampling circuits 100 share the same second level adjustment module 140s1And a second sampling resistor Rs2The other end of the first and second electrodes are electrically connected.
Understandably, the first sampling resistance R is acquired by one of the current sampling circuits 100s1The voltage difference between the two ends is used as the U-phase current of the motor, and the other current sampling circuit 100 is used for collecting a second sampling resistor Rs2The voltage difference between the two ends is used as the V-phase current of the motor, and then the W-phase current is calculated by utilizing the U-phase current and the V-phase current so as to realize the current loop adjustment in the motor control process.
It should be noted that the sampling modules 150 of different current sampling circuits 100 may be integrated into the same single chip, that is, one single chip may sample a plurality of currents at the same time.
To sum up, the utility model provides a current sampling circuit and fan actuating system, this circuit includes first sampling interface, the second sampling interface, first level adjustment module, second level adjustment module and sampling module, sampling module includes first sampling port and second sampling port, first sampling interface, first level adjustment module and first sampling port electricity in proper order are connected, the second sampling interface, second level adjustment module and second sampling port electricity in proper order are connected, the impedance of first level adjustment module and second level adjustment module's impedance symmetry, the impedance of first sampling port and the impedance symmetry of second sampling port. The first level adjusting module and the second level adjusting module are arranged, so that the function of converting the voltage at the first sampling interface and the second sampling interface into the voltage at the first sampling port and the voltage at the second sampling port is realized, and a proper voltage reference is provided for sampling; meanwhile, the impedance of the first level adjusting module is symmetrical to the impedance of the second level adjusting module, and the impedance of the first sampling port is symmetrical to the impedance of the second sampling port, so that common-mode interference can be effectively inhibited; that is, the utility model provides a circuit is not using under the prerequisite that fortune was put, can filter the interference equally and gather the data of high accuracy, has both satisfied the user demand, can practice thrift the cost again.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present invention, and the scope of the present invention is defined by the appended claims.
Claims (11)
1. A current sampling circuit (100), wherein the current sampling circuit (100) comprises: the sampling circuit comprises a first sampling interface (110), a second sampling interface (120), a first level adjustment module (130), a second level adjustment module (140) and a sampling module (150), wherein the sampling module (150) comprises a first sampling port (152) and a second sampling port (154), the first sampling interface (110), the first level adjustment module (130) and the first sampling port (152) are sequentially and electrically connected, the second sampling interface (120), the second level adjustment module (140) and the second sampling port (154) are sequentially and electrically connected, the impedance of the first level adjustment module (130) is symmetrical to the impedance of the second level adjustment module (140), and the impedance of the first sampling port (152) is symmetrical to the impedance of the second sampling port (154);
the first level adjustment module (130) is configured to convert a first voltage of the first sampling interface (110) into a second voltage and transmit the second voltage to the first sampling port (152);
the second level adjustment module (140) is configured to convert a third voltage of the second sampling interface (120) into a fourth voltage and transmit the fourth voltage to the second sampling port (154);
the sampling module (150) is used for synchronously acquiring the second voltage and the fourth voltage and determining a sampling current based on the second voltage and the fourth voltage.
2. The current sampling circuit (100) of claim 1, wherein the first level adjustment module (130) comprises a first voltage division unit (132), wherein the second level adjustment module (140) comprises a second voltage division unit (142), wherein the first sampling interface (110), the first voltage division unit (132), and the first sampling port (152) are electrically connected in sequence, and wherein the second sampling interface (120), the second voltage division unit (142), and the second sampling port (154) are electrically connected in sequence;
the first voltage division unit (132) is configured to convert a first voltage of the first sampling interface (110) into a second voltage and transmit the second voltage to the first sampling port (152);
the second voltage division unit (142) is configured to convert the third voltage of the second sampling interface (120) into a fourth voltage and transmit the fourth voltage to the second sampling port (154).
3. The current sampling circuit (100) of claim 2, wherein the first voltage dividing unit (132) comprises a first resistor and a second resistor, the second voltage dividing unit (142) comprises a third resistor and a fourth resistor, one end of the first resistor, the power source, the second resistor and one end of the second resistor are electrically connected in sequence, the other end of the first resistor is electrically connected with the first sampling interface (110), the first sampling port (152) is electrically connected between the first resistor and the second resistor, one end of the power source, the fourth resistor and one end of the third resistor are electrically connected in sequence, the other end of the third resistor is electrically connected with the second sampling interface (120), and the second sampling port (154) is electrically connected between the third resistor and the fourth resistor.
4. The current sampling circuit (100) of claim 3, wherein the first level adjustment module (130) further comprises a first filtering unit, wherein the second level adjustment module (140) further comprises a second filtering unit (144), wherein one end of the first filtering unit is electrically connected between the first resistor and the second resistor, the other end of the first filtering unit is electrically connected to the first sampling port (152), one end of the second filtering unit (144) is electrically connected between the third resistor and the fourth resistor, and the other end of the second filtering unit (144) is electrically connected to the second sampling port (154).
5. The current sampling circuit (100) of claim 4, wherein the first filtering unit comprises a fifth resistor and a first capacitor, the second filtering unit (144) comprises a sixth resistor and a second capacitor, one end of the fifth resistor is connected in series with the first capacitor and then grounded, the other end of the fifth resistor is electrically connected between the first resistor and the second resistor, one end of the sixth resistor is connected in series with the second capacitor and then grounded, the other end of the sixth resistor is electrically connected between the third resistor and the fourth resistor, the first sampling port (152) is electrically connected between the fifth resistor and the first capacitor, and the second sampling port (154) is electrically connected between the sixth resistor and the second capacitor.
6. The current sampling circuit (100) of claim 5, wherein the first resistor and the third resistor have equal impedance, the second resistor and the fourth resistor have equal impedance, the fifth resistor and the sixth resistor have equal impedance, and the first capacitor and the second capacitor have equal impedance.
7. The current sampling circuit (100) of claim 5, wherein the current sampling circuit (100) further comprises a filter capacitor, one end of the filter capacitor is electrically connected between the first resistor and the fifth resistor, and the other end of the filter capacitor is electrically connected between the third resistor and the sixth resistor.
8. The current sampling circuit (100) of any one of claims 1-7, wherein the current sampling circuit (100) further comprises a first voltage clamping module (160) and a second voltage clamping module (170), the first voltage clamping module (160) being electrically connected to the first level adjustment module (130), the second voltage clamping module (170) being electrically connected to the second level adjustment module (140).
9. The current sampling circuit (100) of claim 8, wherein the first voltage clamping module (160) comprises a first diode, a second diode, the second voltage clamping module (170) includes a third diode and a fourth diode, a power supply is electrically connected to a cathode of the first diode, the anode of the first diode is electrically connected with the cathode of the second diode, the anode of the second diode is grounded, the first level adjustment module (130) is electrically connected between the first diode and the second diode, a power supply is electrically connected with the cathode of the third diode, the anode of the third diode is electrically connected with the cathode of the fourth diode, the anode of the fourth diode is grounded, the second level adjustment module (140) is electrically connected between the third diode and the fourth diode.
10. A fan drive system (200), the fan drive system (200) comprising a drive circuit (210) and the current sampling circuit (100) of any of claims 1-9, the current sampling circuit (100) being electrically connected to the drive circuit (210).
11. The fan driving system (200) according to claim 10, wherein the driving circuit (210) comprises an inverter module, the inverter module comprises a first bridge arm, a first sampling resistor connected in series with the first bridge arm, a second bridge arm, and a second sampling resistor connected in series with the second bridge arm, the first sampling resistor and the second sampling resistor are both grounded, the fan driving system (200) comprises two current sampling circuits (100), a first sampling interface (110) of one current sampling circuit (100) is electrically connected to one end of the first sampling resistor, a first sampling interface (110) of the other current sampling circuit (100) is electrically connected to one end of the second sampling resistor, and the two current sampling circuits (100) share the same second level adjustment module (140), and is electrically connected with the other ends of the first sampling resistor and the second sampling resistor.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020115603.7U CN211785771U (en) | 2020-01-18 | 2020-01-18 | Current sampling circuit and fan driving system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202020115603.7U CN211785771U (en) | 2020-01-18 | 2020-01-18 | Current sampling circuit and fan driving system |
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| CN211785771U true CN211785771U (en) | 2020-10-27 |
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