CN217388685U - Analog signal acquisition circuit - Google Patents
Analog signal acquisition circuit Download PDFInfo
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- CN217388685U CN217388685U CN202220679418.XU CN202220679418U CN217388685U CN 217388685 U CN217388685 U CN 217388685U CN 202220679418 U CN202220679418 U CN 202220679418U CN 217388685 U CN217388685 U CN 217388685U
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Abstract
The utility model relates to an analog signal acquisition circuit, which comprises a first filtering unit, a second filtering unit, a third filtering unit, a first buffer amplifying unit, a second buffer amplifying unit, an analog-to-digital conversion unit, a reference voltage unit and an output unit; the first filtering unit is connected with the positive analog input end, the output end of the first filtering unit is connected with the first buffering amplification unit, and the first buffering amplification unit is connected with the third filtering unit; the second filtering unit is connected with the negative analog input end, the output end of the second filtering unit is connected with the second buffering amplification unit, and the output end of the second buffering amplification unit is connected with the third filtering unit; the output end of the third filtering unit is connected with the input end of the analog-to-digital conversion unit, the output end of the analog-to-digital conversion unit is connected with the output unit, and the output end of the reference voltage unit is connected with the reference voltage input end of the analog-to-digital conversion unit. The method can effectively reduce the interference between circuits, reduce the high-impedance signal measurement error, improve the anti-interference capability and further improve the precision and accuracy of signal detection.
Description
Technical Field
The disclosure relates to the technical field of signal acquisition, in particular to an analog signal acquisition circuit.
Background
In the field of detection sensing, such as air quality detection, photoelectric signal detection, accelerometers, piezoelectric sensors, biological signals and other high-impedance signals, analog signals output by the detection system are susceptible to the influence of input resistance and input bias current of the detection system, and actual detection systems also comprise components connected in parallel with signal paths, such as shunt of resistance and capacitance, cable leakage current, parasitic leakage current of printed circuit boards and other factors, so that the acquisition result of the analog signals is inaccurate.
On the other hand, the signal source and the signal acquisition circuit are both easy to generate noise and suffer from external interference, the sources of the noise and the interference include noise generated by a power supply, interference of an analog signal and a digital signal ground wire, interference generated by temperature, external electromagnetic interference and the like, when the noise reaches a certain degree, the signal can be submerged, and the precision and the accuracy of signal detection are greatly reduced.
SUMMERY OF THE UTILITY MODEL
In order to solve the problems existing in the prior art, the present disclosure is directed to an analog signal acquisition circuit. The high-impedance signal detection circuit can effectively reduce interference among circuits, reduce noise and interference in the transmission process of analog signals, simultaneously play a role in matching impedance through the buffer amplification unit, reduce high-impedance signal measurement errors, improve the anti-interference capability and further improve the precision and accuracy of signal detection.
The analog signal acquisition circuit comprises a first filtering unit, a second filtering unit, a third filtering unit, a first buffering amplification unit, a second buffering amplification unit, an analog-to-digital conversion unit, a reference voltage unit and an output unit;
the input end of the first filtering unit is used for being connected with a positive simulation input end, the output end of the first filtering unit is connected with the input end of the first buffering amplification unit, and the output end of the first buffering amplification unit is connected with the input end of the third filtering unit;
the input end of the second filtering unit is used for being connected with a negative analog input end, the output end of the second filtering unit is connected with the input end of the second buffering amplifying unit, and the output end of the second buffering amplifying unit is connected with the input end of the third filtering unit;
the output end of the third filtering unit is connected with the input end of the analog-to-digital conversion unit, the output end of the analog-to-digital conversion unit is connected with the output unit, and the output end of the reference voltage unit is connected with the reference voltage input end of the analog-to-digital conversion unit and used for providing reference voltage.
Preferably, the first filtering unit includes a first resistor, a first capacitor and a second capacitor; the first buffer amplifying unit comprises a first amplifier, a second resistor and a third capacitor; one end of the first resistor is used for connecting a positive analog input end, and the other end of the first resistor is connected with a positive input end of the first amplifier; one end of the first capacitor is connected between the first resistor and the first amplifier, the other end of the first capacitor is grounded, one end of the second capacitor is connected between the first resistor and the first amplifier, and the other end of the second capacitor is grounded; the negative input end of the first amplifier is connected with the output end of the first amplifier through the second resistor, the negative input end of the first amplifier is also connected with the output end of the first amplifier through the third capacitor, and the output end of the first amplifier is connected with the output unit;
the second filtering unit comprises a third resistor, a fourth capacitor and a fifth capacitor; the second buffer amplifying unit comprises a second amplifier, a fourth resistor and a sixth capacitor; one end of the second resistor is used for connecting a negative analog input end, and the other end of the second resistor is connected with the positive input end of the second amplifier; one end of the fourth capacitor is connected between the third resistor and the second amplifier, the other end of the fourth capacitor is grounded, one end of the fifth capacitor is connected between the third resistor and the second amplifier, and the other end of the fifth capacitor is grounded; the negative input end of the second amplifier is connected with the output end of the second amplifier through the fourth resistor, the negative input end of the second amplifier is connected with the output end of the second amplifier through the sixth capacitor, and the output end of the second amplifier is connected with the output unit.
Preferably, the third filtering unit includes a fifth resistor, a sixth resistor, a seventh capacitor, an eighth capacitor and a ninth capacitor, one end of the fifth resistor is connected to the output end of the first amplifier, the other end of the fifth resistor is connected to the analog-to-digital converting unit, one end of the seventh capacitor is connected between the first amplifier and the analog-to-digital converting unit, and the other end of the seventh capacitor is grounded; one end of the sixth resistor is connected with the output end of the second amplifier, the other end of the sixth resistor is connected with the analog-to-digital conversion unit, one end of the eighth capacitor is connected between the second amplifier and the analog-to-digital conversion unit, and the other end of the eighth capacitor is grounded; one end of the ninth capacitor is connected with the fifth resistor, and the other end of the ninth capacitor is connected with the sixth resistor.
Preferably, the analog-to-digital conversion unit includes an ADC module and a digital filter, the ADC module includes an ADC chip, an input end of the ADC chip is connected to the third filtering unit, an output end of the ADC chip is connected to an input end of the digital filter, and an output end of the digital filter is connected to the output unit.
Preferably, the ADC chip is an LTC2500 series chip.
Preferably, the reference voltage unit comprises a reference voltage chip, the reference voltage chip is a REF02 series chip, and a voltage output pin of the reference voltage chip is connected with a REF pin of the ADC chip.
Preferably, the analog-to-digital conversion unit further includes a plurality of bypass capacitors, and a REF pin of the ADC chip is connected in series with at least one of the bypass capacitors and then grounded.
Preferably, the output unit is an SPI output module.
Preferably, the analog signal acquisition circuit further includes five power modules, and the five power modules are respectively electrically connected with the first amplifier, the second amplifier, the ADC chip, the digital filter, and the output unit for supplying power.
Preferably, in the power module, the power module for supplying power to the first amplifier and the second amplifier includes two voltage regulators, one of the two voltage regulators of the power module is connected to the anode and the cathode of the first amplifier, and the other of the two voltage regulators of the power module is connected to the anode and the cathode of the second amplifier.
The analog signal acquisition circuit disclosed, its advantage lies in:
1. according to the invention, the first filtering unit and the second filtering unit are used for processing the positive analog input signal and the negative analog input signal respectively, so that the interference between circuits can be reduced;
2. according to the signal detection device, the first filtering unit and the second filtering unit are used for carrying out primary filtering on the positive analog input signal and the negative analog input signal respectively, and the third filtering unit is used for carrying out secondary filtering on the analog signal after buffering amplification, so that the noise and the interference of the analog signal at the input end and the analog signal after buffering amplification can be reduced respectively, and the precision and the accuracy of signal detection are improved;
3. the buffer amplification unit is arranged, so that the impedance matching effect can be achieved, the detection error of a high-impedance signal is reduced, and the anti-interference capability of a detection system is improved;
4. according to the power amplifier, the independent power supply modules are adopted for supplying power among the unit modules, so that the interference among power supplies can be reduced, and meanwhile, the low-noise voltage stabilizer is used for supplying power to the amplifier, so that the error caused by the noise of the power supplies can be reduced;
5. according to the method, the ADC chip with low noise, high performance and high precision is selected, so that the precision and accuracy of analog signal acquisition can be improved;
6. according to the method, the reference voltage chip with low noise and low temperature drift is selected, the accuracy of sampling the reference voltage by the ADC chip can be ensured, and meanwhile, the influence of temperature on the detection accuracy can be reduced.
Drawings
Fig. 1 is a block diagram of an analog signal acquisition circuit according to the present disclosure;
FIG. 2 is a circuit schematic of a filtering unit and a buffer amplification unit of the present disclosure;
fig. 3 is a circuit schematic of an ADC chip of the present disclosure.
Description of reference numerals: 1-a first filtering unit, 2-a second filtering unit, 3-a first buffer amplifying unit, 4-a second buffer amplifying unit, 5-a third filtering unit, 6-an analog-to-digital converting unit, 61-an ADC module, 62-a digital filter, 7-a reference voltage unit, 8-an output unit, R1-a first resistor, R2-a second resistor, R3-a third resistor, R4-a fourth resistor, R5-a fifth resistor, R6-a sixth resistor, C1-a first capacitor, C2-a second capacitor, C3-a third capacitor, C4-a fourth capacitor, C5-a fifth capacitor, C6-a sixth capacitor, C7-a seventh capacitor, C8-an eighth capacitor, C9-a ninth capacitor, Cp-a bypass capacitor, U1-a first amplifier, u2-second amplifier, U3-ADC chip, U4-reference voltage chip.
Detailed Description
As shown in fig. 1 to fig. 3, an analog signal acquisition circuit according to the present disclosure includes a first filtering unit 1, a second filtering unit 2, a third filtering unit 5, a first buffer amplifying unit 3, a second buffer amplifying unit 4, an analog-to-digital conversion unit 6, a reference voltage unit 7, and an output unit 8;
the input end of the first filtering unit 1 is used for connecting with a positive analog input end to receive the input of a positive analog signal, the output end of the first filtering unit 1 is connected with the first buffering amplifying unit 3, the output end of the first buffering amplifying unit 3 is connected with the input end of the third filtering unit 5, and the input positive analog signal is subjected to primary filtering and buffering amplification through the first filtering unit 1 and the first buffering amplifying unit 3.
The input end of the second filtering unit 2 is used for connecting the negative analog input end to receive the input of the negative analog signal, the output end of the second filtering unit 2 is connected with the second buffering amplifying unit 4, the output end of the second buffering amplifying unit 4 is connected with the input end of the third filtering unit 5, and the input negative analog signal is primarily filtered and buffered and amplified through the second filtering unit 2 and the second buffering amplifying unit 4.
The output end of the third filtering unit 5 is connected with the input end of the analog-to-digital conversion unit 6 and is connected with the input end of the analog-to-digital conversion unit 6, the output end of the analog-to-digital conversion unit 6 is connected with the output unit 8, the output end of the reference voltage unit 7 is connected with the reference voltage input end of the analog-to-digital conversion unit 6 and is used for providing reference voltage, the positive analog signal and the negative analog signal are subjected to secondary filtering through the third filtering unit 5 and then input into the analog-to-digital conversion unit 6, the reference voltage unit 7 provides the reference voltage, the analog signals are subjected to analog-to-digital conversion through the analog-to-digital conversion unit 6, are converted into corresponding digital signals and are output outwards through the output unit 8.
According to the invention, the first filtering unit 1 and the second filtering unit 2 are used for processing the positive analog input signal and the negative analog input signal respectively, so that the interference between circuits can be reduced;
according to the signal detection device, the first filtering unit 1 and the second filtering unit 2 are used for carrying out primary filtering on a positive analog input signal and a negative analog input signal respectively, and then the third filtering unit 5 is used for carrying out secondary filtering on the analog signals after buffering amplification, so that the noise and the interference of the analog signals at the input end and the analog signals after buffering amplification can be reduced respectively, and the precision and the accuracy of signal detection are improved;
the buffer amplification unit is arranged, so that the effect of matching impedance can be achieved, the detection error of a high-impedance signal is reduced, and the anti-interference capability of the detection system is improved.
Further, in this embodiment, referring to fig. 2 in detail, the first filtering unit 1 includes a first resistor R1, a first capacitor C1, and a second capacitor C2, the first buffer amplifying unit 3 includes a first amplifier U1, a second resistor R2, and a third capacitor C3, one end of the first resistor R1 is used to connect to the positive analog input end, the other end of the first resistor R1 is connected to the positive input end of the first amplifier U1, the first capacitor C1 is connected between the first resistor R1 and the first amplifier U1, the other end of the first capacitor C2 is connected to the ground, one end of the second capacitor C2 is connected between the first resistor R1 and the first amplifier U1, and the other end of the second capacitor C1, the first capacitor C1, and the second capacitor C2 form a low-pass RC filtering structure, which can attenuate a current spike of an input signal, thereby implementing primary filtering. The negative input end of the first amplifier U1 is connected with the output end of the first amplifier U1 through a second resistor R2, the negative input end of the first amplifier U1 is also connected with the output end of the first amplifier U1 through a third capacitor C3, and the output end of the first amplifier U1 is connected with the output unit 8. The primary filtering is carried out through the first filtering unit 1, and then the output is buffered through the first amplifier U1, so that the impedance matching effect is achieved, the characteristics of high-impedance input and low-impedance output are achieved, the driving capability can be improved, the high-impedance signal detection error is reduced, and the anti-interference capability is improved.
The second filtering unit 2 includes a third resistor R3, a fourth capacitor C4, and a fifth capacitor C5; the second buffer amplifying unit 4 comprises a second amplifier U2, a fourth resistor R4 and a sixth capacitor C6, wherein one end of the second resistor R2 is connected to the negative analog input end, and the other end is connected to the positive input end of the second amplifier U2; one end of a fourth capacitor C4 is connected between the third resistor R3 and the second amplifier U2, the other end of the fourth capacitor C3578 is grounded, one end of a fifth capacitor C5 is connected between the third resistor R3 and the second amplifier U2, and the other end of the fifth capacitor C5 is grounded; the negative input terminal of the second amplifier U2 is connected to the output terminal of the second amplifier U2 through a fourth resistor R4, the negative input terminal of the second amplifier U2 is connected to the output terminal of the second amplifier U2 through a sixth capacitor C6, and the output terminal of the second amplifier U2 is connected to the output unit 8. The working principle of the second filtering unit 2 and the second buffer amplifying unit 4 is the same as that of the first filtering unit 1 and the first buffer amplifying unit 3, and can be understood by referring to the above description, and the details are not described herein.
The primary filtering and the buffer amplification are carried out on the positive analog input through the first filtering unit 1 and the first buffer amplification unit 3, and the primary filtering and the buffer amplification are carried out on the negative analog input through the second filtering unit 2 and the second buffer amplification unit 4, so that the precision and the accuracy of a detection result can be improved.
Further, in the present embodiment, please continue to refer to fig. 2, the third filtering unit 5 includes a fifth resistor R5, a sixth resistor R6, a seventh capacitor C7, an eighth capacitor C8, and a ninth capacitor C9, one end of the fifth resistor R5 is connected to the output end of the first amplifier U1, the other end of the fifth resistor R5 is connected to the analog-to-digital converting unit 6, one end of the seventh capacitor C7 is connected between the first amplifier U1 and the analog-to-digital converting unit 6, and the other end of the seventh capacitor C7 is grounded; one end of a sixth resistor R6 is connected with the output end of the second amplifier U2, the other end of the sixth resistor R6 is connected with the analog-to-digital conversion unit 6, one end of an eighth capacitor C8 is connected between the second amplifier U2 and the analog-to-digital conversion unit 6, and the other end of the eighth capacitor C8 is grounded; one end of the ninth capacitor C9 is connected to the fifth resistor R5, and the other end is connected to the sixth resistor R6. In the third filtering unit 5, a coupling filtering structure with a larger bandwidth than that of the first filtering unit 1 and the second filtering unit 2 is formed by the fifth resistor R5, the sixth resistor R6, the seventh capacitor C7, the eighth capacitor C8 and the ninth capacitor C9 to perform two-stage filtering on the analog signal buffered and amplified by the amplifier, so that interference reflected to the amplifier due to sampling transient is suppressed, noise generated by the amplifier can be effectively reduced, and the signal detection precision is improved.
Further, in this embodiment, please refer to fig. 3 in detail, the analog-to-digital conversion unit 6 includes an ADC module 61 and a digital filter 62, the ADC module 61 includes an ADC chip U3, an input end of the ADC chip U3 is connected to the third filtering unit 5, an output end of the ADC chip U3 is connected to an input end of the digital filter 62, the ADC chip U3 is configured to perform analog-to-digital conversion, convert an analog signal output by the third filtering unit 5 into a digital signal, and the digital filter 62 is configured to filter the digital signal, so as to perform noise reduction and precision improvement. More specifically, the ADC chip U3 selects a 32-bit LTC2500 series chip, and the series chip has the advantages of low noise, high performance and high precision, and can improve the precision and accuracy of analog signal acquisition.
Further, in this embodiment, the reference voltage unit 7 includes a reference voltage chip U4, the reference voltage chip U4 is a REF02 chip, the REF02 chip can provide a 5V reference voltage, a voltage output pin of the reference voltage chip U4 is connected to a REF pin of the ADC chip U3, the analog signal is input to the ADC chip U3 after primary filtering, buffer amplification and secondary filtering, the reference voltage chip U4 outputs a 5V reference voltage to the REF pin of the ADC chip U3 to provide the reference voltage, the ADC chip U3 outputs a digital signal corresponding to the analog signal after sampling comparison and conversion of the analog signal, and the digital signal is output through the output unit 8 after filtering processing by the digital filter 62. The REF02 series chip has the characteristics of low noise and low temperature drift, can ensure the accuracy of the reference voltage sampled by the ADC chip U3, and simultaneously reduces the influence of temperature on the detection precision.
Furthermore, in this embodiment, the analog-to-digital conversion unit 6 further includes a plurality of bypass capacitors Cp, the ADC chip U3 has three REF pins, two of the REF pins are connected in series with at least one bypass capacitor Cp and then grounded, and a plurality of bypass capacitors Cp are selected to be connected to the REF pins to bypass the reference voltage chip U4, so as to filter the reference voltage chip U4 and ensure stable output of the reference voltage.
Further, in this embodiment, output unit 8 is SPI output module, and SPI output module carries out data transmission's module through the SPI bus promptly, and the SPI communication has the commonality strong, transmits stable advantage.
Furthermore, in this embodiment, the analog signal acquisition module further includes five power modules, the five power modules are electrically connected to the first amplifier U1, the second amplifier U2, the ADC chip U3, the digital filter 62, and the output unit 8, respectively, for supplying power, and an independent power supply is used among the power modules to reduce interference between power supplies.
Further, in this embodiment, in the power supply modules, two power supply modules for supplying power to the first amplifier U1 and the second amplifier U2 each include two voltage regulators. For example, the power supply module for supplying power to the first amplifier U1 includes a power supply and two voltage regulators, output terminals of the power supply are respectively connected to the two voltage regulators, one of the voltage regulators is connected to a positive electrode of the first amplifier U1, and the other voltage regulator is connected to a negative electrode of the first amplifier U1, and the power supply module of the second amplifier U2 is similar to the power supply module of the first amplifier U1 in structure, which can be understood with reference to the above description and is not described herein again. The noise of the output voltage of the power supply module is reduced through the voltage stabilizer, so that the influence of the power supply noise on the amplifier is reduced, and the accuracy of the detection signal is improved.
In the description of the present disclosure, it is to be understood that the orientation or positional relationship indicated by the directional terms such as "front, rear, upper, lower, left, right", "lateral, vertical, horizontal" and "top, bottom", etc., are generally based on the orientation or positional relationship shown in the drawings, and are used for convenience in describing and simplifying the present disclosure, and in the absence of a contrary explanation, these directional terms are not intended to indicate and imply that the device or element being referred to must have a specific orientation or be constructed and operated in a specific orientation, and therefore, should not be considered as limiting the scope of the present disclosure.
Various other modifications and changes may be made by those skilled in the art based on the above-described technical solutions and concepts, and all such modifications and changes should fall within the scope of the claims of the present disclosure.
Claims (10)
1. An analog signal acquisition circuit is characterized by comprising a first filtering unit, a second filtering unit, a third filtering unit, a first buffering amplification unit, a second buffering amplification unit, an analog-to-digital conversion unit, a reference voltage unit and an output unit;
the input end of the first filtering unit is used for being connected with a positive simulation input end, the output end of the first filtering unit is connected with the input end of the first buffering amplification unit, and the output end of the first buffering amplification unit is connected with the input end of the third filtering unit;
the input end of the second filtering unit is used for being connected with a negative analog input end, the output end of the second filtering unit is connected with the input end of the second buffering amplifying unit, and the output end of the second buffering amplifying unit is connected with the input end of the third filtering unit;
the output end of the third filtering unit is connected with the input end of the analog-to-digital conversion unit, the output end of the analog-to-digital conversion unit is connected with the output unit, and the output end of the reference voltage unit is connected with the reference voltage input end of the analog-to-digital conversion unit and used for providing reference voltage.
2. The analog signal acquisition circuit of claim 1 wherein the first filtering unit comprises a first resistor, a first capacitor, and a second capacitor; the first buffer amplifying unit comprises a first amplifier, a second resistor and a third capacitor; one end of the first resistor is used for connecting a positive analog input end, and the other end of the first resistor is connected with the positive input end of the first amplifier; one end of the first capacitor is connected between the first resistor and the first amplifier, the other end of the first capacitor is grounded, one end of the second capacitor is connected between the first resistor and the first amplifier, and the other end of the second capacitor is grounded; the negative input end of the first amplifier is connected with the output end of the first amplifier through the second resistor, the negative input end of the first amplifier is also connected with the output end of the first amplifier through the third capacitor, and the output end of the first amplifier is connected with the output unit;
the second filtering unit comprises a third resistor, a fourth capacitor and a fifth capacitor; the second buffer amplifying unit comprises a second amplifier, a fourth resistor and a sixth capacitor; one end of the second resistor is used for connecting a negative analog input end, and the other end of the second resistor is connected with a positive input end of the second amplifier; one end of the fourth capacitor is connected between the third resistor and the second amplifier, the other end of the fourth capacitor is grounded, one end of the fifth capacitor is connected between the third resistor and the second amplifier, and the other end of the fifth capacitor is grounded; the negative input end of the second amplifier is connected with the output end of the second amplifier through the fourth resistor, the negative input end of the second amplifier is connected with the output end of the second amplifier through the sixth capacitor, and the output end of the second amplifier is connected with the output unit.
3. The analog signal acquisition circuit according to claim 2, wherein the third filtering unit includes a fifth resistor, a sixth resistor, a seventh capacitor, an eighth capacitor and a ninth capacitor, one end of the fifth resistor is connected to the output end of the first amplifier, the other end of the fifth resistor is connected to the analog-to-digital conversion unit, one end of the seventh capacitor is connected between the first amplifier and the analog-to-digital conversion unit, and the other end of the seventh capacitor is grounded; one end of the sixth resistor is connected with the output end of the second amplifier, the other end of the sixth resistor is connected with the analog-to-digital conversion unit, one end of the eighth capacitor is connected between the second amplifier and the analog-to-digital conversion unit, and the other end of the eighth capacitor is grounded; one end of the ninth capacitor is connected with the fifth resistor, and the other end of the ninth capacitor is connected with the sixth resistor.
4. The analog signal acquisition circuit of claim 3, wherein the analog-to-digital conversion unit comprises an ADC module and a digital filter, the ADC module comprises an ADC chip, an input end of the ADC chip is connected to the third filtering unit, an output end of the ADC chip is connected to an input end of the digital filter, and an output end of the digital filter is connected to the output unit.
5. The analog signal acquisition circuit of claim 4 wherein the ADC chip is an LTC2500 series chip.
6. The analog signal acquisition circuit of claim 5 wherein the reference voltage unit comprises a reference voltage chip, the reference voltage chip is a REF02 series chip, and a voltage output pin of the reference voltage chip is connected to a REF pin of the ADC chip.
7. The analog signal acquisition circuit of claim 6, wherein the analog-to-digital conversion unit further comprises a plurality of bypass capacitors, and the REF pin of the ADC chip is connected in series with at least one of the bypass capacitors and then grounded.
8. The analog signal acquisition circuit of claim 7 wherein the output unit is an SPI output module.
9. The analog signal acquisition circuit of claim 8, further comprising five power modules electrically connected to the first amplifier, the second amplifier, the ADC chip, the digital filter, and the output unit for supplying power.
10. The analog signal acquisition circuit of claim 9, wherein each of the power modules for supplying power to the first amplifier and the second amplifier comprises two voltage regulators, wherein the two voltage regulators of one of the power modules are respectively connected to the positive electrode and the negative electrode of the first amplifier, and the two voltage regulators of the other power module are respectively connected to the positive electrode and the negative electrode of the second amplifier.
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| CN202220679418.XU CN217388685U (en) | 2022-03-25 | 2022-03-25 | Analog signal acquisition circuit |
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| CN202220679418.XU CN217388685U (en) | 2022-03-25 | 2022-03-25 | Analog signal acquisition circuit |
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Address after: Room 405, Building C, No. 2, Ruitai Road, Huangpu District, Guangzhou City, Guangdong Province, 510535 Patentee after: Guangzhou Fuyi Medical Technology Co.,Ltd. Address before: Room 405, building C, No. 2 Ruitai Road, Huangpu District, Guangzhou, Guangdong 510700 Patentee before: Guangzhou fuyishi Medical Technology Co.,Ltd. |