CN109743033B - Warp tension signal amplifying and conditioning circuit of high-speed loom - Google Patents
Warp tension signal amplifying and conditioning circuit of high-speed loom Download PDFInfo
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- CN109743033B CN109743033B CN201910214723.4A CN201910214723A CN109743033B CN 109743033 B CN109743033 B CN 109743033B CN 201910214723 A CN201910214723 A CN 201910214723A CN 109743033 B CN109743033 B CN 109743033B
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Abstract
The application relates to a warp tension signal amplifying and conditioning circuit of a high-speed loom, which comprises a power supply module, an input terminal, a primary differential amplifying module, a zero setting module, a secondary differential amplifying module, an RC active filtering module and an output terminal, wherein the output terminal is connected with a loom main control system, the input terminal is connected with a tension sensor, VI+ and VI-pins of the input terminal are mv differential signals output by the tension sensor, transmission cable shielding wire interfaces of the input terminal and the output terminal are connected together, and the power supply module provides +12V power for the input terminal; the primary differential amplification module takes mv-level differential voltage signals VI+ and VI < - > output by the tension sensor as input, the zeroing module is based on an inverse proportional amplification circuit, and the secondary differential amplification module takes V1 output by the primary differential amplification module and V2 output by the zeroing module as secondary differential signal input. The circuit can realize accurate zero setting, and has high signal-to-noise ratio and strong anti-interference capability.
Description
Technical Field
The application relates to the technical field of high-speed loom tension detection, in particular to a high-speed loom warp tension signal amplifying and conditioning circuit.
Background
For a loom, tension control is an important link in the weaving process, whether tension is stable or not directly influences the quality of fabric, and accurate measurement of the tension is a precondition for normal operation of a tension control system. Warp tension of a loom is generally detected by a beam type tension sensor, and is supplied with power by an external direct current power supply and output as two paths of mv-level differential voltage signals, but the signals cannot be directly sent into a loom main controller such as a singlechip or an A/D conversion module of a PLC, and the signals are easily disturbed by various noises and are unstable due to the influence of the working environment of the loom. Therefore, the signal is reasonably amplified and conditioned and converted into a standard 0-5V or 4-20 mA electric signal to be sent to an A/D conversion module of a singlechip or a PLC, and the prior art has the defects of inaccurate zeroing, low signal-to-noise ratio, poor anti-interference capability and the like.
Disclosure of Invention
Aiming at the defects of the prior art, the application provides a high-speed loom warp tension signal amplifying and conditioning circuit which can realize accurate zero setting, has higher signal-to-noise ratio and anti-interference capability and has stronger practical value.
In order to achieve the above purpose, the application adopts the following technical scheme: the utility model provides a high-speed loom warp tension signal amplification conditioning circuit, this signal amplification conditioning circuit includes power module, input terminal, RC active filter module and output terminal, and power module is by the DC24V and the GND pin power supply of output terminal, and output terminal connects loom main control system, and input terminal connects tension sensor, its characterized in that:
the circuit also comprises a primary differential amplification module, a zero setting module and a secondary differential amplification module; vi+ and VI-pins of the input terminal are mv-level differential signals output by the tension sensor, the input terminal and a transmission cable of the output terminal are connected together through a shielding line interface, and the power supply module provides +12v power for the input terminal;
the primary differential amplification module takes mv-level differential voltage signals VI+ and VI < - > output by the tension sensor as input, the zeroing module is based on an inverse proportional amplification circuit, the secondary differential amplification module takes V1 output by the primary differential amplification module and V2 output by the zeroing module as secondary differential signal input, the RC active filtering module carries out active filtering on the voltage V3 output by the secondary differential amplification module and then outputs a stable 0-5V voltage signal Vo, and the voltage signal Vo enters the A/D conversion module of the loom main control system through an output terminal; the primary differential amplification module, the secondary differential amplification module and the zeroing module are powered by the +/-12V dual power supply provided by the power supply module respectively.
The beneficial effects of the application are as follows:
(1) The two-stage differential amplification circuit is adopted, the chip adopts the amplifier CLC1200 for the instrument, the chip has the advantages of low power consumption, low input noise, low power consumption and the like, and the two input ends of the differential signal adopt symmetrical design, so that the chip has very high common mode rejection capability; the input noise of the chip can be amplified along with the signal, the two-stage differential design divides the amplification factors of hundreds of times to thousands of times into two stages (G1G 2), and the secondary differential amplification circuit can eliminate the noise amplified by the primary amplification circuit through zeroing, thereby improving the defect that the input noise signal of the chip is amplified but cannot be eliminated in single-stage amplification;
(2) The independent zeroing module is arranged, so that the inherent error of the tension sensor can be counteracted; by adjusting the variable resistor RF1 to output zero-setting voltage of-1V to +1V, the defect that zero cannot be accurately set when the differential voltage signal output by the sensor is negative can be overcome, and the accuracy of the measurement signal is improved; the power supply pins of the operational amplifier chips are connected with the ceramic chip decoupling capacitors, so that the stability of power supply voltage and the anti-interference capability of the chips are improved; the mv-level differential signal output by the sensor is subjected to low-pass filtering before entering the operational amplifier through the input terminal 2, and the amplified signal is also subjected to RC active filtering before being output through the output terminal 7, so that the influence of high-frequency noise on the signal can be filtered by the two-time filtering, and the stability and reliability of the signal are improved;
(3) The power supply module is added with a rectifying diode D1 and a transient suppression diode D2, so that the filtering and protecting circuit functions are realized; in addition, ICL7662 is adopted to output-12V, and a symmetrical dual power supply is formed by +12V output by 78L12 to supply power to the amplifier, so that the dynamic range and stability of the operational amplifier can be improved;
(4) In summary, the conditioning circuit disclosed by the application can convert two paths of mv-level differential voltage signals output by the tension sensor into standard 0-5V voltage signals through two-stage amplification, can realize accurate zeroing, has higher signal-to-noise ratio and anti-interference capability, is suitable for processing of a precise signal conditioning process, and has the signal detection precision of 0.3kg.
Drawings
FIG. 1 is a schematic diagram of a circuit structure of the present application;
fig. 2 is a circuit configuration diagram of a power supply module 1 of the present application;
fig. 3 is a circuit configuration diagram of the primary differential amplification module 3 of the present application;
fig. 4 is a circuit configuration diagram of the zeroing module 4 of the present application;
fig. 5 is a circuit configuration diagram of the secondary differential amplification module 5 of the present application;
fig. 6 is a circuit configuration diagram of the RC active filter module 6 of the present application.
Detailed Description
In order to make the technical solution and advantages of the present application clearer, specific embodiments of the present application will be given below with reference to the accompanying drawings. The specific examples are only for further detailed description of the present application and do not limit the scope of the application.
The application relates to a warp tension signal amplifying and conditioning circuit of a high-speed loom, which comprises a power supply module 1, an input terminal 2, a primary differential amplifying module 3, a zero setting module 4, a secondary differential amplifying module 5, an RC active filter module 6 and an output terminal 7, wherein the power supply module is connected with the input terminal 2;
the output terminal 7 is provided with four pins, namely a DC power interface DC24V and GND, a 0-5V signal output port Vo and a shielded wire interface Shield signal; the power supply module 1 is powered by DC24V and GND of the output terminal 7, the DC24V pin of the output terminal 7 is connected with the positive pole of the rectifier diode D1, and the negative pole of the rectifier diode D1 is respectively connected with the transient stateThe positive electrode of the suppressor diode D2, the positive electrode of the electrolytic capacitor C1, one pin of the ceramic chip capacitor C2 and V of the three-terminal voltage stabilizing chip U1 IN The pins are connected, the cathode of the transient suppression diode D2, the cathode of the electrolytic capacitor C1, the other pin of the ceramic capacitor C2 and the GND pin of the three-terminal voltage stabilizing chip U1 are connected with GND, and the V of the three-terminal voltage stabilizing chip U1 OUT The pin outputs +12V, and connects the positive pole of the electrolytic capacitor C3 and one pin of the ceramic chip capacitor C4, the negative pole of the electrolytic capacitor C3 and another pin of the ceramic chip capacitor C4 connect GND; the V+ pin of the voltage conversion chip U2 is connected with +12V, the GND pin of the voltage conversion chip U2 is connected with GND, the CAP+ pin and the CAP-pin of the voltage conversion chip U2 are correspondingly connected with the anode and the cathode of the electrolytic capacitor C5, the VOUT pin of the voltage conversion chip U2 outputs-12V and is connected with the cathode of the electrolytic capacitor C6 and one pin of the ceramic capacitor C7, and the anode of the electrolytic capacitor C6 and the other pin of the ceramic capacitor C7 are connected with GND;
the input terminal 2 is provided with five pins which are respectively connected with input shielding wire interfaces Shield signal, + V, GND and mv-level differential signals VI+ and VI < - >, which are output by the tension sensor;
the input terminal 2 is connected with the tension sensor and is provided with five pins, namely +12V, GND, VI+, VI-and Shield signals, wherein +12V and GND are provided by the power supply module 1 and are used for supplying power to the tension sensor, VI+ and VI-are mv-level differential signals output by the tension sensor, and the Shield signals are shielding line interfaces of transmission cables at the input end; the output terminal 7 is connected with the loom main control system, and has four pins, namely DC24V, GND, vo and Shield signal, wherein the DC24V and the GND are respectively provided by the loom main control system or an external direct current power supply, and the Vo is connected with an A/D conversion interface of the loom main control system, wherein the Shield signal is a shielding line interface of an output end transmission cable, is connected with a shielding line interface of an input end and is finally grounded, and is used for preventing external interference from influencing transmission signals.
The primary differential amplification module 3 (see fig. 3) is formed by an instrument amplifier U4 and a peripheral circuit, specifically, two RG pins of the instrument amplifier U4 are connected to two ends of a resistor R6, an IN 1-pin and an IN1+ pin are respectively connected to two pins of a ceramic chip capacitor C14, the IN 1-pin is connected to one pin of a resistor R12 and one pin of a ceramic chip capacitor C15, the IN1+ pin is connected to one pin of a resistor R11 and one pin of a ceramic chip capacitor C16, the other pin of the resistor R12 is connected to a VI-pin on an input terminal 2, the other pin of the resistor R11 is connected to a vi+ pin on the input terminal 2, the ceramic chip capacitor C15 and the other pin of the ceramic chip capacitor C16 are both connected to GND, vs+ pin and Vs-pin of the instrument amplifier U4 are respectively connected to +12v and-12v and are respectively connected to GND through a ceramic chip capacitor C13, the pin of the instrument amplifier U4 is also connected to GND, the other pin of the instrument amplifier U4 is an output terminal of the primary differential amplification, and the output is V1;
the zeroing module 4 (see fig. 4) is composed of an operational amplifier U3A and a peripheral circuit, specifically, two power supply pins of the operational amplifier U3A are connected with +12V and-12V and are respectively connected with GND through a ceramic chip capacitor C8 and a ceramic chip capacitor C9, the homodromous input end is connected with GND through a resistor R8, the reverse input end is sequentially connected with a resistor R4 and a resistor R1 in series, the other end of the resistor R1 is connected with +12V, the reverse input end of the operational amplifier U3A is also connected with an output pin of the operational amplifier U3A through a resistor R9, one end of a resistor R2 is connected at the middle connection part of the resistor R4 and the resistor R1, the other end of the resistor R2 is sequentially connected with a variable resistor RF1 and a resistor R3 in series, the other end of the resistor R3 is connected with the output pin of the U3A, and the middle tap end of the variable resistor RF1 outputs zeroing voltage which is recorded as V2;
the secondary differential amplification module 5 (see fig. 5) is composed of an instrument amplifier U5 and a peripheral circuit, specifically, a resistor R5 and a variable resistor RF2 are connected IN series between two RG pins of the instrument amplifier U5, and an intermediate tap end of the variable resistor RF2 is IN short circuit with one of the other two pins of the variable resistor RF2, IN addition, an IN 1-pin of the instrument amplifier U5 is connected with one pin of a resistor R7, the other pin of the resistor R7 is connected with V2 output by the zero setting module 4, an in1+ pin of the instrument amplifier U5 is connected with one pin of a resistor R10, the other pin of the R10 is connected with V1 output by the primary differential amplification module 3, vs+ and Vs-pins of the instrument amplifier U5 are respectively connected with +12v and-12v and are respectively connected with GND through a ceramic capacitor C10 and a ceramic capacitor C11, a pin of the instrument amplifier U5 is also connected with GND, an OUT pin of the instrument amplifier U5 is an output end of the secondary differential amplification, and the output is V3;
the RC active filter module 6 (see fig. 6) takes the V3 as input, and sequentially connects in series a resistor R13 and a resistor R14, wherein the other end of the resistor R14 is connected with the homodromous input end of the operational amplifier U3B, the middle connection point of the resistor R13 and the resistor R14 is connected with one pin of the tile capacitor C20, the other pin of the tile capacitor C20 is connected with the output pin of the operational amplifier U3B and one end of the resistor R5, and the end of the resistor R5 is simultaneously connected with the output pin of the operational amplifier U3B; the inverting input end of the operational amplifier U3B is connected with GND through a ceramic chip capacitor C19, and the other end of the operational amplifier U15 is the final signal output end and is connected with the 0-5V signal output port Vo of the output terminal 7.
The specific model of the transient suppression diode D2 is P6KE30CA, the specific model of the voltage conversion chip U2 is ICL7662, the specific models of the instrument amplifier U4 and the instrument amplifier U5 are CLC1200, and the operational amplifier U3A and the operational amplifier U3B are A, B-channel operational amplifiers of the two-channel operational amplifier LM 358; c1 and C3 are electrolytic capacitors with the specification of 35V/330uF; c5 and C6 are tantalum electrolytic capacitors, and the capacitance value is 10uF; c2, C4, C7, C8, C9, C10, C11, C12, C13 are all used for power decoupling and the capacitance values are all 0.1uF; in order to achieve better common mode rejection, the positive and negative inputs of the differential amplifier (instrumentation amplifier U4 and instrumentation amplifier U5) should remain symmetrical, i.e., r11=r12, r7=r10, c15=c16 should be kept and the accuracy of the two resistors and the two capacitors should be no less than ±1%; in order to enable V2 output by the zeroing module 4 to be adjustable within the range of-1V to +1V, the resistance values of the resistors R4, R8 and R9 are all 4.7KΩ, the resistance values of the resistors R1, R2 and R3 are all 10KΩ, and the RF1 is a precise adjustable resistor with the maximum resistance value of 10KΩ; in order to realize the output of the standard voltage signal of 0-5V, taking the measuring range of 0-850Kg of the tension sensor as an example, the resistance value of R6 is 2.2KΩ, the resistance value of R1 is 1KΩ, the variable resistor RF2 is a precise adjustable resistor and the maximum resistance value is 10KΩ.
The power module 1 is powered by DC24V and GND which are connected with the output terminal 7, firstly, alternating current components are filtered through the rectifier diode D1, then the electrolytic capacitor C1 and the ceramic chip capacitor C2 are connected to improve the stability of direct current voltage and remove power supply noise, the transient suppression diode D2 plays a role of a protection circuit, the three-terminal voltage stabilizing chip U1 is 78L12 and can convert the input DC24V into +12V of direct current, the electrolytic capacitors C1 and C3 are 35V/330uF in specification, voltage stabilizing effect is achieved at the input end and the output end of the 78L12, and the ceramic chip capacitors C2 and C4 are used for power decoupling; in addition, the power conversion chip U2 is ICL7662, can convert +12V input into-12V output, and form dual power supply with +12V to supply power for the subsequent operational amplifier, tantalum capacitors C5 and C6 have capacitance of 10uF, have voltage stabilizing and filtering effects, and the ceramic chip capacitor C7 is used for decoupling output voltage;
the primary differential amplification module 3 takes mv-level differential voltage signals vi+ and VI-output by a tension sensor as input, R11, C16, R12 and C15 form a two-way low-pass filter circuit, high-frequency interference signals are filtered, VI+ and VI-enter an instrument amplifier U4 after low-pass filtering, the instrument amplifier U4 adopts an instrument amplifier CLC1200 and adopts +/-12V dual power supply to supply power, the common mode rejection capability of the amplifier is kept to be satisfied by R12=R11 and C15=C16 and the error is not lower than +/-1%, R11=R12=10KΩ is taken for increasing input impedance, C12 and C13 are used for power decoupling, C14 is used for filtering high-frequency differential mode signals, R6 is a primary gain resistor, and the relationship between input and output is v1=G1 [ (VI+) - (VI- ], assuming that the primary amplification gain is G1.
The zeroing module 4 is based on an inverse proportion amplifying circuit, a + -12V dual power supply is used for supplying power to the operational amplifier U3A, one end of R1 is connected with +12V, the other end of R1 is subjected to inverse proportion amplification, negative pressure with the same value and opposite direction is output, when R1=R2=R3=10KΩ, R4=R8=R9=4.7KΩ, the maximum resistance of RF1 is 10KΩ, the output voltage V2 of the RF2 tap end can be changed by adjusting RF2, and the change range of the output voltage V2 is-1V to +1V.
The secondary differential amplification module 5 takes V1 output by the primary differential amplification module 3 and V2 output by the zeroing module 4 as secondary differential signal input, the operational amplifier U5 adopts an instrument amplifier CLC1200 and adopts +/-12V dual power supply to supply power for maintaining the common mode rejection capability of the amplifier, R7=R10=10KΩ and the error is not lower than +/-1%, C12 and C13 are used for power decoupling, R1 and RF2 are secondary gain resistors, and the output V3=G2 (V1-V2) of the secondary differential amplification module 5 can be regulated by changing the effective resistance value of the precision adjustable resistor RF2 assuming that the secondary amplification gain is G2. Since the mv differential voltage signal output at zero load of the sensor cannot be guaranteed to be absolutely zero, (v+) - (V-) negative is possible, i.e. V1 may be negative, so that V2 is a negative voltage necessary for accurate zeroing, thereby explaining the necessity of the zeroing module 4 in the present application. Finally, V3 outputs stable Vo through RC active filtering module 6,
the RC active filtering module 6 (see fig. 6) takes the B channel of the LM358 as a core, and outputs a stable 0-5V voltage signal Vo after the voltage V3 output by the secondary differential amplifying module 5 is subjected to active filtering, and the stable 0-5V voltage signal Vo enters the A/D conversion module of the loom main control system through the output terminal 7.
The application is applicable to a sensor which outputs a differential signal and the output signal is in linear relation with the applied tension. In addition, before the tension sensor is connected and put into use, zero setting is carried out by adjusting RF1 in an idle state, so that V3 output is 0V, and then RF1 is kept unchanged; and setting the gain according to the measuring range of the sensor and adding a known load, wherein the measuring range of the sensor is in linear relation with the output voltage range, and when the load is known, vo can output corresponding voltage by changing the effective resistance value of RF2, and the Vo range is 0-5V.
The high-speed loom mentioned in the present application means a high-speed rapier loom, a high-speed air jet loom, a high-speed water jet loom, and the like.
The application is applicable to the prior art where it is not described.
Claims (4)
1. The utility model provides a high-speed loom warp tension signal amplification conditioning circuit, this signal amplification conditioning circuit includes power module, input terminal, RC active filter module and output terminal, and power module is supplied power by output terminal's DC24V and GND pin, and output terminal connects loom main control system, and input terminal connects tension sensor, its characterized in that:
the circuit also comprises a primary differential amplification module, a zero setting module and a secondary differential amplification module; vi+ and VI-pins of the input terminal are mv-level differential signals output by the tension sensor, the input terminal and a transmission cable of the output terminal are connected together through a shielding line interface, and the power supply module provides +12v power for the input terminal;
the primary differential amplification module takes mv-level differential voltage signals VI+ and VI < - > output by the tension sensor as input, the zeroing module is based on an inverse proportional amplification circuit, the secondary differential amplification module takes V1 output by the primary differential amplification module and V2 output by the zeroing module as secondary differential signal input, the RC active filtering module carries out active filtering on the voltage V3 output by the secondary differential amplification module and then outputs a stable 0-5V voltage signal Vo, and the voltage signal Vo enters the A/D conversion module of the loom main control system through an output terminal; the primary differential amplification module, the secondary differential amplification module and the zeroing module are powered by +/-12V dual power supplies provided by the power supply module respectively;
the zero setting module is composed of an operational amplifier U3A and a peripheral circuit, specifically, two power supply pins of the operational amplifier U3A are connected with +12V and-12V and are respectively connected with GND through a ceramic chip capacitor C8 and a ceramic chip capacitor C9, the same-direction input end is connected with GND through a resistor R8, the reverse input end is sequentially connected with a resistor R4 and a resistor R1 in series, the other end of the resistor R1 is connected with +12V, the reverse input end of the operational amplifier U3A is also connected with an output pin of the operational amplifier U3A through a resistor R9, one end of a resistor R2 is connected at the middle joint of the resistor R4 and the resistor R1, the other end of the resistor R2 is sequentially connected with a variable resistor RF1 and a resistor R3 in series, the other end of the resistor R3 is connected with an output pin of the operational amplifier U3A, and the middle tap end of the variable resistor RF1 outputs zero setting voltage which is recorded as V2;
the RC active filter module takes the V3 as input, a resistor R13 and a resistor R14 are sequentially connected in series, the other end of the resistor R14 is connected with the homodromous input end of the operational amplifier U3B, the middle connection point of the resistor R13 and the resistor R14 is connected with one pin of the ceramic chip capacitor C20, the other pin of the ceramic chip capacitor C20 is connected with the output pin of the operational amplifier U3B and one end of the resistor R15, and the end of the resistor R15 is simultaneously connected with the output pin of the operational amplifier U3B; the reverse input end of the operational amplifier U3B is connected with GND through a ceramic chip capacitor C19, and the other end of the operational amplifier U15 is the final signal output end and is connected with the 0-5V signal output port Vo of the output terminal.
2. The method according to claim 1The high-speed loom warp tension signal amplification conditioning circuit is characterized in that the circuit of the power supply module comprises the following components: the DC24V pin of the output terminal is connected with the positive electrode of the rectifying diode D1, and the negative electrode of the rectifying diode D1 is respectively connected with the positive electrode of the transient suppression diode D2, the positive electrode of the electrolytic capacitor C1, one pin of the ceramic chip capacitor C2 and the V of the three-terminal voltage stabilizing chip U1 IN The pins are connected, the cathode of the transient suppression diode D2, the cathode of the electrolytic capacitor C1, the other pin of the ceramic capacitor C2 and the GND pin of the three-terminal voltage stabilizing chip U1 are connected with GND, and the V of the three-terminal voltage stabilizing chip U1 OUT The pin outputs +12V, and connects the positive pole of the electrolytic capacitor C3 and one pin of the ceramic chip capacitor C4, the negative pole of the electrolytic capacitor C3 and another pin of the ceramic chip capacitor C4 connect GND; the V+ pin of the voltage conversion chip U2 is connected with +12V, the GND pin of the voltage conversion chip U2 is connected with GND, the CAP+ pin and the CAP-pin of the voltage conversion chip U2 are correspondingly connected with the anode and the cathode of the electrolytic capacitor C5, the VOUT pin of the voltage conversion chip U2 outputs-12V and is connected with the cathode of the electrolytic capacitor C6 and one pin of the ceramic capacitor C7, and the anode of the electrolytic capacitor C6 and the other pin of the ceramic capacitor C7 are connected with GND.
3. The high-speed loom warp tension signal amplifying and conditioning circuit according to claim 1, wherein the primary differential amplifying module is composed of an instrument amplifier U4 and a peripheral circuit, specifically, two RG pins of the instrument amplifier U4 are connected to two ends of a resistor R6, an IN 1-pin and an IN1+ pin are respectively connected to two pins of a tile capacitor C14, one pin of the IN 1-pin connecting resistor R12 and one pin of the tile capacitor C15, the IN1+ pin is connected to one pin of the resistor R11 and one pin of the tile capacitor C16, the other pin of the resistor R12 is connected to a VI-pin on an input terminal, the other pin of the resistor R11 is connected to a vi+ pin on an input terminal, the other pins of the tile capacitor C15 and the tile capacitor C16 are connected to GND, vs+ pin and Vs pin of the instrument amplifier U4 are respectively connected to +12v and-12v and are respectively connected to GND through the tile capacitor C12 and the tile capacitor C13, the pin of the instrument amplifier U4 is also connected to GND, the other pin of the instrument amplifier U4 is connected to the output terminal of the instrument amplifier U4, and the output differential amplifier U1 is output.
4. The high-speed loom warp tension signal amplifying and conditioning circuit according to claim 1, wherein the secondary differential amplifying module is composed of an instrumentation amplifier U5 and a peripheral circuit, specifically, an intermediate serial resistor R5 and a variable resistor RF2 between two RG pins of the instrumentation amplifier U5, and an intermediate tap end of the variable resistor RF2 is in short circuit with one of the other two pins of the variable resistor RF 2; the IN 1-pin of the instrument amplifier U5 is connected with one pin of a resistor R7, the other pin of the resistor R7 is connected with V2 output by the zeroing module, the IN1+ pin of the instrument amplifier U5 is connected with one pin of a resistor R10, the other pin of the R10 is connected with V1 output by the primary differential amplification module, the Vs+ pin and the Vs-pin of the instrument amplifier U5 are respectively connected with +12V and-12V and are respectively connected with GND through a ceramic capacitor C10 and a ceramic capacitor C11, the REF pin of the instrument amplifier U5 is also connected with GND, the OUT pin of the instrument amplifier U5 is an output end of secondary differential amplification, and the output is marked as V3.
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