CN207780567U

CN207780567U - A kind of novel 16 Channel Synchronous data collecting system

Info

Publication number: CN207780567U
Application number: CN201820262116.6U
Authority: CN
Inventors: 赵斌; 邹宏志
Original assignee: Beijing Renda New Super Technology Co Ltd
Current assignee: Beijing Renda New Super Technology Co Ltd
Priority date: 2018-02-22
Filing date: 2018-02-22
Publication date: 2018-08-28
Anticipated expiration: 2028-02-22

Abstract

The utility model discloses a kind of novel 16 Channel Synchronous data collecting systems, including fpga chip, 16 AD conversion modules, 4 toggle switch, buffer, latch, SDRAM chips, microcontroller, Ethernet chip, the fpga chip and 16 AD conversion modules, 4 toggle switch, buffer, latch, SDRAM chips, monolithic mechatronics, the microcontroller, Ethernet chip electrical connection, the fpga chip is also connected with SMB trigger terminals, the external TTL trigger signal sources of SMB trigger terminals.Data collecting system of the utility model based on industry ethernet, free drive is dynamic, can directly be connected with the RJ45 network interfaces of computer；Synchronous acquisition port number is more, it can be achieved that 16 Channel Synchronous acquisitions, meet multichannel collecting demand；Have the specific functions such as pre-acquired, fixed length acquisition.

Description

A kind of novel 16 Channel Synchronous data collecting system

Technical field

The utility model is related to data collecting system technical fields, more particularly to a kind of novel 16 Channel Synchronous data acquisition System.

Background technology

Data collecting system is a kind of instrument being acquired to the physical quantity signal with certain transformation rate, is answered extensively For science and techniques of defence, scientific research institutions, universities and colleges, electric power, metallurgy, petrochemical industry, auto industry, the scientific experimentation of civil engineering, matter Measure the occasions such as inspection, fault diagnosis.

The development of information-intensive society depends greatly on the advance of information and signal processing technology, and data are adopted Collecting system is played key or even is determined in entire digital display circuit as the essential previous work of Digital Signal Processing The effect of property.No more than 8 channels, single product can not meet more high-speed synchronous data acquiring system channel number greatly at present The demand in channel need to connect multiple collecting devices to more multichannel, and this considerably increases the complexity of secondary development；When need When wanting the functions such as fixed length acquisition, pre-acquired, exploitation design is complicated.

Utility model content

In view of the drawbacks described above of the prior art, the technical problem to be solved by the utility model is to provide one kind novel 16 Channel Synchronous data collecting system, so as to solve the deficiencies in the prior art.

To achieve the above object, the utility model provides a kind of novel 16 Channel Synchronous data collecting system, including Fpga chip, 16 AD conversion modules, 4 toggle switch, buffer, latch, SDRAM chips, microcontroller, ether steel wire rack Piece, the fpga chip and 16 AD conversion modules, 4 toggle switch, buffer, latch, SDRAM chips, monolithic are electromechanical Connection, the microcontroller, Ethernet chip electrical connection, the fpga chip are also connected with SMB trigger terminals, the SMB triggering ends The external TTL trigger signal sources of son.

The above-mentioned novel 16 Channel Synchronous data collecting system of one kind, the SDRAM chips are the SDRAM of FIFOization.

The above-mentioned novel 16 Channel Synchronous data collecting system of one kind, the microcontroller are STM32F439.

The above-mentioned novel 16 Channel Synchronous data collecting system of one kind, the Ethernet chip are DP83848 chips.

The above-mentioned novel 16 Channel Synchronous data collecting system of one kind, the buffer, latch input 8 railway digitals respectively Signal, 8 railway digital signals of output.

The utility model has the beneficial effects that：

Data collecting system of the utility model based on industry ethernet, free drive is dynamic, can direct and computer RJ45 nets Mouth is connected；Synchronous acquisition port number is more, it can be achieved that 16 Channel Synchronous acquisitions, meet multichannel collecting demand；Have pre-acquired, The specific functions such as fixed length acquisition.

The technique effect of the design of the utility model, concrete structure and generation is made furtherly below with reference to attached drawing It is bright, to be fully understood from the purpose of this utility model, feature and effect.

Description of the drawings

Fig. 1 is the structure diagram of the utility model.

Fig. 2 is the principles of the present invention block diagram.

Specific implementation mode

As shown in Figure 1, a kind of novel 16 Channel Synchronous data collecting system, including 1,16 AD conversion module of fpga chip 2,4 toggle switch 3, buffer 4, latch 5, SDRAM chips 6, microcontroller 7, Ethernet chip 8, the fpga chip 1 with 16 AD conversion modules, 2,4 toggle switch 3, buffer 4, latch 5, SDRAM chips 6, microcontroller 7 are electrically connected, the list Piece machine 7, Ethernet chip 8 are electrically connected, and the fpga chip 1 is also connected with SMB trigger terminals, the external TTL of SMB trigger terminals Trigger signal source.

In the present embodiment, the SDRAM chips 6 are the SDRAM of FIFOization.

In the present embodiment, the microcontroller 7 is STM32F439.

In the present embodiment, the Ethernet chip 8 is DP83848 chips.

In the present embodiment, the buffer 4, latch 5 input 8 railway digital signals, 8 railway digital signals of output respectively.

The principles of the present invention are：

As shown in Figure 1, PC sends acquisition instructions to Ethernet, STM32 is parsed after receiving order to FPGA control chip, FPGA real-time controls AD conversion simultaneously caches data deposit SDRAM；After SDRAM data reach half-full, STM32 reads data simultaneously It is sent to the ends PC.SMB trigger terminals can realize that pre-acquired, fixed length acquisition, triggering collection etc. are special with external TTL trigger signals Function.

As shown in Fig. 2, 8 road signal of the left side enters 8 tunnel A/D chips by 8 SMB input terminals carries out digital-to-analogue conversion, the right 8 road signals enter 8 tunnel A/D chips by 8 SMB input terminals and carry out digital-to-analogue conversion；FPGA controls both sides AD digital-to-analogue conversions and handle Digital independent is stored in the SDRAM of FIFOization；When the data in SDRAM reach half-full state, STM32 reads number by FPGA According to being sent to host computer by Ethernet chip, RJ45 sockets and handled.

The preferred embodiment of the utility model described in detail above.It should be appreciated that the ordinary skill people of this field Member according to the present utility model can conceive without creative work makes many modifications and variations.Therefore, all this technology necks Technical staff passes through logic analysis, reasoning or limited reality on the basis of existing technology according to the design of the utility model in domain Available technical solution is tested, it all should be in the protection domain being defined in the patent claims.

Claims

1. a kind of novel 16 Channel Synchronous data collecting system, it is characterised in that：Including fpga chip (1), 16 AD conversion moulds Block (2), 4 toggle switch (3), buffer (4), latch (5), SDRAM chips (6), microcontroller (7), Ethernet chip (8), the fpga chip (1) and 16 AD conversion modules (2), 4 toggle switch (3), buffer (4), latch (5), SDRAM chips (6), microcontroller (7) electrical connection, the microcontroller (7), Ethernet chip (8) electrical connection, the fpga chip (1) SMB trigger terminals, the external TTL trigger signal sources of SMB trigger terminals are also connected with.

2. a kind of novel 16 Channel Synchronous data collecting system as described in claim 1, it is characterised in that：The SDRAM cores Piece (6) is the SDRAM of FIFOization.

3. a kind of novel 16 Channel Synchronous data collecting system as described in claim 1, it is characterised in that：The monolithic Machine (7) is STM32F439.

4. a kind of novel 16 Channel Synchronous data collecting system as described in claim 1, it is characterised in that：The ether Steel wire rack piece (8) is DP83848 chips.

5. a kind of novel 16 Channel Synchronous data collecting system as described in claim 1, it is characterised in that：The buffer (4), latch (5) inputs 8 railway digital signals, 8 railway digital signals of output respectively.