CN216670184U - Chip test tray - Google Patents

Chip test tray Download PDF

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Publication number
CN216670184U
CN216670184U CN202122838953.3U CN202122838953U CN216670184U CN 216670184 U CN216670184 U CN 216670184U CN 202122838953 U CN202122838953 U CN 202122838953U CN 216670184 U CN216670184 U CN 216670184U
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China
Prior art keywords
board
memory
chip
tray
main control
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CN202122838953.3U
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Chinese (zh)
Inventor
韩成
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Dongguan Memory Storage Technology Co ltd
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Dongguan Memory Storage Technology Co ltd
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Priority to CN202122838953.3U priority Critical patent/CN216670184U/en
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Abstract

The utility model discloses a chip test tray which comprises a tray main body, an aging board and a switching board assembly, wherein the aging board is provided with a socket. The adapter plate assembly comprises a plate body, a memory, a main control I C and a mounting seat for mounting a chip; the board body is inserted into the socket, and the memory, the main control I C and the mounting seat are all fixed on the board body. According to the board body with the main control I C, only the chip to be tested needs to be installed on the installation seat of the board body during testing, the testing is convenient, various chips can be compatibly tested, and the compatibility is high. In addition, the heat dissipation part is arranged on the board body and is positioned above the memory and the main control I C after the heat dissipation part is installed, so that the heat dissipation effect is good when the board body works, the problem that the test stability is influenced due to overhigh temperature during testing is avoided, and the failure rate is greatly reduced.

Description

Chip test tray
Technical Field
The utility model relates to the field of chip aging tests, in particular to a chip test tray.
Background
At present, the MonoFlash chip batch test tool for the seal test aging cabinet is unreasonable in structural design, poor in test stability and poor in compatibility, and therefore the test efficiency and effect are affected.
SUMMERY OF THE UTILITY MODEL
The utility model aims to overcome the defects of the prior art and provides a chip test tray.
In order to achieve the purpose, the utility model adopts the following technical scheme:
a chip test tray comprising:
a tray main body;
an aging board provided with a socket; and
a transfer plate assembly;
the adapter plate assembly comprises a plate body, a memory, a master control IC and a mounting seat for mounting a chip; the plate body is inserted in the socket, and the memory, the master control IC and the mounting seat are all fixed on the plate body.
The further technical scheme is as follows: the aging plate is fixed on the tray main body through a connecting piece.
The further technical scheme is as follows: the connecting piece is a stud.
The further technical scheme is as follows: after the stud is installed, the position of the stud between the plate body and the aging plate forms a support column of the plate body.
The further technical scheme is as follows: and heat conducting pads are arranged on the surfaces of the memory and the master control IC.
The further technical scheme is as follows: the heat dissipation plate further comprises a heat dissipation piece arranged on the plate body.
The further technical scheme is as follows: after the heat dissipation member is installed, the heat dissipation member is located above the memory and the main control IC so as to cover the memory and the main control IC.
The further technical scheme is as follows: and the plate body is provided with a contact pin which is connected and matched with the heat radiating piece.
The further technical scheme is as follows: the tray comprises a tray main body and an aging plate, and further comprises an anti-static insulating piece positioned between the tray main body and the aging plate.
The further technical scheme is as follows: the tray main body is provided with a handle.
Compared with the prior art, the utility model has the beneficial effects that: according to the board body with the main control IC, only the chip to be tested needs to be installed on the installation seat of the board body during testing, testing is convenient, various chips can be compatibly tested, and compatibility is high. In addition, the heat dissipation part is arranged on the plate body and is positioned above the memory and the main control IC after being installed, so that the heat dissipation effect is good when the plate body works, the problem that the test stability is influenced due to overhigh temperature during the test is avoided, and the fault rate is greatly reduced.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented according to the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more apparent, the following detailed description will be given of preferred embodiments.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a chip test tray according to an embodiment of the present invention;
FIG. 2 is an exploded view of a chip test tray according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a connection board assembly in a chip test tray according to an embodiment of the present invention.
Reference numerals
1. A tray main body; 2. an antistatic insulating member; 3. aging the board; 4. a transfer plate assembly; 41. a plate body; 42. a mounting seat; 43. a memory; 44. a master control IC; 45. a thermally conductive pad; 46. inserting a pin; 5. a stud; 6. a handle; 7. a golden finger; 8. a heat sink.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to specific embodiments of the present invention, and it should be understood that the described embodiments are a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the utility model herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the utility model. As used in this specification and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
The utility model is mainly used for batch test of the MonoFlash chips of the sealed test aging cabinet, can test products such as BICS4, B27 and the like, supports 400Mbps test, and is compatible with 400Mbps products such as MicronL06B, TSB BICS3 and the like. The utility model is described below by means of specific embodiments.
As shown in fig. 1 to 3, a chip test tray includes a tray body 1, a burn-in board 3, and an interposer assembly 4. The aging board 3 is provided with a socket. The interposer assembly 4 includes a board body 41, a memory 43, a main control IC44, and a mounting seat 42 for mounting a chip; the board 41 is plugged into the socket, and the memory 43, the main control IC44 and the mounting seat 42 are all fixed on the board 41. During testing, the chip is placed in the mounting seat 42, and the whole test tray is transported to the aging cabinet test equipment by the transfer vehicle.
On one tray body 1, a plurality of adapter board assemblies 4 can be mounted, that is, a plurality of chips can be tested at the same time, as shown in fig. 1, in the present embodiment, there are forty mounting seats 42, and forty chips can be tested at the same time.
Preferably, the aging plate 3 is fixed on the tray main body 1 through a connecting piece, and in the embodiment, the connecting piece is a stud 5. The advantage of selecting the stud 5 is that the stud 5 is cylindrical, and after the stud 5 is installed, the part of the stud 5 located between the plate body 41 and the aging plate 3 can form a support pillar of the plate body 41, so as to support the plate body 41, and the plate body 41 does not need to be designed with an additional support structure to support the plate body 41. In addition, the reason why the board body 41 needs to be supported is that the board body 41 is plugged into the socket through the plug thereof, and if there is no supporting structure, the weight of the chip, the memory 43 and other objects above the board body 41 is supported by the plug and the socket after the chip is mounted, which easily causes damage to the plug and the socket.
In some embodiments, such as the present embodiment, as shown in FIG. 3, the surfaces of the memory 43 and the master IC44 are each provided with thermal pads 45. Because the memory 43 and the main control IC44 are main heating elements, the surface of the memory 43 and the main control IC44 can be adhered with heat conduction electricity to achieve the effect of rapid heat conduction, so that the heat conduction efficiency is improved, and the surface memory 43 and the main control IC44 have too high temperature and cannot radiate heat in time.
In some embodiments, in order to further improve the efficiency of heat dissipation and maintain the stability of the test, as shown in fig. 1 and 2, the test tray further includes a heat sink 8 mounted on the board body 41. After heat sink 8 is mounted, heat sink 8 is positioned over memory 43 and master IC44 to cover memory 43 and master IC 44. According to the principle of hot air rising, the heat sink 8 is located closer to and above the memory 43 and the main control IC44, so that the heat dissipated by the memory 43 and the main control IC44 is absorbed by the heat sink 8 and dissipated quickly after rising, and therefore, the memory 43 and the main control IC44 do not accumulate heat and cause over-temperature.
In this embodiment, the heat dissipation member 8 is made of aluminum, and the heat dissipation member 8 is formed by a plurality of sheet-shaped louvers. In order to facilitate the assembly and disassembly of the heat sink 8, a pin 46 connected and matched with the heat sink 8 is disposed on the plate body 41, and the heat sink 8 is fixed on the plate body 41 in an insertion manner.
As shown in fig. 2, the test tray further includes an anti-static insulating member 2 located between the tray main body 1 and the aging board 3, and the anti-static insulating member 2 has a sheet structure and plays roles of static prevention and insulation.
In some embodiments, the tray body 1 is provided with a handle 6, and the handle 6 is provided to facilitate the transfer of the test tray.
During aging test, the test tray provided with the test chip is put into the transfer cart and pushed to the front of the aging test cabinet, then the test tray is transferred to the material frame in the aging test cabinet, the gold finger 7 at the front end of each test tray is inserted into the slot on the control panel, the assembly is completed, and the aging test can be started after the door of the aging test cabinet is closed.
To sum up: according to the board body with the main control IC, only the chip to be tested needs to be installed on the installation seat of the board body during testing, testing is convenient, various chips can be compatibly tested, and compatibility is high. In addition, the heat dissipation part is arranged on the plate body and is positioned above the memory and the main control IC after being installed, so that the heat dissipation effect is good when the plate body works, the problem that the test stability is influenced due to overhigh temperature during the test is avoided, and the fault rate is greatly reduced.
While the utility model has been described with reference to specific embodiments, the utility model is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the utility model. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (10)

1. A chip test tray, comprising:
a tray main body;
an aging board provided with a socket; and
a transfer plate assembly;
the adapter plate assembly comprises a plate body, a memory, a master control IC and a mounting seat for mounting a chip; the plate body is inserted in the socket, and the memory, the master control IC and the mounting seat are all fixed on the plate body.
2. The chip test tray according to claim 1, wherein the burn-in board is fixed to the tray body by a connecting member.
3. The chip test tray of claim 2, wherein the connectors are studs.
4. The chip testing tray according to claim 3, wherein after the studs are mounted, the positions of the studs between the board body and the burn-in board constitute support columns of the board body.
5. The chip test tray according to claim 1, wherein the surface of the memory and the master IC are provided with thermal pads.
6. The chip test tray of claim 1, further comprising a heat sink mounted to the plate body.
7. The chip test tray according to claim 6, wherein the heat sink is positioned above the memory and the main control IC to cover the memory and the main control IC after the heat sink is mounted.
8. The chip testing tray according to claim 6, wherein the board body is provided with pins for connecting and matching with the heat sink.
9. The chip test tray of claim 1, further comprising an anti-static insulation between the tray body and the burn-in board.
10. The chip test tray according to claim 1, wherein the tray body is provided with a handle.
CN202122838953.3U 2021-11-18 2021-11-18 Chip test tray Active CN216670184U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202122838953.3U CN216670184U (en) 2021-11-18 2021-11-18 Chip test tray

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202122838953.3U CN216670184U (en) 2021-11-18 2021-11-18 Chip test tray

Publications (1)

Publication Number Publication Date
CN216670184U true CN216670184U (en) 2022-06-03

Family

ID=81784180

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202122838953.3U Active CN216670184U (en) 2021-11-18 2021-11-18 Chip test tray

Country Status (1)

Country Link
CN (1) CN216670184U (en)

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