CN211785921U - Semiconductor test board with adapter plate and semiconductor test equipment - Google Patents
Semiconductor test board with adapter plate and semiconductor test equipment Download PDFInfo
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- CN211785921U CN211785921U CN202022003569.7U CN202022003569U CN211785921U CN 211785921 U CN211785921 U CN 211785921U CN 202022003569 U CN202022003569 U CN 202022003569U CN 211785921 U CN211785921 U CN 211785921U
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Abstract
The application relates to a semiconductor test panel and semiconductor test equipment with keysets belongs to semiconductor test technical field, and the semiconductor test panel includes: a semiconductor test substrate provided with a test interface; the adapter plate comprises an adapter substrate, and a first connector and a second connector which are in signal connection with each other are arranged on the adapter substrate; the first connector is detachably connected with the test interface, and the second connector is detachably connected with external test equipment. The semiconductor test board is provided with the adapter plate, the test interface of the semiconductor test substrate is detachably connected with the first connector of the adapter plate, and the adapter plate is connected with external test equipment in an inserting mode through the second connector. When the plugging times of the second connector reach the service life, only the semiconductor test board needs to be replaced by a new adapter board, so that the service life of the semiconductor test board is prolonged. The application also discloses a semiconductor test device.
Description
Technical Field
The present disclosure relates to semiconductor testing technologies, and more particularly, to a semiconductor testing board with an interposer and a semiconductor testing device.
Background
In order to achieve the yield of semiconductor chips, almost all semiconductor chips are subjected to burn-in test before shipment. The burn-in test is to provide necessary system signals for the semiconductor chip to be tested through a semiconductor test board, simulate the working state of the semiconductor chip, accelerate the electrical fault of the semiconductor chip under the condition of high temperature or other conditions, acquire the fault rate of the semiconductor chip within a period of time, and enable the semiconductor chip to work under a given load state to enable the defects of the semiconductor chip to appear within a short time, thereby obtaining the approximate fault rate of the semiconductor chip in the life cycle and avoiding the faults occurring in the early stage of use.
In the related art, during the semiconductor chip burn-in test, the semiconductor chip to be tested is usually placed in the chip testing seat of the semiconductor testing board, after the semiconductor chip is loaded, the semiconductor testing board is placed in the burn-in oven chamber, and the testing interface of the semiconductor testing board is plugged into the wall connector installed on the burn-in oven chamber. And after the aging test is finished, pulling out the semiconductor test board, taking down the semiconductor chip, carrying out the next round of test, and sequentially circulating the aging test.
However, the test interface of the semiconductor test board is usually plugged into the wall surface connector of the chamber of the burn-in oven by using a gold finger or a high-density connector, and the frequent plugging and unplugging of the test interface of the semiconductor test board is likely to cause damage, resulting in poor contact or breakage, reducing the service life of the semiconductor test board and affecting the test result of the semiconductor chip.
The plugging life of the golden finger is about 1000 times, and the plugging life of the high-density connector is only about 200 times. When high-speed testing is carried out, a high-density connector is needed, and 200 times of testing is far insufficient for occasions requiring frequent plugging and unplugging. When the test interface of the semiconductor test board reaches a certain number of plugging times, the semiconductor test board needs to be frequently replaced, which increases the cost of the aging test.
SUMMERY OF THE UTILITY MODEL
The embodiment of the application provides a semiconductor test board with an adapter plate and semiconductor test equipment, which are used for solving the problems that in the related technology, a test interface of the frequently plugged semiconductor test board is easy to damage, poor contact or damage occurs, the service life of the semiconductor test board is shortened, and the test result of a semiconductor chip is influenced.
The embodiment of the application provides a semiconductor test board with keysets, includes:
a semiconductor test substrate provided with a test interface;
the adapter plate comprises an adapter substrate, and a first connector and a second connector which are electrically connected with each other are arranged on the adapter substrate;
the first connector is detachably connected with the test interface.
In some embodiments: the semiconductor test substrate is detachably connected with the switching substrate.
In some embodiments: the semiconductor testing device comprises a semiconductor testing substrate, a switching substrate and a connecting base plate, wherein the semiconductor testing substrate is fixedly connected with a first fixing seat, the switching substrate is fixedly connected with a second fixing seat, and the first fixing seat and the second fixing seat are detachably connected.
In some embodiments: the semiconductor test substrate is provided with at least two first positioning holes, and the bottom of the first fixing seat is provided with a first positioning pin matched with the first positioning holes;
the adapter substrate is provided with at least two second positioning holes, and the bottom of the second fixing seat is provided with a second positioning pin matched with the second positioning holes.
In some embodiments: the first fixing seat is provided with a plurality of first threaded holes, the second fixing seat is provided with a plurality of through holes, and the through holes penetrate through the first threaded holes to be connected with screws.
In some embodiments: a plurality of second threaded holes are formed in the second fixing seat, screws are connected in the second threaded holes in an internal thread mode, and one end of each screw is abutted to the first fixing seat.
In some embodiments: the first fixing seat is provided with a third positioning pin, and the second fixing seat is provided with a positioning pin hole matched with the third positioning pin;
the bottom of the first fixing seat and the bottom of the second fixing seat are both provided with grooves, and the test interface and the first connector are located in the grooves.
In some embodiments: one side of the switching substrate is provided with two positioning pin seats, and the two positioning pin seats are symmetrically arranged on two sides of the switching substrate;
the semiconductor test substrate and the adapter plate are provided with reinforcing frames, and the reinforcing frames are detachably connected with the semiconductor test substrate and the adapter plate.
A second aspect of embodiments of the present application provides a semiconductor test apparatus, including:
the semiconductor test board with the interposer as set forth in any one of the above.
In some embodiments, further comprising:
the semiconductor test board is detachably connected with the test core board through the second connector;
the incubator is equipped with first warm-up area and second warm-up area in the incubator, the semiconductor is surveyed the board and is located first warm-up area, test nuclear core plate is located the second warm-up area.
The beneficial effect that technical scheme that this application provided brought includes:
the embodiment of the application provides a semiconductor test board with an adapter plate and semiconductor test equipment, wherein the semiconductor test board comprises a semiconductor test substrate, and a test interface is arranged on the semiconductor test substrate; the adapter plate comprises an adapter substrate, and a first connector and a second connector which are electrically connected with each other are arranged on the adapter substrate; the first connector is detachably connected with the test interface, and the second connector is detachably connected with external test equipment.
Therefore, the semiconductor test board is provided with the adapter plate, the test interface of the semiconductor test substrate is detachably connected with the first connector of the adapter plate, and the adapter plate is connected with external test equipment in an inserting mode through the second connector. During testing, the testing interface of the semiconductor testing board is relatively fixed with the first connector of the adapter board, and only the second connector of the adapter board is required to be plugged with the semiconductor testing equipment. When the plugging times of the second connector reach the service life, only the semiconductor test board needs to be replaced by a new adapter board, so that the service life of the semiconductor test board is prolonged.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a top view of a structure according to an embodiment of the present application;
FIG. 2 is a top view of the structure with the first and second fixing bases installed thereon according to the embodiment of the present disclosure;
fig. 3 is a perspective view of the structure of the embodiment of the present application with a first fixing seat and a second fixing seat installed thereon;
fig. 4 is a perspective view of a first fixing base according to an embodiment of the present application;
fig. 5 is a perspective view of a second fixing base according to an embodiment of the present application;
fig. 6 is a top view of the structure with the reinforcing frame installed according to the embodiment of the present application.
Reference numerals:
1. a semiconductor test substrate; 11. a test interface; 12. a first positioning hole;
2. an adapter plate; 21. transferring the substrate; 22. a first connector; 23. a second connector; 24. a second positioning hole;
3. a first fixed seat; 31. a first positioning pin; 32. a first threaded hole; 33. a third positioning pin;
4. a second fixed seat; 41. a second positioning pin; 42. a through hole; 43. a positioning pin hole; 44. a second threaded hole;
5. positioning a pin boss; 6. the frame is reinforced.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The embodiment of the application provides a semiconductor test board with an adapter plate and semiconductor test equipment, which can solve the problems that in the related technology, a test interface of a frequently plugged semiconductor test board is easy to damage, poor contact or damage occurs, the service life of the semiconductor test board is shortened, and the test result of a semiconductor chip is influenced.
In the following embodiments of the present application, the application of the semiconductor burn-in test is taken as an example, and the technical solution of the present application is described in detail. However, the embodiments of the present application are not limited thereto, and any semiconductor test apparatus scheme using the inventive concept of the present application is within the scope of the present application.
Referring to fig. 1, a first aspect of the embodiments of the present application provides a semiconductor test board with an interposer, including:
the semiconductor test substrate 1, the semiconductor test substrate 1 is equipped with the test interface 11, and the test interface 11 is used for the electric signal transmission of semiconductor test substrate 1.
The adapter plate 2, the adapter plate 2 includes the switching base plate 21, there are first interface unit 22 and second interface unit 23 electrically connected each other on the switching base plate 21; the first connector 22 is detachably connected to the test interface 11, and the second connector 23 is adapted to be detachably connected to an external test device. Preferably, the first connector 22 is connected with the test interface 11 by plugging; the second connector 23 is connected to the external test equipment by plugging.
The semiconductor test board is provided with the adapter plate 2, the test interface 11 of the semiconductor test substrate 1 is detachably connected with the first connector 22 of the adapter plate 2, and the adapter plate 2 is connected with external test equipment through the second connector 23 in an inserting mode. During the burn-in test, the test interface 11 of the semiconductor test substrate 1 and the first connector 22 of the interposer 2 are fixed relatively, and only the second connector 23 of the interposer 2 needs to be plugged into an external test device.
When the plugging times of the second connector 23 reach the service life, only the semiconductor test board needs to be replaced by the new adapter board 2, so that the service life of the semiconductor test board is prolonged, and the aging test cost is reduced. Assuming that the test interface 11 of the semiconductor test substrate 1 has a lifetime of 200 times and the first connector 22 and the second connector 23 have a lifetime of 200 times, the lifetime of the semiconductor test substrate 1 can reach 200 × 200=40000 times, which is sufficient to satisfy the lifetime requirement throughout the lifetime of the test equipment.
In some alternative embodiments: referring to fig. 1, the embodiment of the present application provides a semiconductor test board with an interposer, the semiconductor test board has a plurality of first connectors 22, a plurality of first connectors 22 form a first connector group, a plurality of second connectors 23 form a second connector group, and a plurality of second connectors 23 form a second connector group.
The test interfaces 11 are provided with a plurality of test interfaces 11, the plurality of test interfaces 11 are connected with the first connector group, and the second connector group is detachably connected with the external test equipment.
The first connector set and the second connector set are arranged at intervals along the length direction of the adapting substrate 21, and the first connector set and the second connector set are respectively located at two ends of the adapting substrate 21.
In some alternative embodiments: referring to fig. 2 to 4, the embodiment of the present application provides a semiconductor test board having an interposer, in which a semiconductor test substrate 1 is detachably connected to an interposer substrate 21.
Specifically, a first fixing seat 3 is disposed on one side of the semiconductor test substrate 1, which is close to the test interface 11, and the first fixing seat 3 is fixedly connected to the semiconductor test substrate 1. One side that is close first connector 22 on the switching base plate 21 is equipped with second fixing base 4, second fixing base 4 and switching base plate 21 fixed connection, and first fixing base 3 passes through screw fastening connection with second fixing base 4.
Three first threaded holes 32 are formed in the first fixed seat 3 on the side close to the second fixed seat 4. One side that is close first fixing base 3 on second fixing base 4 is equipped with three through-hole 42, three first screw hole 32 and three through-hole 42 one-to-one. The screw penetrates through the through hole 42 and is in threaded connection with the first threaded hole 32, and the first fixing seat 3 and the second fixing seat 4 are connected into a whole.
The semiconductor test substrate 1 of the embodiment of the application is provided with the first fixing seat 3, the switching substrate 21 of the adapter plate 2 is provided with the second fixing seat 4, and the first fixing seat 3 is connected with the second fixing seat 4 through screw fastening. Due to the large number of the test interfaces 11 and the first connectors 22, the insertion resistance of the test interfaces 11 and the first connectors 22 is large, time and labor are wasted, and complete insertion cannot be ensured. The embodiment of the application is provided with the first fixing seat 3 on the semiconductor test substrate 1, the second fixing seat 4 on the adapter substrate 21, and the wrench tool is used for screwing the screw to connect the first fixing seat 3 and the second fixing seat 4 to assist in the rapid insertion of the test interface 11 and the first connector 22.
In some alternative embodiments: referring to fig. 1 to 5, an embodiment of the present application provides a semiconductor test board with an adapter plate, a semiconductor test substrate 1 of the semiconductor test board is fixedly connected to a first fixing base 3 through screws, two first positioning holes 12 are disposed on the semiconductor test substrate 1, the two first positioning holes 12 are symmetrically disposed on two sides of the semiconductor test substrate 1, and a first positioning pin 31 matched with the first positioning hole 12 is disposed at the bottom of the first fixing base 3. The adapter substrate 21 is fixedly connected with the second fixing seat 4 through screws, two second positioning holes 24 are formed in the adapter substrate 21, the two second positioning holes 24 are symmetrically located on two sides of the adapter substrate 21, and a second positioning pin 41 matched with the second positioning holes 24 is arranged at the bottom of the second fixing seat 4. One side that is close second fixing base 4 on the first fixing base 3 is equipped with third locating pin 33, and one side that second fixing base 4 is close first fixing base 3 is equipped with the locating pin hole 43 with third locating pin 33 complex.
In the embodiment of the application, for the accurate alignment of the test interface 11 of the semiconductor test substrate 1 and the first connector 22 of the adapter plate 2, two first positioning holes 12 are arranged on the semiconductor test substrate 1, the bottom of the first fixing seat 3 is provided with the first positioning pin 31 matched with the first positioning holes 12, and the first fixing seat 3 and the semiconductor test substrate 1 are accurately installed and positioned. Two second positioning holes 24 are formed in the adapter substrate 21, and a second positioning pin 41 matched with the second positioning holes 24 is arranged at the bottom of the second fixing seat 4, so that the second fixing seat 4 and the adapter substrate 21 can be accurately installed and positioned. The third positioning pin 33 on the first fixing seat 3 is matched with the positioning pin hole 43 on the second fixing seat 4, so that the first fixing seat 3 and the second fixing seat 4 are accurately aligned.
In some alternative embodiments: referring to fig. 5, in the semiconductor test board with the adapter plate according to the embodiment of the present application, three second threaded holes 44 are formed in one side of the second fixing seat 4 close to the first fixing seat 3 of the semiconductor test board, a screw (not shown in the figure) is connected to the second threaded hole 44 in an internal thread manner, and one end of the screw abuts against the first fixing seat 3.
In order to rapidly pull out and separate the test interface 11 and the first connector 22, three second threaded holes 44 are formed in one side, close to the first fixing seat 3, of the second fixing seat 4, the screw is connected to the inner thread of the second threaded hole 44, and one end of the screw abuts against the first fixing seat 3. Adopt spanner instrument to twist the screw in the second screw hole 44, the one end and the first fixing base 3 of screw offset, the relative first fixing base 3's of second fixing base 4 distance crescent, until test interface 11 and first connector 22 break away from completely, supplementary test interface 11 and first connector 22 pull out fast.
In some alternative embodiments: referring to fig. 3 to 5, an embodiment of the present application provides a semiconductor test board with an adapter plate, where a first fixing seat 3 and a second fixing seat 4 of the semiconductor test board are both in a strip structure, a plurality of grooves are formed at the bottoms of the first fixing seat 3 and the second fixing seat 4, and a test interface 11 and a first connector 22 are located in the grooves.
The test interface 11 and the first connector 22 of this application embodiment are located first fixing base 3 and 4 recesses of second fixing base, and when test interface 11 and the plug of first connector 22, first fixing base 3 and second fixing base 4 can be with the direct effect of plug power on test interface 11 and first connector 22, improve plug efficiency.
In some alternative embodiments: referring to fig. 1 to 3, in the present embodiment, a semiconductor test board with an interposer is provided, where two positioning pin sockets 5 are disposed on one side of the interposer substrate 21 close to the second connector 23, the two positioning pin sockets 5 are symmetrically disposed on two sides of the interposer substrate 21, and the positioning pin sockets 5 are used for being in pin connection with a wall surface of the aging oven working chamber, so as to ensure that the second connector 23 is accurately inserted into the wall surface of the aging oven working chamber, and avoid damaging the second connector 23.
In some alternative embodiments: referring to fig. 6, the embodiment of the present application provides a semiconductor test board with an interposer, the semiconductor test board further includes a stiffener frame 6, and the stiffener frame 6 is detachably connected to the semiconductor test substrate 1 and the interposer 2. The semiconductor test substrate 1 and the adapter plate 2 are fixed on the reinforcing frame 6, and the reinforcing frame 6 is used for enhancing the rigidity of the semiconductor test substrate 1 and the adapter plate 2 and avoiding bending and breaking in the using process.
Principle of operation
The embodiment of the application provides a semiconductor test board with an adapter plate, which comprises a semiconductor test substrate 1, wherein a test interface 11 is arranged on the semiconductor test substrate; the adapter plate 2 comprises an adapter substrate 21, wherein a first connector 22 and a second connector 23 which are in signal connection with each other are arranged on the adapter substrate 21; the first connector 22 is detachably connected to the test interface 11, and the second connector 23 is adapted to be detachably connected to an external test device.
The semiconductor test board is provided with the adapter plate 2, the test interface 11 of the semiconductor test substrate 1 is detachably connected with the first connector 22 of the adapter plate 2, and the adapter plate 2 is connected with external test equipment through the second connector 23 in an inserting mode. During the burn-in test, the test interface 11 of the semiconductor test substrate 1 and the first connector 22 of the interposer 2 are relatively fixed, and only the second connector 23 of the interposer 2 needs to be plugged into an external test device. When the plugging times of the second connector 23 reach the service life, only the semiconductor test substrate 1 needs to be replaced by a new adapter plate 2, so that the service life of the semiconductor test substrate 1 is prolonged.
A second aspect of embodiments of the present application provides a semiconductor test apparatus, including:
the semiconductor test board with the interposer according to any of the above embodiments.
And a test core board to which the semiconductor test board is detachably connected through a second connector 23.
The semiconductor test board is located in the first temperature zone, and the test core board is located in the second temperature zone. Be equipped with the insulating layer between first warm-pressing area and second warm-pressing area, test nuclear core plate is equipped with the backplate, and the backplate passes the insulating layer and passes through second connector 23 detachable connection with the semiconductor test board.
The utility model provides a semiconductor aging testing equipment is equipped with the incubator, and semiconductor testing substrate 1 and keysets 2 of semiconductor testing board all are located the first warm-area of incubator. The second temperature zone is arranged in the incubator, a test core board for providing power supply signals and test signals for the semiconductor test substrate 1 and the adapter board 2 is arranged in the second temperature zone, and the second connector 23 of the adapter board 2 is connected with the test core board in a plugging mode. Certainly, the test core board is further provided with a back board connected with the adapter board 2, and the second connector 23 of the adapter board 2 is connected with the back board in a plugging and unplugging manner, so that signal transmission of the semiconductor test substrate 1 is realized.
In the description of the present application, it should be noted that the terms "upper", "lower", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, which are only for convenience in describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and operate, and thus, should not be construed as limiting the present application. Unless expressly stated or limited otherwise, the terms "mounted," "connected," and "connected" are intended to be inclusive and mean, for example, that they may be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
It is noted that, in the present application, relational terms such as "first" and "second", and the like, are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above description is merely exemplary of the present application and is presented to enable those skilled in the art to understand and practice the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A semiconductor test board having an interposer, comprising:
a semiconductor test substrate (1) provided with a test interface (11);
the adapter plate (2), the adapter plate (2) includes an adapter substrate (21), the adapter substrate (21) is provided with a first connector (22) and a second connector (23) which are electrically connected with each other;
the first connector (22) is detachably connected with the test interface (11).
2. The semiconductor test board with the interposer as recited in claim 1, wherein:
the semiconductor test substrate (1) is detachably connected with the switching substrate (21).
3. The semiconductor test board with the interposer as recited in claim 1, wherein:
the semiconductor testing device is characterized in that a first fixing seat (3) is fixedly connected to the semiconductor testing substrate (1), a second fixing seat (4) is fixedly connected to the switching substrate (21), and the first fixing seat (3) is detachably connected with the second fixing seat (4).
4. A semiconductor test board having an interposer as claimed in claim 3, wherein:
the semiconductor test substrate (1) is provided with at least two first positioning holes (12), and the bottom of the first fixing seat (3) is provided with a first positioning pin (31) matched with the first positioning holes (12);
the adapter substrate (21) is provided with at least two second positioning holes (24), and the bottom of the second fixing seat (4) is provided with a second positioning pin (41) matched with the second positioning holes (24).
5. A semiconductor test board having an interposer as claimed in claim 3, wherein:
be equipped with a plurality of first screw holes (32) on first fixing base (3), be equipped with a plurality of through-holes (42) on second fixing base (4), through-hole (42) with first screw hole (32) penetrate the screw connection.
6. A semiconductor test board having an interposer as claimed in claim 3, wherein:
a plurality of second threaded holes (44) are formed in the second fixing seat (4), screws are connected to the second threaded holes (44) in an internal thread mode, and one end of each screw is abutted to the first fixing seat (3).
7. A semiconductor test board having an interposer as claimed in claim 3, wherein:
the first fixing seat (3) is provided with a third positioning pin (33), and the second fixing seat (4) is provided with a positioning pin hole (43) matched with the third positioning pin (33);
the bottom of the first fixing seat (3) and the bottom of the second fixing seat (4) are both provided with grooves, and the test interface (11) and the first connector (22) are located in the grooves.
8. The semiconductor test board with the interposer as recited in claim 1, wherein:
positioning pin seats (5) are arranged on one side of the switching substrate (21), two positioning pin seats (5) are arranged, and the two positioning pin seats (5) are symmetrically arranged on two sides of the switching substrate (21);
semiconductor test base plate (1) and keysets (2) are equipped with strengthening frame (6), strengthening frame (6) with semiconductor test base plate (1) and keysets (2) can dismantle the connection.
9. A semiconductor test apparatus, comprising:
the semiconductor test board with an interposer as claimed in any one of claims 1 to 8.
10. The semiconductor test apparatus of claim 9, further comprising:
the semiconductor test board is detachably connected with the test core board through the second connector (23);
the incubator is equipped with first warm-up area and second warm-up area in the incubator, the semiconductor is surveyed the board and is located first warm-up area, test nuclear core plate is located the second warm-up area.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202022003569.7U CN211785921U (en) | 2020-09-14 | 2020-09-14 | Semiconductor test board with adapter plate and semiconductor test equipment |
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| CN202022003569.7U CN211785921U (en) | 2020-09-14 | 2020-09-14 | Semiconductor test board with adapter plate and semiconductor test equipment |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113125936A (en) * | 2021-03-04 | 2021-07-16 | 杭州长川科技股份有限公司 | Aging test device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113125936A (en) * | 2021-03-04 | 2021-07-16 | 杭州长川科技股份有限公司 | Aging test device |
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