CN217879520U - Multi-board chip testing all-in-one machine - Google Patents

Multi-board chip testing all-in-one machine Download PDF

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Publication number
CN217879520U
CN217879520U CN202221643717.4U CN202221643717U CN217879520U CN 217879520 U CN217879520 U CN 217879520U CN 202221643717 U CN202221643717 U CN 202221643717U CN 217879520 U CN217879520 U CN 217879520U
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test
positioning
testing
board
guide
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CN202221643717.4U
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张治强
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Guangdong Changxing Semiconductor Technology Co ltd
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Guangdong Changxing Semiconductor Technology Co ltd
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Abstract

The utility model discloses a many boards chip test all-in-one, including the test jig, install a plurality of test host computers and a workstation on the test jig, establish testing arrangement, positioner and monitoring arrangement on the workstation. The utility model discloses a set up a plurality of test hosts and test fixture that can be connected electrically one by one on the all-in-one, can once only carry out synchronous detection to the whole dish chip on a plurality of test panels, obviously promote detection efficiency; by arranging the test device, the test process of each test board can be controlled, and the influence of manual misoperation on the test result is avoided or reduced; by arranging the monitoring device, the detection result of each test board can be synchronously and visually displayed, so that the follow-up processing of operators is facilitated, and the use is convenient.

Description

Multi-board chip testing all-in-one machine
Technical Field
The utility model relates to a chip testing technology field, in particular to many boards chip test all-in-one.
Background
Before the chip is applied to a terminal product, the chip generally needs to go through stages of design, manufacture, test, packaging and the like, wherein the chip test is inserted in the whole production process of the chip, the test result is an important basis in the chip design and manufacture, the yield of the chip is ensured accordingly, and different chips are directly classified and screened accordingly so as to be applied to different industry fields.
After the chips are packaged, testing of BIN levels of single chips is generally required, currently, whole-board testing is mostly carried out manually, the single-person testing efficiency generally does not exceed 1000/hour, personnel with certain experience are required to operate, the labor intensity of the personnel is high, but the efficiency is low, and the requirement of mass production is difficult to meet; under the background that the labor cost greatly rises at present, enterprises face great production pressure.
SUMMERY OF THE UTILITY MODEL
To the problem that exists among the above-mentioned prior art, the utility model provides a many boards chip test all-in-one can once only carry out synchronous detection to a plurality of whole chips of surveying on surveying the test panel, obviously promote detection efficiency to can avoid or reduce the influence of people's maloperation to the test result, it is convenient to use.
In order to solve the technical problem, the utility model discloses a technical scheme as follows:
a multi-board chip testing all-in-one machine, comprising:
the test frame is provided with a plurality of test hosts and a workbench;
the test assembly is arranged on the workbench and comprises a test device and a positioning device: the positioning device is provided with a plurality of positioning jigs, each positioning jig can fix a test board bearing a whole disk of chips on the positioning device, and each test board can be electrically connected with a positioning device on the positioning jig; the testing device can be used for connecting or disconnecting the electric connection between each positioning jig and one testing host;
and the monitoring device is arranged on the workbench, is electrically connected with each test host and can display the test result of each test host.
As a further elaboration of the above technical solution:
in the above technical scheme, the testing device includes a testing box and a plurality of components arranged therein, the testing box is provided with more than one control component and a plurality of connecting gates, each control component can be connected or disconnected with the power supply of the testing integrated machine, and each connecting gate can be connected or disconnected with the electrical connection between one testing host and one positioning fixture.
In the above technical scheme, the positioning device comprises a positioning box and a plurality of components arranged in the positioning box, a plurality of clamping grooves are arranged on the positioning box at equal intervals, and each positioning jig is arranged at the upper end part of the positioning box and erected between every two clamping grooves.
In the above technical solution, each positioning fixture includes an i-shaped positioning plate, and the flat and narrow area in the middle of the positioning fixture is arranged above the middle of each two clamping grooves; the symmetry is established to the both sides of locating plate has a set of guide, every group the bottom of guide all is equipped with a picture peg, every on the picture peg all be equipped with survey the slot of panel adaptation, every all be equipped with on the inner wall of slot a plurality of with survey the golden finger of panel adaptation, every establish before the picture peg is equal one the bottom portion of draw-in groove, every group a tip of guide all extends to perpendicularly in the draw-in groove.
In the above technical scheme, a plurality of warning lights are further arranged on the positioning box, and each warning light is electrically connected with one of the plug boards.
In the above technical scheme, every group the guide all includes two guide blocks, every the guide block voltage-sharing leans on locating plate and/or one on the lateral wall of draw-in groove, every on the guide block towards all be equipped with on the lateral wall of picture peg more than one with survey the guide slot of test board adaptation.
Compared with the prior art, the beneficial effects of the utility model reside in that: the integrated machine is provided with the plurality of test hosts and the test fixtures which can be electrically connected one by one, so that the whole disk of chips on the plurality of test boards can be synchronously detected at one time, and the detection efficiency is obviously improved; by arranging the test device, the test process of each test board can be controlled, and the influence of manual misoperation on a test result is avoided or reduced; by arranging the monitoring device, the detection result of each test board can be synchronously and visually displayed, so that the follow-up processing of operators is facilitated, and the use is convenient.
Drawings
FIG. 1 is a front view of the present embodiment;
FIG. 2 is a plan view of the positioning box in the present embodiment;
FIG. 3 is an enlarged schematic view of portion A of FIG. 2;
fig. 4 is a schematic structural view of the positioning plate and the guide member in the present embodiment.
In the figure: 10. a test jig; 20. a test host; 30. a work table; 40. a testing device; 41. a test cartridge; 411. an operation control member; 412. a connecting gate; 50. a positioning device; 51. a positioning box; 511. a card slot; 512. a warning light; 60. positioning a jig; 61. positioning a plate; 70. a test board; 80. a monitoring device; 90. a guide member; 91. a guide block; 92. a guide groove; 100. inserting plates; 110. and (4) a slot.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings.
The embodiments described by referring to the drawings are exemplary and intended to be used for explaining the present application and are not to be construed as limiting the present application. In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and thus should not be considered limiting. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise. In this application, unless expressly stated or limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can include, for example, fixed connections, removable connections, or integral connections; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate. In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. The first feature being "under," "beneath," and "under" the second feature includes the first feature being directly above and obliquely above the second feature, or simply meaning that the first feature is at a lesser level than the second feature.
As shown in fig. 1-4, a multi-board chip testing all-in-one machine comprises:
the test jig 10 is provided with a plurality of test hosts 20 and a workbench 30;
the testing assembly is arranged on the workbench 30 and comprises a testing device 40 and a positioning device 50: a plurality of positioning jigs 60 are arranged on the positioning device 50, each positioning jig 60 can fix a test board 70 bearing a whole disk of chips on the positioning device 50, and each test board 70 can be electrically connected with the positioning device 50 on one positioning jig 60; the testing device 40 can connect or disconnect the electrical connection between each positioning fixture 60 and a testing host 20;
and a monitoring device 80 arranged on the workbench 30, wherein the monitoring device 80 is electrically connected with each test host 20 and can display the test result of each test host 20.
The utility model discloses a set up a plurality of test hosts and test fixture that can be connected electrically one by one on the all-in-one, can once only carry out synchronous detection to the whole dish chip on a plurality of test panels, obviously promote detection efficiency; by arranging the monitoring device, the detection result of each test board can be synchronously and visually displayed, so that the follow-up processing of operators is facilitated, and the use is convenient.
Specifically, the testing device 40 includes a testing box 41 and a plurality of components arranged therein, the testing box 41 is provided with more than one control element 411 and a plurality of connecting gates 412, each control element 411 can be connected or disconnected with a power supply of the testing integrated machine, and each connecting gate 412 can be connected or disconnected with an electrical connection between a testing host 20 and a positioning fixture 60.
Specifically, the positioning device 50 includes a positioning box 51 and a plurality of components arranged therein, a plurality of slots 511 are arranged on the positioning box 51 at equal intervals, and each positioning fixture 60 is arranged at the upper end of the positioning box 51 and is erected between every two slots 511.
Specifically, each positioning jig 60 comprises an i-shaped positioning plate 61, and the narrow area in the middle of the positioning plate is arranged above the middle of each two clamping grooves 511; a set of guide members 90 is symmetrically arranged on two sides of the positioning plate 61, a plug board 100 is arranged at the bottom of each set of guide members 90, a slot 110 matched with the test board 70 is arranged on each plug board 100, a plurality of golden fingers matched with the test board 70 are arranged on the inner wall of each slot 110, each slot 110 is arranged at the bottom of a clamping groove 511 in front, and one end of each set of guide members 90 vertically extends into one clamping groove 511.
Specifically, the positioning box 51 is further provided with a plurality of warning lamps 512, and each warning lamp 512 is electrically connected to one of the boards 100.
Specifically, each set of guide members 90 includes two guide blocks 91, each guide block 91 presses against the positioning plate 61 and/or a sidewall of one of the slots, and each guide block 91 has at least one guide slot 92 on a sidewall facing the board 100, the guide slot being adapted to the test board 70.
In this embodiment, the number of the positioning fixture 60, the warning lamps 512 and the connecting gates 412 is the same, so that in the testing process, whether each testing board 70 is inserted in place can be checked conveniently at any time, and the testing board 70 can be connected with or disconnected from the testing circuit independently, so that the operation is convenient and fast, and the adverse effect of misoperation on the testing process is avoided or reduced.
Through the test, the utility model discloses an automated inspection speed can reach 8000/hour, and the erroneous judgement rate is 0, only need the normal plug of an operating personnel survey test panel can, detect with low costs, efficient, the rate of accuracy is high, also need not special technical requirement to operating personnel, can satisfy manufacturing enterprise's batch production demand.
The utility model discloses a test procedure as follows:
positioning: a plurality of test boards 70 bearing the whole disk of chips are sequentially inserted into each card slot 511, the two guide blocks 91 and the guide grooves 92 on the guide blocks can guide the insertion direction of the test boards 70 until the test boards 70 are completely inserted into the slots 110 on the plugboard 100, at the moment, each detection point on each test board 70 is in one-to-one matching contact connection with the gold fingers in the slots 110, and each test board 70 is positioned; at this time, whether each test board 70 is inserted in place can be visually checked by observing each warning light 512.
And (3) testing: the control element 411 is used for communicating the power supply of the all-in-one machine, communicating the circuits among the testing device 40, the testing host 20 and the monitoring device 80, closing the connecting brake 412 and communicating the circuits among the positioning device 50 and the testing device 40, so that each positioning jig 60 is electrically connected with one testing host 20; at this time, the monitoring device 80 is operated and checked to visually check the detection result of the chip on each test board 70. After the completion, the test board 70 is taken out, and the corresponding test board 70 (and the chip thereon) is marked according to the detection result and stored in a classified manner.
The above is not intended to limit the technical scope of the present invention, and any modifications, equivalent changes and modifications made to the above embodiments according to the technical spirit of the present invention are all within the scope of the technical solution of the present invention.

Claims (6)

1. The utility model provides a many boards chip test all-in-one which characterized in that includes:
the test frame is provided with a plurality of test hosts and a workbench;
the test component is arranged on the workbench and comprises a test device and a positioning device: the positioning device is provided with a plurality of positioning jigs, each positioning jig can fix a test board bearing a whole disk of chips on the positioning device, and each test board can be electrically connected with a positioning device on the positioning jig; the testing device can be used for connecting or disconnecting the electric connection between each positioning jig and one testing host;
and the monitoring device is arranged on the workbench, is electrically connected with each test host and can display the test result of each test host.
2. The integrated multi-board-chip testing machine according to claim 1, wherein the testing device comprises a testing box and a plurality of components arranged in the testing box, the testing box is provided with at least one operating member and a plurality of connecting gates, each operating member can be connected or disconnected with a power supply of the integrated testing machine, and each connecting gate can be connected or disconnected with an electric connection between one testing host and one positioning fixture.
3. The all-in-one machine for testing the multi-board chip as claimed in claim 1, wherein the positioning device comprises a positioning box and a plurality of components arranged in the positioning box, a plurality of clamping grooves are arranged on the positioning box at equal intervals, and each positioning jig is arranged at the upper end part of the positioning box and erected between every two clamping grooves.
4. The all-in-one machine for testing the multi-board chip as claimed in claim 3, wherein each positioning jig comprises an I-shaped positioning plate, and the narrow area in the middle of the positioning jig is arranged above the middle of every two clamping grooves; the symmetry is established to the both sides of locating plate has a set of guide, every group the bottom of guide all is equipped with a picture peg, every on the picture peg all be equipped with survey the slot of panel adaptation, every all be equipped with on the inner wall of slot a plurality of with survey the golden finger of panel adaptation, every establish before the picture peg is equal one the bottom portion of draw-in groove, every group a tip of guide all extends to perpendicularly in the draw-in groove.
5. The all-in-one machine for testing multiple chips according to claim 4, wherein a plurality of warning lamps are further arranged on the positioning box, and each warning lamp is electrically connected with one plug board.
6. The integrated multi-board chip testing machine according to claim 4, wherein each set of the guide members comprises two guide blocks, each guide block is pressed against the side wall of the positioning board and/or one of the slots in a pressure-equalizing manner, and more than one guide groove adapted to the test board is formed in each guide block on the side wall facing the insertion board.
CN202221643717.4U 2022-06-29 2022-06-29 Multi-board chip testing all-in-one machine Active CN217879520U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221643717.4U CN217879520U (en) 2022-06-29 2022-06-29 Multi-board chip testing all-in-one machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221643717.4U CN217879520U (en) 2022-06-29 2022-06-29 Multi-board chip testing all-in-one machine

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Publication Number Publication Date
CN217879520U true CN217879520U (en) 2022-11-22

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116047126A (en) * 2023-03-06 2023-05-02 长鑫存储技术有限公司 Test seat, circuit board and burn-in test device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116047126A (en) * 2023-03-06 2023-05-02 长鑫存储技术有限公司 Test seat, circuit board and burn-in test device
CN116047126B (en) * 2023-03-06 2024-04-19 长鑫存储技术有限公司 Test seat, circuit board and burn-in test device

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