CN216390932U - MMIC radio frequency power amplifier - Google Patents
MMIC radio frequency power amplifier Download PDFInfo
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- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
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- H—ELECTRICITY
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Abstract
The utility model provides an MMIC radio frequency power amplifier, wherein an amplifier chip unit is used for amplifying a single-end input signal and converting the single-end input signal into two paths of differential input signals; the output LC balun is used for converting the two paths of differential input signals to realize combination into a single-ended output signal; the output LC balun comprises a first LC unit connected in series with the first path of differential input signals and a second LC unit connected in series with the second path of differential input signals; and the second third harmonic trap network is used for outputting the single-ended output signal to an output end after the second third harmonic suppression is realized. Compared with the prior art, the MMIC radio frequency power amplifier has high output power, good harmonic suppression effect and high reliability.
Description
Technical Field
The utility model relates to the technical field of radio frequency integrated circuit design, in particular to an MMIC radio frequency power amplifier applied to a satellite mobile communication device.
Background
The satellite mobile communication system requires that the satellite mobile communication hand-held terminal can transmit high power of 5W power class to the maximum extent, the power of output harmonic waves is lower than-45 dBm, and the satellite mobile communication hand-held terminal can still reliably work under the condition of high standing-wave ratio of load mismatch. The transmitting performance of the satellite mobile communication handheld terminal is determined by the performance of a radio frequency power amplifier of the last-stage device of a transmitting link, and the output power level, the harmonic performance and the reliability of the radio frequency power amplifier determine the overall performance of a transmitter. Generally, the radio frequency power amplifier works in a large signal mode, and an output signal of the radio frequency power tube contains a large output harmonic component, particularly, the amplitude of a second-order third-order harmonic component is maximum. Harmonic components in the output signal may interfere with signals of other channels. The radio frequency power amplifier must be designed to effectively suppress harmonic components in the output signal.
In the prior art, the main integrated circuit processes for designing monolithic microwave integrated circuits MMICs include CMOS, SiGe HBT and GaAs HBT processes. The CMOS process is widely used in digital circuits, signal processing, radio frequency transceivers, and other circuits, and has an advantage in cost. However, for rf power amplifier designs, the lower breakdown voltage of CMOS devices limits their use for applications where higher powers are designed. Also, SiGe HBTs, which are based on silicon-based materials, are often used to design medium and low power driver amplifiers as well as low noise amplifiers. Because of the advantages of the GaAs HBT in terms of breakdown voltage, linearity, bandwidth, and efficiency, the GaAs HBT is more adopted in engineering practice to design a radio frequency power amplifier. However, the breakdown voltage of a common GaAs HBT device is only ten or more volts, and a radio frequency power amplifier can only be designed under a low power supply voltage working condition, the working power supply voltage of a typical satellite mobile communication handheld terminal is 5V, 4.5V, 3.7V, and the like, and a radio frequency signal with a power level of 5W is output, and a large working current flows through a power amplifier tube. In order to ensure reliable operation of the power amplifier tube, the saturated output power of the radio frequency power amplifier with a single-ended structure is often limited to about 3W, and a power combining method is needed to output a larger power. However, as shown in fig. one, the prior art wireless communication system often requires the rf power amplifier to be a single-ended input and single-ended output structure, and requires using Balun to perform single-ended and differential conversion. Fig. 1 shows a conventional rf power amplifier formed by using a spiral Balun in the prior art, in which an input terminal RFin is converted from a single terminal to a differential terminal by Balun1, and an output terminal RFout is converted from a differential terminal to a single terminal by Balun2, and two paths of power are synthesized at the same time.
However, the process characteristics of Monolithic Microwave Integrated Circuits (MMICs) determine that the rf power amplifier outputs 5W power, and the rf power transistor needs to operate under extreme conditions. Due to the limitation of the breakdown voltage of the GaAs HBT, the maximum output power of the GaAs HBT radio-frequency power tube must be limited to ensure that the radio-frequency power amplifier can still reliably work when the antenna load is mismatched. The insertion loss of the spiral Balun is large, and at the output end of the radio frequency power amplifier, the loss of radio frequency power after passing through the spiral Balun2 is large, so that the radio frequency power amplifier is not beneficial to outputting high radio frequency power.
Therefore, there is a need to provide a new MMIC rf power amplifier to solve the above problems.
SUMMERY OF THE UTILITY MODEL
Aiming at the defects of the related technologies, the utility model provides the MMIC radio-frequency power amplifier which is high in output power, good in harmonic suppression effect and good in reliability.
In order to solve the technical problem, the utility model provides an MMIC radio frequency power amplifier, which comprises an input end, an amplifier chip unit, an output LC balun, a second third harmonic trap network and an output end which are connected in sequence;
the amplifier chip unit is used for amplifying a single-ended input signal accessed by the input end in a gain mode and converting the single-ended input signal into a first path of differential input signal and a second path of differential input signal;
the output LC balun is used for converting the first path of differential input signal and the second path of differential input signal to realize combination into a single-ended output signal; the output LC balun comprises a first LC unit connected in series with the first path of differential input signals and a second LC unit connected in series with the second path of differential input signals; the first LC unit comprises a first capacitor connected to the first path of differential input signal in series and a first inductor connected between a first end of the first capacitor and the ground; the second LC unit comprises a second inductor connected to the second path of differential input signal in series and a second capacitor connected between the first end of the second inductor and the ground; the second end of the first capacitor and the second end of the second inductor are combined to output one single-ended output signal;
and the second third harmonic trap network is used for outputting the single-ended output signal to the output end after the second third harmonic suppression is realized.
Preferably, the second third harmonic trap network comprises a third inductor, a fourth inductor, a fifth inductor, a first resonator, a second resonator and a third resonator, which are connected in series between the output LC balun and the output end in sequence; the first resonator comprises a third capacitor and a sixth inductor, a first end of the third capacitor is connected between the third inductor and the fourth inductor, and a second end of the third capacitor is grounded after being connected with the sixth inductor in series; the second resonator comprises a fourth capacitor and a seventh inductor, a first end of the fourth capacitor is connected between the fourth inductor and the fifth inductor, and a second end of the fourth capacitor is grounded after being connected in series with the seventh inductor; the third resonator comprises a fifth capacitor and an eighth inductor, a first end of the fifth capacitor is connected between the fifth inductor and the output end, and a second end of the fifth capacitor is grounded after being connected in series with the eighth inductor.
Preferably, the third capacitor and the sixth inductor are in series resonance at a third harmonic frequency.
Preferably, the fourth capacitor and the seventh inductor, and the fifth capacitor and the eighth inductor are both series-resonated at a second harmonic frequency.
Preferably, the third inductor, the fourth inductor, and the fifth inductor are all patch inductors, and the sixth inductor, the seventh inductor, and the eighth inductor are all hundred-pH inductors.
Preferably, the amplifier chip unit is of a three-stage amplification structure and comprises a first-stage amplification unit, a second-stage amplification unit, a spiral balun device and a third-stage amplification unit;
the first-stage amplification unit and the second-stage amplification unit are connected in series and used for realizing gain amplification on the single-ended input signal of the input end;
the spiral balun device is a transformer and comprises a primary coil and a secondary coil, wherein the first end of the primary coil is connected with the output of the second-stage amplification unit, and the second end of the primary coil is grounded; the two ends of the secondary coil realize differential conversion and respectively output the first path of differential input signal and the second path of differential input signal;
the third-stage amplifying unit comprises a third amplifier and a fourth amplifier which are respectively connected to two ends of the secondary coil and are used for respectively amplifying the first path of differential input signal and the second path of differential input signal.
Preferably, the amplifier chip unit further includes a first matching capacitor, a second matching capacitor, a first via hole, and a second via hole; the first matching capacitor and the first via hole are connected in series and then are connected between the output of the third amplifier and the ground; the second matching capacitor and the second via hole are connected in series and then are connected between the fourth amplifier and the ground in common.
Preferably, the first-stage amplifying unit is a first transistor, the second-stage amplifying unit is a second transistor, the third amplifier is a third transistor, and the fourth amplifier is a fourth transistor; the amplifier chip unit further comprises a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a ninth inductor, a tenth inductor, an eleventh inductor and an interstage matching circuit;
the base electrode of the first transistor is connected to the input end after being connected with the sixth capacitor in series, the collector electrode of the first transistor is connected to a voltage source after being connected with the ninth inductor in series, and the emission set of the first transistor is connected to the ground;
the base electrode of the second transistor is connected to the collector electrode of the first transistor after being connected with the interstage matching circuit in series, the collector electrode of the second transistor is connected to the second end of the primary coil, the collector electrode of the second transistor is connected to the first end of the primary coil after being connected with the seventh capacitor in series, and the emitter electrode of the second transistor is connected to the ground;
the base electrode of the third transistor is connected to one end of the secondary coil, the collector electrode of the third transistor is connected in series with the tenth capacitor to serve as a negative electrode output end, and the tenth inductor is connected in series between the voltage source and the collector electrode of the third transistor; an emitter of the third transistor is connected to ground;
a base electrode of the fourth transistor is connected to the other end of the secondary coil, a collector electrode of the fourth transistor is connected in series with the eleventh capacitor to serve as a positive electrode output end, and the eleventh inductor is connected in series between the voltage source and the collector electrode of the fourth transistor; an emitter of the fourth transistor is connected to ground;
the eighth capacitor is connected between the secondary coil and ground; the ninth capacitor is connected between the base of the third transistor and the base of the fourth transistor.
Preferably, the amplifier chip unit is of a three-level amplification structure and comprises a first path of first-level amplification unit, a first path of second-level amplification unit, a first path of third-level amplification unit, a second path of first-level amplification unit, a second path of second-level amplification unit, a second path of third-level amplification unit and a spiral balun device;
the spiral balun device is a transformer and comprises a primary coil and a secondary coil; a first end of the primary coil is connected to the input end, and a second end of the primary coil is connected to the ground; the two ends of the secondary coil realize difference to output the first path of differential input signal and the second path of differential input signal;
the first path of primary amplification unit, the first path of secondary amplification unit and the first path of tertiary amplification unit are sequentially connected in series, and the input of the first path of primary amplification unit is connected to one end of the secondary coil; the second primary amplification unit, the second secondary amplification unit and the second tertiary amplification unit are sequentially connected in series, and the input of the second primary amplification unit is connected to the other end of the secondary coil.
Preferably, the amplifier chip unit is of a three-level amplification structure and comprises a first path of first-level amplification unit, a first path of second-level amplification unit, a first path of third-level amplification unit, a second path of first-level amplification unit, a second path of second-level amplification unit, a second path of third-level amplification unit and an input LC balun;
the input LC balun is connected to the input end, and performs differential conversion on the single-ended input signal of the input end to form the first path of differential input signal and the second path of differential input signal;
the first path of primary amplification unit, the first path of secondary amplification unit and the first path of tertiary amplification unit are sequentially connected in series, and the input of the first path of primary amplification unit is connected to the first path of differential input signal output by the input LC balun; the second path of primary amplification unit, the second path of secondary amplification unit and the second path of tertiary amplification unit are sequentially connected in series, and the input of the second path of primary amplification unit is connected to the second path of differential input signals output by the input LC balun.
Compared with the prior art, the MMIC radio-frequency power amplifier comprises an input end, an amplifier chip unit, an output LC balun, a second third harmonic trap network and an output end which are sequentially connected, wherein the amplifier chip amplifies a gain of the single-ended unit by adopting a three-stage amplification structure, converts one path of single-ended input signal into two paths of differential input signals, converts the two paths of differential input signals into single-ended output signals through output LC balun transformation, and then realizes the suppression of the second third harmonic by the single-ended output signals through the second third harmonic trap network, and the suppression of more than four times of high-order harmonics is realized by a capacitor connected in parallel with the output end of an on-chip last-stage amplifier of the amplifier chip unit, so that the MMIC radio-frequency power amplifier has good high harmonic suppression effect and good reliability; the difference loss of the output LC balun with the high quality factor Q value can be effectively reduced to 0.5dB, so that the insertion loss of an output network of the MMIC radio-frequency power amplifier is greatly reduced, namely, the output power is effectively improved, and high-power output is realized.
Drawings
The present invention will be described in detail below with reference to the accompanying drawings. The foregoing and other aspects of the utility model will become more apparent and more readily appreciated from the following detailed description, taken in conjunction with the accompanying drawings. In the drawings:
fig. 1 is a circuit diagram of a MMIC radio frequency power amplifier of the related art;
FIG. 2 is a block diagram of an MMIC RF power amplifier according to an embodiment of the utility model;
FIG. 3 is a circuit diagram of a chip unit of an HBT amplifier in an MMIC RF power amplifier according to an embodiment of the present invention;
FIG. 4 is a diagram illustrating the simulation effect of the second third harmonic suppression network of the MMIC RF power amplifier according to the embodiment of the present invention;
FIG. 5 is a block circuit diagram of a MMIC RF power amplifier according to an embodiment of the present invention;
fig. 6 is a circuit block diagram of a three MMIC radio frequency power amplifier according to an embodiment of the utility model.
Detailed Description
The following detailed description of embodiments of the utility model refers to the accompanying drawings.
The embodiments/examples described herein are specific embodiments of the present invention, are intended to be illustrative of the concepts of the present invention, are intended to be illustrative and exemplary, and should not be construed as limiting the embodiments and scope of the utility model. In addition to the embodiments described herein, those skilled in the art will be able to employ other technical solutions which are obvious based on the disclosure of the claims and the specification of the present application, and these technical solutions include those which make any obvious replacement or modification of the embodiments described herein, and all of which are within the scope of the present invention.
The following description of the embodiments refers to the accompanying drawings for illustrating the specific embodiments in which the utility model may be practiced. Directional phrases used herein, such as, for example, upper, lower, front, rear, left, right, inner, outer, lateral, and the like, refer only to the orientation of the appended drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention.
Example one
Fig. 2 is a circuit block diagram of an MMIC rf power amplifier according to an embodiment of the utility model. The utility model provides an MMIC radio frequency power amplifier 100, which comprises an input end RFin, an amplifier chip unit 1, an output LC balun2, a second third harmonic trap network 3 and an output end RFout which are connected in sequence;
the amplifier chip unit 1 is configured to gain-amplify one single-ended input signal accessed by the input terminal RFin, and convert the one single-ended input signal into two differential input signals, that is, a first differential input signal and a second differential input signal.
The output LC balun2 is used for converting and combining the first path of differential input signal and the second path of differential input signal into a single-ended output signal.
The output power of the monolithic microwave integrated radio frequency power amplifier is pushed to the maximum allowable power, and the output high power is very critical due to the small insertion loss of an output impedance matching network and a filter network of the radio frequency power amplifier. The spiral balun used in the prior art is influenced by the parasitic resistance of metal wiring, and the insertion loss in the Sub-6GHz frequency band reaches 1 dB. In the present application, since the output LC balun2 is an LC balun with a high quality factor Q value, the differential input loss (differential loss) of the output LC balun2 can be greatly reduced to 0.5dB, and the insertion loss of the output network of the MMIC radio frequency power amplifier 100 can be effectively reduced, so that the output power of the MMIC radio frequency power amplifier 100 is greatly improved, and high power output is realized.
Specifically, the output LC balun2 includes a first LC cell connected in series to the first path of differential input signal and a second LC cell connected in series to the second path of differential input signal; the first LC cell comprises a first capacitor C1 connected in series to the first path of differential input signal and a first inductor L1 connected between a first end of the first capacitor C1 and ground; the second LC cell includes a second inductor L2 connected in series to the second path of differential input signal and a second capacitor C2 connected between a first end of the second inductor L2 and ground. The second end of the first capacitor C1 and the second end of the second inductor L2 are combined to output one single-ended output signal.
The second third harmonic trap network 3 is used for outputting the single-ended output signal to the output terminal RFout after the second third harmonic is suppressed, and the second third harmonic trap network 3 effectively suppresses the second third harmonic component, so that the high harmonic suppression effect on the MMIC radio frequency power amplifier is greatly improved, and the reliability is better.
Specifically, the second third harmonic trap network 3 includes a third inductor L3, a fourth inductor L4, a fifth inductor L5, and a first resonator, a second resonator, and a third resonator, which are connected in series between the output LC balun2 and the output terminal RFout.
The first resonator comprises a third capacitor C3 and a sixth inductor L6, a first end of the third capacitor C3 is connected between the third inductor L3 and the fourth inductor L4, and a second end of the third capacitor C3 is connected in series with the sixth inductor L6 and then is grounded.
The second resonator comprises a fourth capacitor C4 and a seventh inductor L7, a first end of the fourth capacitor C4 is connected between the fourth inductor L4 and the fifth inductor L5, and a second end of the fourth capacitor C4 is connected in series with the seventh inductor L7 and then is grounded.
The third resonator comprises a fifth capacitor C5 and an eighth inductor L8, a first end of the fifth capacitor C5 is connected between the fifth inductor L5 and the output end RFout, and a second end of the fifth capacitor C5 is connected in series with the eighth inductor L8 and then connected to the ground.
The second and third harmonic components in the output harmonic signal of the power amplifier are the largest, and the second and third harmonic trap network 3 is adopted to suppress the second and third harmonic components at the output end RFout of the embodiment.
In the second-third harmonic trap network 3, the third inductor L3, the fourth inductor L4, and the fifth inductor L5 are preferably all chip inductors. The sixth inductor L6, the seventh inductor L7, and the eighth inductor L8 are all hundred-pH inductors, which have a small inductance value, generally several hundred-pH inductors, and can be drawn on a substrate or realized by bonding wires.
And the patch-type third capacitor C3 and the sixth inductor L6 are in series resonance at the third harmonic frequency, so that a notch of the third harmonic is realized. Because the second harmonic component in the radio frequency power output signal is the largest, the patch-type fourth capacitor C4 and the seventh inductor L7, and the patch-type fifth capacitor C5 and the eighth inductor L8 are all in series resonance at the second harmonic frequency, so as to realize deep suppression of the second harmonic.
After passing through the second and third harmonic trap networks 3, the suppression of the second harmonic and the third harmonic of the harmonic signal output by the output terminal RFout of the MMIC radio frequency power amplifier 100 is effectively achieved, as shown in fig. 3, which is a simulation effect diagram of the second and third harmonic suppression network of the MMIC radio frequency power amplifier according to the embodiment of the present invention, as can be seen from fig. 3, the MMIC radio frequency power amplifier of the present invention effectively achieves the suppression of the higher second and third harmonics, and improves the reliability.
In this embodiment, the amplifier chip unit 1 has a three-stage amplification structure, and includes a first-stage amplification unit 11, a second-stage amplification unit 12, a Balun1, and a third-stage amplification unit 13.
The first-stage amplifying unit 11 and the second-stage amplifying unit 12 are connected in series to implement gain amplification on the single-ended input signal of the input end RFin.
The helical Balun device Balun1 is a transformer, and includes a primary coil and a secondary coil, a first end of the primary coil is connected to the output of the second-stage amplifying unit 12, and a second end of the primary coil is grounded; and the two ends of the secondary coil realize differential conversion and respectively output the first path of differential input signal and the second path of differential input signal.
The third stage amplifying unit 13 includes a third amplifier 131 and a fourth amplifier 132 respectively connected to two ends of the secondary coil, and is configured to amplify the first path of differential input signal and the second path of differential input signal respectively.
Preferably, the amplifier chip unit 1 further comprises a first matching capacitor CP1A second matching capacitor CP2A first Via1 and a second Via 2; the first matching capacitor CP1The first Via1 is connected in series and then commonly connected between the output of the third amplifier 131 and ground; the second matching capacitor CP2And is connected in series with the second Via2 and commonly connected between the fourth amplifier 132 and ground. The suppression network of more than four times of high-valence harmonics is formed by connecting the output end of the on-chip final amplifier (the third amplifier 131 and the fourth amplifier 132) of the amplifier chip unit 1 in parallel with a first matching capacitor CP1And a second matching capacitor CP2Suppression is achieved. First matching capacitor CP1And a second matching capacitor CP2The first Via1 and the second Via2 have parasitic inductances to ground through the first Via1 and the second Via2, respectively, and are respectively matched with the first matching capacitor CP1And a second matching capacitor CP2An LC series resonance passage is formed to form a high-order harmonic low-impedance passage for filtering higher-order harmonics more than four times, so that the high-order harmonic suppression effect is further improved, and the reliability is improved.
In this embodiment, the amplifier chip unit 1(PA Die) uses the spiral balun with a center tap to realize the conversion from a single-ended signal to a differential signal, and the series capacitor at the center tap end and the secondary coil of the spiral balun resonate at the second harmonic frequency to realize the suppression of the second harmonic. Meanwhile, the primary coil and the secondary coil of the spiral balun are respectively connected with a capacitor in parallel, and the parallel resonance is carried out on the fundamental wave frequency, so that the effective transmission of the fundamental wave signal is realized. Specifically, please refer to fig. 2 and 4 together, wherein fig. 4 is a circuit diagram of a chip unit of an HBT amplifier in an MMIC radio frequency power amplifier according to an embodiment of the present invention. In this embodiment, specifically, the first-stage amplifying unit 11 is a first transistor Q1, the second-stage amplifying unit 12 is a second transistor Q2, the third amplifier 131 is a third transistor Q3, and the fourth amplifier 132 is a fourth transistor Q4; the amplifier chip unit 1 further includes a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a ninth inductor L9, a tenth inductor L10, an eleventh inductor L11, and an inter-stage matching circuit 14.
The base of the first transistor Q1 is connected to the input terminal RFin by connecting the sixth capacitor C6 in series, the collector of the first transistor Q1 is connected to the voltage source Vcc by connecting the ninth inductor L9 in series, and the emitter of the first transistor Q1 is connected to ground.
The base of the second transistor Q2 is connected to the collector of the first transistor Q1 after being connected in series with the inter-stage matching circuit 14, the collector of the second transistor Q2 is connected to the second end of the primary winding of the helical Balun device Balun1, the collector of the second transistor Q2 is connected to the first end of the primary winding of the helical Balun device Balun1 after being connected in series with the seventh capacitor C7, and the emitter of the second transistor Q2 is connected to ground.
The base of the third transistor Q3 is connected to one end of the secondary winding, the collector of the third transistor Q3 is connected in series with the tenth capacitor C10 to serve as the negative output terminal RFout-, the tenth inductor L10 is connected in series between the voltage source Vcc and the collector of the third transistor Q3; the emitter of the third transistor Q3 is connected to ground.
The base of the fourth transistor Q4 is connected to the other end of the secondary winding, the collector of the fourth transistor Q4 is connected in series with the eleventh capacitor C11 as the positive output terminal RFout +, and the eleventh inductor L11 is connected in series between the voltage source Vcc and the collector of the fourth transistor Q4; the emitter of the fourth transistor Q4 is connected to ground.
The eighth capacitor C8 is connected between the secondary coil and the ground, and after the center tap end of the helical Balun device Balun1 is connected in series with the eighth capacitor C8, the series connection of the eighth capacitor C8 and the secondary coil of the helical Balun device Balun1 is enabled to resonate at the second harmonic frequency, so that the suppression of the second harmonic is realized, and the suppression effect of the harmonic is further enhanced.
The ninth capacitor C9 is connected between the base of the third transistor Q3 and the base of the fourth transistor Q4.
The primary coil and the secondary coil of the spiral Balun device Balun1 are respectively connected in parallel with the seventh capacitor C7 and the ninth capacitor C9, and the parallel resonance is at the fundamental frequency, so that the effective transmission of the fundamental signal is realized.
In the MMIC radio-frequency power amplifier, an amplifier chip adopts a three-stage amplification structure to realize gain amplification of a single-end unit, one path of single-end input signal is converted into two paths of differential input signals, the two paths of differential input signals are converted into single-end output signals through output LC balun transformation, the single-end output signals are subjected to second-third harmonic trap network to realize second-third harmonic suppression, second-third harmonic is effectively suppressed, and higher-order harmonics more than four times are suppressed by capacitors connected in parallel with the output end of an on-chip final-stage amplifier of the amplifier chip unit, so that the MMIC radio-frequency power amplifier has good high harmonic suppression effect and good reliability; the difference loss of the output LC balun with the high quality factor Q value can be effectively reduced to 0.5dB, so that the insertion loss of an output network of the MMIC radio-frequency power amplifier is greatly reduced, namely, the output power is effectively improved, and high-power output is realized.
Example two
The present invention further provides another embodiment, which is shown in fig. 5 and is a circuit block diagram of a MMIC radio frequency power amplifier according to an embodiment of the present invention.
In this embodiment, the first embodiment is basically the same, except that the structure of the amplifier chip unit is different, and the difference is that:
the amplifier chip unit 51 is of a three-stage amplification structure and includes a first path of first-stage amplification unit 511, a first path of second-stage amplification unit 512, a first path of third-stage amplification unit 513, a second path of first-stage amplification unit 514, a second path of second-stage amplification unit 515, a second path of third-stage amplification unit 516, and a balun device balun 1.
The spiral balun device balun1 is a transformer and comprises a primary coil and a secondary coil; a first end of the primary coil is connected to the input end RFin, and a second end of the primary coil is connected to ground; and the two ends of the secondary coil realize difference to output the first path of differential input signal and the second path of differential input signal.
The first path of primary amplification unit 511, the first path of secondary amplification unit 512, and the first path of tertiary amplification unit 513 are sequentially connected in series to form a first path of amplification unit PA Die1, and an input of the first path of primary amplification unit 511 is connected to one end of the secondary coil.
The second primary amplification unit 514, the second secondary amplification unit 515 and the second tertiary amplification unit 516 are sequentially connected in series to form a second primary amplification unit PA Die2, and an input of the second primary amplification unit 514 is connected to the other end of the secondary coil.
The input end RFin is a single-ended to differential conversion completed by a Balun device Balun1, the amplifier chip unit 51 is composed of two single-ended first amplification stage units PA Die1 and a second amplification stage unit PA Die2, and the output LC Balun 52 synthesizes two paths of power and then completes filtering suppression of harmonic waves through a second-third harmonic trap network 53. The first amplification stage unit PA Die1 and the second amplification stage unit PA Die2 have the same chip, and power synthesis is realized on the substrate.
Except for the above differences, other structures, technical problems to be solved, and technical effects are the same as those of the first embodiment, and are not described herein again.
EXAMPLE III
The present invention further provides another embodiment, which is shown in fig. 6 and is a circuit block diagram of a MMIC radio frequency power amplifier according to an embodiment of the present invention.
The second embodiment in this embodiment is basically the same, except that the structure of the amplifier chip unit is different, and the second embodiment is an LC balun spiral balun input high-power high-harmonic suppression MMIC radio frequency power amplifier, and specifically the difference is that:
the amplifier chip unit 61 is a three-stage amplification structure, and includes a first path of first-stage amplification unit 611, a first path of second-stage amplification unit 612, a first path of third-stage amplification unit 613, a second path of first-stage amplification unit 614, a second path of second-stage amplification unit 615, a second path of third-stage amplification unit 616, and an input LC balun 617.
The input LC balun 617 is connected to the input terminal RFin, and performs differential conversion on the single-ended input signal of the input terminal RFin to form the first path of differential input signal and the second path of differential input signal.
The first path of first-stage amplifying unit 611, the first path of second-stage amplifying unit 612, and the first path of third-stage amplifying unit 613 are sequentially connected in series to form a first path of amplifying stage unit PA Die1, and an input of the first path of first-stage amplifying unit 611 is connected to the first path of differential input signal output by the input LC balun 617.
The second path of first-stage amplification unit 614, the second path of second-stage amplification unit 615, and the second path of third-stage amplification unit 616 are sequentially connected in series to form a second path of amplification stage unit PA Die2, and an input of the second path of first-stage amplification unit 614 is connected to the second path of differential input signal output by the input LC balun 617.
Specifically, the input LC balun 617 includes a first LC balun and a second LC balun, which are used for differentially converting the single-ended signal input by the input terminal RFin into the first path of differential input signal and the second path of differential input signal.
The first LC balun comprises a first balun matched inductor L01And a first balun matching capacitor C01First balun matched inductor L01Are respectively connected to the input end RFin and the input of the first primary amplifying unit 611, and the first balun matching capacitor C01Is connected to the first balun matching inductance L01The first balun matching capacitor C is connected to the input of the first path of first-stage amplifying unit 61101The second terminal of (a) is grounded.
The second LC balun includes a second balun matched inductor L02And a second balun matching capacitor C02Second balun matching capacitor C02Are respectively connected to the input terminal RFin and the input of a second primary amplifying unit 614, the second balun matched inductor L02Is connected to the second balun matching capacitor C02And the second balun matched inductor L is connected to the input of the second primary amplifying unit 61402And the other end of the same is grounded.
In the Sub-3GHz application, the input terminal Balun1 of the second embodiment shown in fig. 5 occupies a relatively large area, and is more feasible to use in the third embodiment shown in fig. 6 in the application with strict requirements on chip area. In the third embodiment shown in fig. 6, the input terminal of the second embodiment shown in fig. 5 is replaced with an LC balun, although the number of off-chip components is increased, the occupied area is reduced, and the debugging is more flexible and convenient.
Except for the above differences, other structures, technical problems to be solved, and technical effects are the same as those of the above embodiments, and are not described herein again.
Compared with the prior art, the MMIC radio frequency power amplifier comprises an input end, an amplifier chip unit, an output LC balun, a second third harmonic trap network and an output end which are connected in sequence, wherein, the amplifier chip adopts a three-stage amplification structure to realize gain amplification of the single-ended unit, converts one path of single-ended input signal into two paths of differential input signals, converts the two paths of differential input signals into single-ended output signals through output LC balun, and then inhibits the second and third harmonic waves by passing the single-ended output signals through a second and third harmonic wave trap network, thereby effectively realizing the inhibiting effect on the second and third harmonic waves, the suppression of higher harmonics of more than four times is realized by a capacitor connected in parallel with the output end of the on-chip final amplifier of the amplifier chip unit, so that the high harmonic suppression effect and the reliability of the MMIC radio frequency power amplifier are good; the difference loss of the output LC balun with the high quality factor Q value can be effectively reduced to 0.5dB, so that the insertion loss of an output network of the MMIC radio-frequency power amplifier is greatly reduced, namely, the output power is effectively improved, and high-power output is realized.
It should be noted that the above-mentioned embodiments described with reference to the drawings are only intended to illustrate the present invention and not to limit the scope of the present invention, and it should be understood by those skilled in the art that modifications and equivalent substitutions can be made without departing from the spirit and scope of the present invention. Furthermore, unless the context indicates otherwise, words that appear in the singular include the plural and vice versa. Additionally, all or a portion of any embodiment may be utilized with all or a portion of any other embodiment, unless stated otherwise.
Claims (10)
1. An MMIC radio frequency power amplifier is characterized by comprising an input end, an amplifier chip unit, an output LC balun, a second third harmonic trap network and an output end which are connected in sequence;
the amplifier chip unit is used for amplifying a single-ended input signal accessed by the input end in a gain mode and converting the single-ended input signal into a first path of differential input signal and a second path of differential input signal;
the output LC balun is used for converting the first path of differential input signal and the second path of differential input signal to realize combination into a single-ended output signal; the output LC balun comprises a first LC unit connected in series with the first path of differential input signals and a second LC unit connected in series with the second path of differential input signals; the first LC unit comprises a first capacitor connected to the first path of differential input signal in series and a first inductor connected between a first end of the first capacitor and the ground; the second LC unit comprises a second inductor connected to the second path of differential input signal in series and a second capacitor connected between the first end of the second inductor and the ground; the second end of the first capacitor and the second end of the second inductor are combined to output one single-ended output signal;
and the second third harmonic trap network is used for outputting the single-ended output signal to the output end after the second third harmonic suppression is realized.
2. The MMIC radio frequency power amplifier of claim 1, wherein the second third harmonic trap network comprises a third inductor, a fourth inductor, a fifth inductor, and a first resonator, a second resonator, and a third resonator, connected in series in that order between the output LC balun and the output terminal; the first resonator comprises a third capacitor and a sixth inductor, a first end of the third capacitor is connected between the third inductor and the fourth inductor, and a second end of the third capacitor is grounded after being connected with the sixth inductor in series; the second resonator comprises a fourth capacitor and a seventh inductor, a first end of the fourth capacitor is connected between the fourth inductor and the fifth inductor, and a second end of the fourth capacitor is grounded after being connected in series with the seventh inductor; the third resonator comprises a fifth capacitor and an eighth inductor, a first end of the fifth capacitor is connected between the fifth inductor and the output end, and a second end of the fifth capacitor is grounded after being connected in series with the eighth inductor.
3. The MMIC radio frequency power amplifier according to claim 2, wherein the third capacitance and the sixth inductance are series-resonant at a third harmonic frequency.
4. The MMIC radio frequency power amplifier according to claim 2, wherein the fourth capacitance and the seventh inductance, and the fifth capacitance and the eighth inductance are series resonant at a second harmonic frequency.
5. The MMIC radio frequency power amplifier according to claim 2, wherein the third, fourth and fifth inductors are all patch inductors, and the sixth, seventh and eighth inductors are all pH-class inductors.
6. The MMIC radio frequency power amplifier according to claim 1, wherein the amplifier chip unit is a three-stage amplification structure comprising a first stage amplification unit, a second stage amplification unit, a spiral balun device, and a third stage amplification unit;
the first-stage amplification unit and the second-stage amplification unit are connected in series and used for realizing gain amplification on the single-ended input signal of the input end;
the spiral balun device is a transformer and comprises a primary coil and a secondary coil, wherein the first end of the primary coil is connected with the output of the second-stage amplification unit, and the second end of the primary coil is grounded; the two ends of the secondary coil realize differential conversion and respectively output the first path of differential input signal and the second path of differential input signal;
the third-stage amplifying unit comprises a third amplifier and a fourth amplifier which are respectively connected to two ends of the secondary coil and are used for respectively amplifying the first path of differential input signal and the second path of differential input signal.
7. The MMIC radio frequency power amplifier according to claim 6, wherein the amplifier chip unit further comprises a first matching capacitor, a second matching capacitor, a first via and a second via; the first matching capacitor and the first via hole are connected in series and then are connected between the output of the third amplifier and the ground; the second matching capacitor and the second via hole are connected in series and then are connected between the fourth amplifier and the ground in common.
8. The MMIC radio frequency power amplifier of claim 6, wherein the first stage amplification unit is a first transistor, the second stage amplification unit is a second transistor, the third amplifier is a third transistor, and the fourth amplifier is a fourth transistor; the amplifier chip unit further comprises a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a ninth inductor, a tenth inductor, an eleventh inductor and an interstage matching circuit;
the base electrode of the first transistor is connected to the input end after being connected with the sixth capacitor in series, the collector electrode of the first transistor is connected to a voltage source after being connected with the ninth inductor in series, and the emission set of the first transistor is connected to the ground;
the base electrode of the second transistor is connected to the collector electrode of the first transistor after being connected with the interstage matching circuit in series, the collector electrode of the second transistor is connected to the second end of the primary coil, the collector electrode of the second transistor is connected to the first end of the primary coil after being connected with the seventh capacitor in series, and the emitter electrode of the second transistor is connected to the ground;
the base electrode of the third transistor is connected to one end of the secondary coil, the collector electrode of the third transistor is connected in series with the tenth capacitor to serve as a negative electrode output end, and the tenth inductor is connected in series between the voltage source and the collector electrode of the third transistor; an emitter of the third transistor is connected to ground;
a base electrode of the fourth transistor is connected to the other end of the secondary coil, a collector electrode of the fourth transistor is connected in series with the eleventh capacitor to serve as a positive electrode output end, and the eleventh inductor is connected in series between the voltage source and the collector electrode of the fourth transistor; an emitter of the fourth transistor is connected to ground;
the eighth capacitor is connected between the secondary coil and ground; the ninth capacitor is connected between the base of the third transistor and the base of the fourth transistor.
9. The MMIC radio frequency power amplifier according to claim 1, wherein the amplifier chip unit is a three-stage amplification structure, comprising a first path of first-stage amplification unit, a first path of second-stage amplification unit, a first path of third-stage amplification unit, a second path of first-stage amplification unit, a second path of second-stage amplification unit, a second path of third-stage amplification unit and a spiral balun device;
the spiral balun device is a transformer and comprises a primary coil and a secondary coil; a first end of the primary coil is connected to the input end, and a second end of the primary coil is connected to the ground; the two ends of the secondary coil realize difference to output the first path of differential input signal and the second path of differential input signal;
the first path of primary amplification unit, the first path of secondary amplification unit and the first path of tertiary amplification unit are sequentially connected in series, and the input of the first path of primary amplification unit is connected to one end of the secondary coil; the second primary amplification unit, the second secondary amplification unit and the second tertiary amplification unit are sequentially connected in series, and the input of the second primary amplification unit is connected to the other end of the secondary coil.
10. The MMIC radio frequency power amplifier according to claim 1, wherein the amplifier chip unit is a three-stage amplification structure, comprising a first path of first-stage amplification unit, a first path of second-stage amplification unit, a first path of third-stage amplification unit, a second path of first-stage amplification unit, a second path of second-stage amplification unit, a second path of third-stage amplification unit and an input LC balun;
the input LC balun is connected to the input end, and performs differential conversion on the single-ended input signal of the input end to form the first path of differential input signal and the second path of differential input signal;
the first path of primary amplification unit, the first path of secondary amplification unit and the first path of tertiary amplification unit are sequentially connected in series, and the input of the first path of primary amplification unit is connected to the first path of differential input signal output by the input LC balun; the second path of primary amplification unit, the second path of secondary amplification unit and the second path of tertiary amplification unit are sequentially connected in series, and the input of the second path of primary amplification unit is connected to the second path of differential input signals output by the input LC balun.
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| PCT/CN2022/125270 WO2023082934A1 (en) | 2021-09-26 | 2022-10-14 | Mmic radio-frequency power amplifier |
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| CN202122340082 | 2021-09-26 | ||
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114884474A (en) * | 2022-07-07 | 2022-08-09 | 成都旋极星源信息技术有限公司 | Power amplifier and electronic equipment |
| WO2023082934A1 (en) * | 2021-09-26 | 2023-05-19 | 深圳飞骧科技股份有限公司 | Mmic radio-frequency power amplifier |
| CN116192060A (en) * | 2023-04-27 | 2023-05-30 | 四川省华盾防务科技股份有限公司 | Harmonic suppression structure for high-power carrier plate power amplifier |
| WO2024087852A1 (en) * | 2022-10-26 | 2024-05-02 | 深圳飞骧科技股份有限公司 | Two-stage differential power amplifier and radio frequency power amplification module |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101102128B1 (en) * | 2009-12-15 | 2012-01-02 | 서울대학교산학협력단 | Class e power amplifier |
| CN106656069B (en) * | 2016-09-13 | 2022-07-08 | 锐迪科微电子（上海）有限公司 | Multi-frequency output matching network applied to GSM radio frequency power amplifier |
| CN109347451B (en) * | 2018-08-29 | 2023-06-13 | 北京理工大学 | Power amplifier for improving ultrasonic guided wave signal energy |
| CN113037223B (en) * | 2021-03-31 | 2023-01-24 | 广东工业大学 | Broadband differential radio frequency power amplifier with second harmonic suppression |
| CN216390932U (en) * | 2021-09-26 | 2022-04-26 | 深圳飞骧科技股份有限公司 | MMIC radio frequency power amplifier |
-
2021
- 2021-11-15 CN CN202122824549.0U patent/CN216390932U/en active Active
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023082934A1 (en) * | 2021-09-26 | 2023-05-19 | 深圳飞骧科技股份有限公司 | Mmic radio-frequency power amplifier |
| CN114884474A (en) * | 2022-07-07 | 2022-08-09 | 成都旋极星源信息技术有限公司 | Power amplifier and electronic equipment |
| WO2024087852A1 (en) * | 2022-10-26 | 2024-05-02 | 深圳飞骧科技股份有限公司 | Two-stage differential power amplifier and radio frequency power amplification module |
| CN116192060A (en) * | 2023-04-27 | 2023-05-30 | 四川省华盾防务科技股份有限公司 | Harmonic suppression structure for high-power carrier plate power amplifier |
| CN116192060B (en) * | 2023-04-27 | 2023-09-05 | 四川省华盾防务科技股份有限公司 | Harmonic suppression structure for high-power carrier plate power amplifier |
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| WO2023082934A1 (en) | 2023-05-19 |
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