CN215773546U - double-MOS pipe control mute circuit - Google Patents
double-MOS pipe control mute circuit Download PDFInfo
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- CN215773546U CN215773546U CN202121825722.2U CN202121825722U CN215773546U CN 215773546 U CN215773546 U CN 215773546U CN 202121825722 U CN202121825722 U CN 202121825722U CN 215773546 U CN215773546 U CN 215773546U
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Abstract
The utility model relates to the technical field of mute circuits, and discloses a double-MOS (metal oxide semiconductor) tube control mute circuit with better and stable mute effect, which comprises an audio branch circuit for receiving an audio signal and a mute signal, wherein the audio branch circuit comprises a controller, one input end of the controller is coupled to one output end of the audio circuit and is used for receiving the audio signal, and the other input end of the controller is connected with the other output end of the audio circuit and is used for receiving the mute signal; when the input mute signal is at a high level, the high level is used for controlling the controller to be conducted so as to realize the mute starting; when the input mute signal is at low level, the low level is used for controlling the controller to close so as to realize the mute closing.
Description
Technical Field
The utility model relates to the technical field of mute circuits, in particular to a dual-MOS-tube control mute circuit.
Background
The mute circuit is a relatively common circuit in a small-signal audio amplifying circuit, such as on/off or mute control in audio output operation. At present, the existing mute mode mostly adopts the on-off of the relay control audio signal to realize the mute, and because the mechanical switch of the relay can make sound at the working time, the experience of the user is influenced when the device is used for a long time.
Therefore, how to avoid the sound generated by the mute circuit during operation is a technical problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a stable dual MOS tube control mute circuit with a good mute effect, aiming at the defects that in the prior art, a mechanical switch of a relay makes a sound when working and affects the experience of a user when the relay is used for a long time.
The technical scheme adopted by the utility model for solving the technical problems is as follows: constructing a dual MOS pipe controlled mute circuit, comprising an audio branch for receiving an audio signal and a mute signal, wherein the audio branch comprises a controller,
an input terminal of the controller is coupled to an output terminal of the audio circuit for receiving the audio signal,
the other input end of the controller is connected with the other output end of the audio circuit and used for receiving the mute signal;
when the input mute signal is at a high level, the high level is used for controlling the controller to be conducted so as to realize mute on;
and when the input mute signal is at a low level, the low level is used for controlling the controller to be closed so as to realize the mute closing.
In some embodiments, the audio branches include a first audio branch and a second audio branch,
the first audio branch comprises a first controller,
the second audio branch comprises a second controller,
an input terminal of the first controller is coupled to an output terminal of the audio circuit for receiving the audio signal,
the other input end of the first controller is connected with the other output end of the audio circuit and used for receiving the mute signal;
an input terminal of the second controller is coupled to an output terminal of the audio circuit for receiving the audio signal,
and the other input end of the second controller is connected with the other output end of the audio circuit and used for receiving the mute signal.
In some embodiments, the first audio branch further comprises a first resistor and a second resistor connected in series,
the connecting end of the first resistor and the second resistor is connected with the other output end of the audio circuit and used for receiving the mute signal;
one end of the first resistor is connected with a first grid electrode of the first controller,
one end of the second resistor is connected with the second grid of the first controller.
In some embodiments, the first audio branch further comprises a first capacitor and a second capacitor,
one end of the first capacitor is coupled to the first gate of the first controller,
the other end of the first capacitor is connected with a first source electrode of the first controller,
one end of the second capacitor is coupled to the second grid of the first controller,
the other end of the second capacitor is connected with the second source electrode of the first controller.
In some embodiments, the second audio branch further comprises a third resistor and a fourth resistor connected in series,
the connection end of the third resistor and the fourth resistor is connected with the other output end of the audio circuit and used for receiving the mute signal;
one end of the third resistor is connected with the first grid of the second controller,
one end of the fourth resistor is connected with the second grid electrode of the second controller.
In some embodiments, the second audio branch further comprises a third capacitor and a fourth capacitor,
one end of the third capacitor is coupled to the first gate of the second controller,
the other end of the third capacitor is connected with the first source electrode of the second controller,
one end of the fourth capacitor is coupled to the second gate of the second controller,
the other end of the fourth capacitor is connected with the second source electrode of the second controller.
In some embodiments, the first controller and the second controller are respectively packaged by two MOS transistors with different polarities.
In some embodiments, the circuit further comprises a fifth resistor and a sixth resistor connected in series,
one end of the fifth resistor is connected with the second source electrode of the first controller,
one end of the sixth resistor is connected with the second source electrode of the second controller.
The dual-MOS tube control mute circuit comprises an audio branch circuit for receiving an audio signal and a mute signal, wherein the audio branch circuit comprises a controller, and when the input mute signal is at a high level, the high level is used for controlling the controller to be conducted so as to realize the mute on; when the input mute signal is at low level, the low level is used for controlling the controller to close so as to realize the mute closing. Compared with the prior art, the controller matched with the peripheral circuit is arranged in the audio branch circuit to control the audio circuit to realize mute control when transmitting/closing audio signals, and the problem that the mechanical switch of the relay can make sound to influence the experience of a user when in work can be effectively solved.
Drawings
The utility model will be further described with reference to the accompanying drawings and examples, in which:
fig. 1 is a schematic circuit diagram of an embodiment of a dual MOS transistor mute circuit according to the present invention.
Detailed Description
For a more clear understanding of the technical features, objects and effects of the present invention, embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
As shown in fig. 1, in the first embodiment of the dual MOS transistor controlled mute circuit of the present invention, the dual MOS transistor controlled mute circuit 100 includes audio branches (corresponding to 101 and 102), wherein the audio branches include a first audio branch 101 and a second audio branch 102.
Specifically, the audio branches (corresponding to 101 and 102) are configured to receive an audio signal and a mute signal output by a peripheral circuit or an audio circuit, wherein the audio branches (corresponding to 101 and 102) include controllers (corresponding to U101 and U102).
The controller (corresponding to U101 and U102) functions as a switch.
Specifically, an input terminal of the controller (corresponding to U101 and U102) is coupled to an output terminal (corresponding to LEFT-OUT + and LEFT-OUT-) of the audio circuit for receiving the audio signals (corresponding to LEFT + and LEFT-).
Another input terminal of the controller (corresponding to U101 and U102) is connected to another output terminal (corresponding to MUTE-HP) of the audio circuit for receiving a MUTE signal, wherein the MUTE signal (corresponding to MUTE-HP) is at a high level or a low level.
When a MUTE signal (corresponding to MUTE-HP) input by the audio circuit is at a high level, the high level is used for controlling the controller (corresponding to U101 and U102) to be conducted so as to realize the MUTE on;
when the MUTE signal (corresponding to MUTE-HP) input by the audio circuit is at low level, the low level is used for controlling the controller (corresponding to U101 and U102) to be closed so as to realize the closing of the MUTE.
By using the technical scheme, the controller (corresponding to the U101 and the U102) matched with the peripheral circuit is arranged in the audio branch circuit, so that the audio circuit can be controlled to realize mute control when audio signals are transmitted/closed, the mechanical switch of the relay is prevented from making sound during working, and the experience of a user is further improved.
In some embodiments, to improve the muting effect of the muting circuit, the audio branches may be set as the first audio branch 101 and the second audio branch 102. Wherein the content of the first and second substances,
the first audio branch 101 comprises a first controller U101 and the second audio branch 102 comprises a second controller U102.
It should be noted that the first controller U101 and the second controller U102 are respectively packaged by two MOS transistors with different polarities, that is, one N-channel MOS transistor and the other P-channel MOS transistor.
Further, an input terminal (corresponding to the first source S1) of the first controller U101 is coupled to an output terminal (corresponding to the LEFT-OUT + terminal) of the audio circuit for receiving the audio signal (corresponding to the LEFT-OUT +), and another input terminal (corresponding to the first gate G1) of the first controller U101 is connected to another output terminal (corresponding to the MUTE-HP terminal) of the audio circuit for receiving the MUTE signal (corresponding to the MUTE-HP).
An input terminal (corresponding to the first source S3) of the second controller U102 is coupled to an output terminal (corresponding to the LEFT-OUT terminal) of the audio circuit for receiving the audio signal (corresponding to the LEFT-OUT terminal), and another input terminal (corresponding to the first gate G3) of the second controller U102 is connected to another output terminal (corresponding to the MUTE-HP terminal) of the audio circuit for receiving the MUTE signal (corresponding to the MUTE-HP).
That is, the audio circuit inputs the audio signal (corresponding to LEFT-OUT + and LEFT-OUT-) and the MUTE signal (corresponding to MUTE-HP) to the gates and the sources of the first controller U101 and the second controller U102, respectively, so as to control the on/off of the first controller U101 and the second controller U102.
In some embodiments, in order to improve the quality of the input mute signal, a first resistor R101 and a second resistor R102 may be disposed in the first audio branch 101, wherein the first resistor R101 and the second resistor R102 are connected in series.
Specifically, the connection end of the first resistor R101 and the second resistor R102 is connected to the other output end (corresponding to the MUTE-HP end) of the audio circuit, and is configured to receive the MUTE signal (corresponding to the MUTE-HP).
One end of the first resistor R101 is connected to the first gate (corresponding to G1) of the first controller U101, and one end of the second resistor R102 is connected to the second gate (corresponding to G2) of the first controller U101.
That is, the MUTE signal (corresponding to the MUTE-HP) output by the peripheral circuit or the audio circuit passes through the first resistor R101 and the second resistor R102, and then is input to the first gate (corresponding to G1) and the second gate (corresponding to G2) of the first controller U101, respectively.
In some embodiments, in order to improve the performance of the mute circuit, a first capacitor C101 and a second capacitor C102 may be disposed in the first audio branch 101, wherein the first capacitor C101 and the second capacitor C102 have the function of coupling and eliminating low frequency signals.
One end of the first capacitor C101 is coupled to the first gate (corresponding to G1) of the first controller U101, and the other end of the first capacitor C101 is connected to the first source (corresponding to S1) of the first controller U101.
One end of the second capacitor C102 is coupled to the second gate (corresponding to G2) of the first controller U101, and the other end of the second capacitor C102 is connected to the second source (corresponding to S2) of the first controller U101.
In some embodiments, in order to improve the quality of the input mute signal, a third resistor R103 and a fourth resistor R104 may be disposed in the second audio branch 102, wherein the third resistor R103 and the fourth resistor R104 are connected in series.
Specifically, the connection end of the third resistor R103 and the fourth resistor R104 is connected to the other output end (corresponding to the MUTE-HP end) of the audio circuit, and is configured to receive the MUTE signal.
One end of the third resistor R103 is connected to the first gate (corresponding to G3) of the second controller U102,
one end of the fourth resistor R104 is connected to the second gate (corresponding to G4) of the second controller U102.
That is, the MUTE signal (corresponding to the MUTE-HP) output from the peripheral circuit or the audio circuit passes through the third resistor R103 and the fourth resistor R104, and then is input to the first gate (corresponding to G3) and the second gate (corresponding to G4) of the second controller U101, respectively.
In some embodiments, in order to improve the performance of the mute circuit, a third capacitor C103 and a fourth capacitor C104 may be disposed in the second audio branch 102, wherein the third capacitor C103 and the fourth capacitor C104 have the function of coupling and eliminating low frequency signals.
One end of the third capacitor C103 is connected to the first gate (corresponding to G3) of the second controller U102, and the other end of the third capacitor C103 is connected to the first source (corresponding to S3) of the second controller U102.
One end of the fourth capacitor C104 is coupled to the second gate (corresponding to G4) of the second controller U102, and the other end of the fourth capacitor C104 is connected to the second source (corresponding to S4) of the second controller U102.
In some embodiments, in order to improve the stability of the mute circuit, a fifth resistor R105 and a sixth resistor R106 may be disposed in the circuit, wherein one end of the fifth resistor R105 is connected to the second source (corresponding to S2) of the first controller U101, one end of the sixth resistor R106 is connected to the second source (corresponding to S4) of the second controller U102, and the connection end of the fifth resistor R105 and the sixth resistor R106 is connected to the common end.
That is, the first controller U101 and the second controller U102 obtain a zero potential level through the fifth resistor R105 and the sixth resistor R106.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the utility model as defined in the appended claims.
Claims (8)
1. A dual MOS tube control mute circuit comprises an audio branch for receiving an audio signal and a mute signal, wherein the audio branch comprises a controller, one input end of the controller is coupled to one output end of an audio circuit and is used for receiving the audio signal, and the other input end of the controller is connected with the other output end of the audio circuit and is used for receiving the mute signal; when the input mute signal is at a high level, the high level is used for controlling the controller to be conducted so as to realize mute on; and when the input mute signal is at a low level, the low level is used for controlling the controller to be closed so as to realize the mute closing.
2. The dual MOS transistor controlled mute circuit of claim 1, wherein the audio branch comprises a first audio branch comprising a first controller and a second audio branch comprising a second controller, an input of the first controller is coupled to an output of the audio circuit for receiving the audio signal, and another input of the first controller is connected to another output of the audio circuit for receiving the mute signal; one input end of the second controller is coupled to one output end of the audio circuit and used for receiving the audio signal, and the other input end of the second controller is connected with the other output end of the audio circuit and used for receiving the mute signal.
3. The dual MOS transistor control muting circuit according to claim 2, wherein the first audio branch further comprises a first resistor and a second resistor connected in series, and a connection end of the first resistor and the second resistor is connected to another output end of the audio circuit, for receiving the muting signal; one end of the first resistor is connected with a first grid electrode of the first controller, and one end of the second resistor is connected with a second grid electrode of the first controller.
4. The dual MOS transistor control mute circuit of claim 2 or 3, wherein the first audio branch further comprises a first capacitor and a second capacitor, one end of the first capacitor is coupled to the first gate of the first controller, the other end of the first capacitor is connected to the first source of the first controller, one end of the second capacitor is coupled to the second gate of the first controller, and the other end of the second capacitor is connected to the second source of the first controller.
5. The dual MOS transistor control mute circuit of claim 2, wherein the second audio branch further comprises a third resistor and a fourth resistor connected in series, and a connection end of the third resistor and the fourth resistor is connected to another output end of the audio circuit, and is configured to receive the mute signal; one end of the third resistor is connected with the first grid electrode of the second controller, and one end of the fourth resistor is connected with the second grid electrode of the second controller.
6. The dual MOS tube control muting circuit according to claim 5, wherein the second audio branch further comprises a third capacitor and a fourth capacitor, wherein one end of the third capacitor is coupled to the first gate of the second controller, the other end of the third capacitor is connected to the first source of the second controller, one end of the fourth capacitor is coupled to the second gate of the second controller, and the other end of the fourth capacitor is connected to the second source of the second controller.
7. The dual MOS transistor control muting circuit according to claim 2, wherein the first controller and the second controller are each packaged by two MOS transistors with different polarities.
8. The dual MOS tube control muting circuit according to claim 7, further comprising a fifth resistor and a sixth resistor connected in series, wherein one end of the fifth resistor is connected to the second source of the first controller, and one end of the sixth resistor is connected to the second source of the second controller.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121825722.2U CN215773546U (en) | 2021-08-06 | 2021-08-06 | double-MOS pipe control mute circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121825722.2U CN215773546U (en) | 2021-08-06 | 2021-08-06 | double-MOS pipe control mute circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN215773546U true CN215773546U (en) | 2022-02-08 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202121825722.2U Active CN215773546U (en) | 2021-08-06 | 2021-08-06 | double-MOS pipe control mute circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN215773546U (en) |
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2021
- 2021-08-06 CN CN202121825722.2U patent/CN215773546U/en active Active
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