CN215299259U

CN215299259U - IGBT chip

Info

Publication number: CN215299259U
Application number: CN202121736458.5U
Authority: CN
Inventors: 翟露青
Original assignee: ZIBO MICRO COMMERCIAL COMPONENTS CORP
Current assignee: ZIBO MICRO COMMERCIAL COMPONENTS CORP
Priority date: 2021-07-29
Filing date: 2021-07-29
Publication date: 2021-12-24
Anticipated expiration: 2031-07-29

Abstract

An IGBT chip belongs to the technical field of semiconductors. Including P type injection region (13), N type buffer area (12) and N type drift region (10) have set gradually in P type injection region (13) top, are provided with voltage ring (5), its characterized in that at the edge of N drift region (10): an insulating layer (4) is arranged on the outer side of the pressure ring (5), and the insulating layer (4) extends downwards from the top of the pressure ring (5) to the N-type drift region (10). In the IGBT chip, the insulating layer is formed on the outer side of the terminal region, so that the width of the terminal region on the outer side of the chip is reduced, the area of the effective region of the chip is increased under the same area, and the current conducting capacity is improved. Compared with the prior art, the passivation technology of silicon nitride or silicon oxide uses the glass passivation technology, can better inhibit the generation of leakage current, improve the high temperature resistance of the chip and improve the reliability of the chip.

Description

IGBT chip

Technical Field

An IGBT chip belongs to the technical field of semiconductors.

Background

As shown in fig. 3, in a conventional IGBT chip, the middle of the chip is an active region, an emitter 1 is led out from the active region, and a gate 2 is led out from one side of the active region. A terminal region 3 for insulation is provided at the outer periphery of the effective region. As is known in the art, when the IGBT is turned on, the emitter is turned on by current, and the termination region 3 is not turned on by current. The width of the terminal region is in direct proportion to the breakdown voltage of the IGBT, the larger the width of the terminal region 3 is, the higher the breakdown voltage of the IGBT is, and the better the voltage withstanding performance of the chip is. Therefore, to make the chip have higher voltage endurance, it is necessary to increase the width of the termination region 3, however, the larger the width of the termination region 3 is, the larger the area of the active region is, the larger the chip area is, i.e. increasing the chip voltage endurance will reduce the active area of the emitter and weaken the conduction capability of the chip. Therefore, it is an urgent problem to be solved in the art to relate to an IGBT chip capable of achieving both voltage withstanding performance and current conduction capability.

Disclosure of Invention

The to-be-solved technical problem of the utility model is: the IGBT chip overcomes the defects of the prior art, and the width of the terminal area outside the chip is reduced by forming the insulating layer outside the terminal area, so that the area of the effective area of the chip is increased under the same area, and the current conduction capability is improved.

The utility model provides a technical scheme that its technical problem adopted is: this IGBT chip, including P type injection region, N type buffer area and N type drift region have set gradually above P type injection region, are provided with withstand voltage ring, its characterized in that in the edge of N drift region: and an insulating layer is arranged on the outer side of the voltage-resisting ring and extends downwards from the top of the voltage-resisting ring to the N-type drift region.

Preferably, a P-body region is arranged on the inner side of the pressure ring above the N-type drift region, a plurality of trenches are arranged at intervals in the P-body region, N + regions are arranged on two sides of each trench, insulating layers are arranged above the trenches and the N + regions on the two sides of the trenches, and the insulating layer on the outermost side extends outwards to the insulating layer.

Preferably, polysilicon is filled after a gate oxide layer is formed on the inner surface of the trench, and a gate is led out from the polysilicon.

Preferably, a metal layer covers the grooves, extends downwards from the gap between two adjacent grooves to be connected with the P-body type region, and the emitter is led out from the metal layer.

Preferably, the insulating layer is made of glass.

Preferably, a collector is extracted from the P-type implantation region.

Compared with the prior art, the utility model discloses the beneficial effect who has is:

in the IGBT chip, the insulating layer is formed on the outer side of the terminal region, so that the width of the terminal region on the outer side of the chip is reduced, the area of the effective region of the chip is increased under the same area, and the current conducting capacity is improved. Compared with the passivation technology of silicon nitride or silicon oxide in the prior art, the insulating layer is realized through the glass passivation technology, the generation of leakage current can be better inhibited, the high-temperature resistance of the chip is improved, and the reliability of the chip is improved. The application of the low-current IGBT is obviously promoted, the chip with smaller current and smaller area has more obvious increase of effective area and more obvious cost advantage.

Compared with the traditional silicon oxide/silicon nitride passivation, the method has lower cost. Meanwhile, the defect of low growth speed of the traditional silicon oxide/silicon nitride is overcome. In the traditional passivation technology of silicon oxide/silicon nitride, if the thickness of the passivation growth is thinner, the pressure resistance is poorer, and the thickness of the passivation growth is thicker, the passivation growth can be stripped from silicon, and the glass passivation technology can avoid the adverse effects.

Compared with the traditional method of passivating after cutting, the method provided by the invention has the advantages that the deep groove is arranged at the position of the cutting channel, and then the glass passivation is carried out. A large number of sharp corners can be generated at the edge of the chip after cutting, a large number of impurities fall off, leakage flow is uncontrollable, and the consistency of the chip can be greatly influenced. The deep groove technology is adopted, the surface of the groove is smooth, the appearance is consistent, and the consistency and the reliability of the chip are higher.

Drawings

Fig. 1 is a schematic plan view of an IGBT chip.

Fig. 2 is a plan sectional view of an IGBT chip.

Fig. 3 is a schematic plan view of a prior art IGBT chip.

Wherein: 1. the semiconductor device comprises an emitter 2, a gate 3, a terminal region 4, an insulating layer 5, a voltage-withstanding ring 6, a top insulating layer 7, a metal layer 8, an N + type region 9, a P-body type region 10, an N type drift region 11, a collector 12, an N type buffer region 13 and a P type injection region.

Detailed Description

Fig. 1 to 2 are preferred embodiments of the present invention, and the present invention will be further explained with reference to fig. 1 to 2.

As shown in fig. 1, an IGBT chip includes an active region disposed in the middle, an emitter 1 is drawn out from the active region, and a gate 2 is drawn out from one side of a cell. A termination region 3 is provided on the outer periphery of the effective region, and an insulating layer 4 is provided on the outer periphery of the termination region 3.

Referring to fig. 2, the IGBT chip includes a heavily doped P-type implant region 13. The extraction collector 11 emerges from the P-type implant region 13. An N-type buffer region 12 and an N-type drift region 10 are sequentially arranged above the P-type injection region 13. The edge of the N-type drift region 10 is provided with a voltage-withstanding ring 5, the outer ring of the voltage-withstanding ring 5 is provided with the insulating layer 4 formed by a glass passivation technology, and the insulating layer 4 extends downwards from the top of the voltage-withstanding ring 5 to the N-type drift region 10. A P-body type region 9 is arranged on the inner side of the pressure ring 5 above the N-type drift region 10. A plurality of trenches are arranged at intervals in the P-body type region 9, polysilicon is filled after a gate oxide layer is formed on the inner surface of each trench, and the gate 2 is led out from the polysilicon.

N + type regions 8 are arranged on two sides of the groove, a top insulating layer 6 made of borophosphosilicate glass is arranged above the groove and the N + type regions 8 on the two sides of the groove, and the top insulating layer 6 on the outermost side extends outwards to the insulating layer 4. And a metal layer 7 covers the upper part of the groove, the metal layer 7 extends downwards from the gap between two adjacent grooves to be connected with the P-body type region 9, and the emitter 1 is led out from the metal layer 7.

As can be seen from the above structure, in the present IGBT chip, the insulating layer 4 is formed outside the termination region 3 by using the glass passivation technique, and the width of the termination region 3 outside the chip is reduced, so that the area of the chip effective region is increased in the same area, and the current conduction capability is improved. Compared with the prior art, the passivation technology of silicon nitride or silicon oxide uses the glass passivation technology, can better inhibit the generation of leakage current, improve the high temperature resistance of the chip and improve the reliability of the chip. The application of the low-current IGBT is obviously promoted, the chip with smaller current and smaller area has more obvious increase of effective area and more obvious cost advantage.

While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention. However, any simple modification, equivalent change and modification made to the above embodiments according to the technical substance of the present invention still belong to the protection scope of the technical solution of the present invention.

Claims

1. The utility model provides an IGBT chip, includes P type injection region (13), has set gradually N type buffer (12) and N type drift region (10) above P type injection region (13), is provided with voltage ring (5), its characterized in that in the edge of N type drift region (10): an insulating layer (4) is arranged on the outer side of the pressure ring (5), and the insulating layer (4) extends downwards from the top of the pressure ring (5) to the N-type drift region (10).

2. The IGBT chip according to claim 1, wherein: above the N-type drift region (10), a P-body type region (9) is arranged on the inner side of the pressure ring (5), a plurality of grooves are arranged at intervals in the P-body type region (9), N + type regions (8) are arranged on two sides of each groove, a top insulating layer (6) is arranged above each groove and the N + type regions (8) on the two sides of each groove, and the top insulating layer (6) on the outermost side extends outwards to the insulating layer (4).

3. The IGBT chip according to claim 2, wherein: and after a gate oxide layer is formed on the inner surface of the groove, polysilicon is filled, and a gate (2) is led out from the polysilicon.

4. The IGBT chip according to claim 2, wherein: and a metal layer (7) covers the grooves, the metal layer (7) extends downwards from the gap between two adjacent grooves to be connected with the P-body type region (9), and the emitting electrode (1) is led out from the metal layer (7).

5. The IGBT chip according to claim 1, wherein: the insulating layer (4) is made of glass.

6. The IGBT chip according to claim 1, wherein: and leading out a collector (11) from the P-type injection region (13).