CN214799506U - Bus board level protocol test circuit - Google Patents
Bus board level protocol test circuit Download PDFInfo
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- CN214799506U CN214799506U CN202120742250.8U CN202120742250U CN214799506U CN 214799506 U CN214799506 U CN 214799506U CN 202120742250 U CN202120742250 U CN 202120742250U CN 214799506 U CN214799506 U CN 214799506U
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Abstract
A bus board level protocol test circuit comprises a test daughter board and a daughter board interface circuit; the test daughter board comprises a transformer module circuit, the transformer module circuit is respectively connected with the oscilloscope interface circuit and the chip to be tested, and the test daughter board is connected with the chip to be tested through the chip holder; the tested chip is based on a 1553B protocol, and the model number of the tested chip is 61580, 65170 and 63825; the transformer module circuit model is PM-DB2725EX and is used for adjusting the voltage ratio between the transformer module circuit model and the tested chip and ensuring the safety of the tested chip in a test state and the accuracy of test data; the daughter board interface circuit comprises the oscilloscope interface circuit, the oscilloscope is connected with the oscilloscope interface circuit through the SMA cable, and the SMA cable adopts a high-speed cable to avoid the test signal distortion phenomenon caused by cable attenuation.
Description
Technical Field
The utility model belongs to the technical field of bus board level agreement test technique and specifically relates to a bus board level agreement test circuit.
Background
The 1553B bus board level protocol is an internal time-division command/response type multiplexing data bus; the 1553B bus can be used for hanging 31 remote terminals and has three terminal types: a Bus Controller (BC), a Remote Terminal (RT) and a Bus Monitor (BM); the data transmission rate is 1Mbps, each message contains 32 words at most, the time for transmitting a fixed message is short, and the data transmission rate is higher than that of a common communication network; reasonable error control measures and special mode commands are provided to ensure the integrity of data transmission; there are strict constraints on certain mandatory requirements related to bus efficiency metrics such as command response time, message interval time, and the length of the maximum and minimum data blocks per message transmission; command/response and 'broadcast' communication modes are provided; the protocol is complex, the comprehensive coverage on the traditional testing machine is difficult to realize, and when the tested chip is tested, the problem that the tested chip is damaged or the testing precision is influenced due to overlarge testing voltage can occur.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to overcome prior art's not enough, provide a bus board level agreement test circuit.
The utility model provides a its technical problem take following technical scheme to realize:
a bus board level protocol test circuit comprises a test daughter board; the test daughter board comprises a transformer module circuit, the transformer module circuit is respectively connected with the oscilloscope interface circuit and the tested chip, and the model of the transformer module circuit is PM-DB2725EX and is used for adjusting the voltage ratio between the test daughter board and the tested chip.
Preferably, the test daughter board is connected with the chip to be tested through the chip holder; the tested chip is based on a 1553B protocol, and the model number of the tested chip is 61580, 65170 and 63825.
Preferably, the test daughter board further comprises a relay module, the relay module is mainly used for switching the tested chip and the test resources, and the resources are required to be switched by the relay module for measurement due to the fact that an oscilloscope channel or a signal generator channel is not enough.
Preferably, the test device further comprises a daughter board interface circuit, wherein the daughter board interface circuit comprises the oscilloscope interface circuit, the oscilloscope is connected with the oscilloscope interface circuit through an SMA cable, and the SMA cable adopts a high-speed cable, so that the phenomenon of test signal distortion caused by cable attenuation is avoided.
Preferably, the oscilloscope interface circuit comprises a jump cap, and the oscilloscope can be switched on selectively according to needs.
Preferably, the test device further comprises a test motherboard, and the test motherboard is connected with the daughter board interface circuit.
Preferably, the test motherboard comprises an NI board circuit and a relay control circuit, the NI chassis is electrically connected to the test motherboard, and the NI chassis performs transmission control on signals of the test motherboard.
Preferably, the relay control circuit includes an expansion chip for expanding the channel, and the external relay is controlled by the relay control circuit.
Preferably, the NI board circuit includes two digital boards; the type of the digital board card is PXIe-6571.
Preferably, the extended chip signal is PCA 9056.
The utility model has the advantages that:
1. the utility model comprises a test daughter board; the test daughter board comprises a transformer module circuit, the transformer module circuit is respectively connected with the oscilloscope interface circuit and the chip to be tested, and the test daughter board is connected with the chip to be tested through the chip holder; the tested chip is based on a 1553B protocol, and the model number of the tested chip is 61580, 65170 and 63825; the transformer module circuit model is PM-DB2725EX, and is used for adjusting the voltage ratio between the transformer module circuit model and the tested chip, and ensuring the safety of the tested chip in a test state and the accuracy of test data.
2. The utility model discloses still include daughter board interface circuit, daughter board interface circuit includes oscilloscope interface circuit, oscilloscope pass through the SMA cable and connect oscilloscope interface circuit, the SMA cable adopts high-speed cable, avoids causing test signal distortion phenomenon because the cable decay.
Drawings
Fig. 1 is a circuit connection block diagram of the present invention;
fig. 2 is a circuit connection diagram of the NI board of the present invention;
FIG. 3 is a circuit diagram of the NI board card of the present invention
FIG. 4 is a daughter board interface circuit connection diagram of the present invention;
fig. 5 is a connection diagram of the relay control circuit of the present invention;
FIG. 6 is a connection diagram of the interface circuit of the oscilloscope of the present invention;
fig. 7 is a circuit diagram of a transformer module according to the present invention;
fig. 8 is a connection diagram of a relay module according to the present invention;
FIG. 9 is a partial connection diagram of the test daughter board chip of the present invention;
FIG. 10 is a partial connection diagram of a test daughter board chip according to the present invention;
fig. 11 is a connection diagram of the chip part of the test sub-board of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When a component is referred to as being "connected" to another component, it can be directly connected to the other component or intervening components may also be present. When a component is referred to as being "disposed on" another component, it can be directly on the other component or intervening components may also be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
As shown in fig. 1, 7, and 9-11, the bus board level protocol testing circuit of the present invention includes a testing daughter board; the test daughter board comprises a transformer module circuit, the transformer module circuit is respectively connected with the oscilloscope interface circuit and the tested chip, and the model of the transformer module circuit is PM-DB2725EX and is used for adjusting the voltage ratio between the test daughter board and the tested chip.
Specifically, the test daughter board chip is BU 61580; the S0_ DIO pin and the S1_ DIO pin of the test daughter board chip are respectively and correspondingly connected with the S0_ DIO pin and the S1_ DIO pin of the daughter board interface circuit; the JP _ TP1A _ XA pin, the JP _ TP1A _ XB pin and the JP _ TP1A _ XC pin of the transformer module circuit are respectively and correspondingly connected with the JP _ TP1A _ XA pin, the JP _ TP1A _ XB pin and the JP _ TP1A _ XC pin of the oscilloscope interface circuit.
Further, as shown in fig. 8, the test daughter board further includes a relay module, where the relay module is mainly used to switch the chip to be tested and the test resources, and since the oscilloscope channel or the signal generator channel is not enough, the relay module is required to switch the resources for measurement.
Furthermore, the test daughter board is connected with the chip to be tested through the chip holder; the tested chip is based on a 1553B protocol, and the model number of the tested chip is 61580, 65170 and 63825.
Further, as shown in fig. 2 to 5, the testing device further includes a testing motherboard, the testing motherboard includes an NI board circuit and a relay control circuit, an NI chassis is electrically connected to the testing motherboard, and the NI chassis performs transmission control on signals of the testing motherboard.
Further, as shown in fig. 4, the NI card further includes a daughter board interface circuit, where the daughter board interface circuit includes a connector, and the NI card circuit is connected to the daughter board interface circuit; specifically, the connector model is TFM-150-12-L-D-A; the NI board card circuit comprises two digital board cards; the type of the digital board card is PXIe-6571; the S0_ DIO pin and the S1_ DIO pin of the NI board correspond to the S0_ DIO pin and the S1_ DIO pin of the daughter board interface circuit, respectively.
Furthermore, the relay control circuit is connected with the daughter board interface circuit, the relay control circuit comprises an expansion chip for expanding a channel, and an external relay is controlled by the relay control circuit; specifically, the extended chip signal is PCA9056, and an S0_ IO pin of the relay control circuit is connected to an S0_ IO pin of the daughter board interface circuit.
Further, the daughter board interface circuit is connected with a source test instrument, and the model of the source test instrument is PXIe-4139.
Further, as shown in fig. 6, the test device further comprises a daughter board interface circuit, wherein the daughter board interface circuit comprises the oscilloscope interface circuit, the oscilloscope is connected to the oscilloscope interface circuit through an SMA cable, and the SMA cable adopts a high-speed cable to avoid a test signal distortion phenomenon caused by cable attenuation; the oscilloscope interface circuit comprises a jump cap, and the oscilloscope can be switched in according to the requirement.
The test motherboard is connected with the daughter board interface circuit; the test motherboard comprises an NI board card circuit and a relay control circuit, an NI case is electrically connected with the test motherboard, and the NI case transmits and controls signals of the test motherboard; specifically, the daughter board interface circuit is TFM-150-12-L-D-A; the NI board card circuit comprises two digital board cards; the type of the digital board card is PXIe-6571; the S0_ DIO pin and the S1_ DIO pin of the NI board correspond to the S0_ DIO pin and the S1_ DIO pin of the daughter board interface circuit, respectively.
Further, the relay control circuit comprises an expansion chip for expanding the channel, and the external relay is controlled by the relay control circuit.
Further, the NI board card circuit comprises two digital board cards; the type of the digital board card is PXIe-6571.
Furthermore, the relay control circuit is connected with the daughter board interface circuit, the relay control circuit comprises an expansion chip for expanding a channel, and an external relay is controlled by the relay control circuit; specifically, the extended chip signal is PCA9056, and an S0_ IO pin of the relay control circuit is connected to an S0_ IO pin of the daughter board interface circuit.
The working principle is as follows:
the NI case is electrically connected with the test motherboard, and the NI case transmits and controls signals of the test motherboard;
2. the transformer module circuit is connected with a tested chip and used for adjusting a voltage ratio between the transformer module circuit and the tested chip and ensuring the safety of the tested chip in a test state and the accuracy of test data;
3. the transformer module circuit is connected with the oscilloscope interface circuit, the oscilloscope is connected with the oscilloscope interface circuit through the SMA cable, and the SMA cable adopts a high-speed cable to avoid the test signal distortion phenomenon caused by cable attenuation;
4. the test daughter board is connected with a chip to be tested through the chip holder; the tested chip is based on a 1553B protocol, and the model number of the tested chip is 61580, 65170 and 63825.
The utility model comprises a test daughter board and a daughter board interface circuit; the test daughter board comprises a transformer module circuit, the transformer module circuit is respectively connected with the oscilloscope interface circuit and the chip to be tested, and the test daughter board is connected with the chip to be tested through the chip holder; the tested chip is based on a 1553B protocol, and the model number of the tested chip is 61580, 65170 and 63825; the transformer module circuit model is PM-DB2725EX and is used for adjusting the voltage ratio between the transformer module circuit model and the tested chip and ensuring the safety of the tested chip in a test state and the accuracy of test data; the daughter board interface circuit comprises the oscilloscope interface circuit, the oscilloscope is connected with the oscilloscope interface circuit through the SMA cable, and the SMA cable adopts a high-speed cable to avoid the test signal distortion phenomenon caused by cable attenuation.
The above description is for the detailed description of the preferred possible embodiments of the present invention, but the embodiments are not intended to limit the scope of the present invention, and all equivalent changes or modifications accomplished under the technical spirit suggested by the present invention should fall within the scope of the present invention.
Claims (10)
1. A bus board level protocol test circuit is characterized in that: the test daughter board is included; the test daughter board comprises a transformer module circuit, the transformer module circuit is respectively connected with the oscilloscope interface circuit and the tested chip, and the model of the transformer module circuit is PM-DB2725EX and is used for adjusting the voltage ratio between the test daughter board and the tested chip.
2. The bus board level protocol test circuit of claim 1, wherein: the test daughter board is connected with a chip to be tested through the chip holder; the tested chip is based on a 1553B protocol, and the model number of the tested chip is 61580, 65170 and 63825.
3. The bus board level protocol test circuit of claim 1, wherein: the test daughter board also comprises a relay module, the relay module is mainly used for switching the tested chip and the test resources, and the resources are required to be switched by the relay module for measurement due to the fact that an oscilloscope channel or a signal generator channel is not enough.
4. The bus board level protocol test circuit of claim 1, wherein: the test signal testing device is characterized by further comprising a daughter board interface circuit, wherein the daughter board interface circuit comprises the oscilloscope interface circuit, the oscilloscope is connected with the oscilloscope interface circuit through an SMA (shape memory alloy) cable, and the SMA cable adopts a high-speed cable, so that the phenomenon of test signal distortion caused by cable attenuation is avoided.
5. The bus board level protocol test circuit of claim 4, wherein: the oscilloscope interface circuit comprises a jump cap, and the oscilloscope can be switched in according to the requirement.
6. The bus board level protocol test circuit of claim 4, wherein: the test motherboard is connected with the daughter board interface circuit.
7. The bus board level protocol test circuit of claim 6, wherein: the test motherboard comprises an NI board card circuit and a relay control circuit, an NI case is electrically connected with the test motherboard, and the NI case transmits and controls signals of the test motherboard.
8. The bus board level protocol test circuit of claim 7, wherein: the relay control circuit comprises an expansion chip for expanding a channel, and an external relay is controlled by the relay control circuit.
9. The bus board level protocol test circuit of claim 7, wherein: the NI board card circuit comprises two digital board cards; the type of the digital board card is PXIe-6571.
10. The circuit for testing the bus board level protocol of claim 8, wherein the extended chip signal is PCA 9056.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120742250.8U CN214799506U (en) | 2021-04-12 | 2021-04-12 | Bus board level protocol test circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120742250.8U CN214799506U (en) | 2021-04-12 | 2021-04-12 | Bus board level protocol test circuit |
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| CN214799506U true CN214799506U (en) | 2021-11-19 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115060947A (en) * | 2022-07-27 | 2022-09-16 | 苏州联讯仪器有限公司 | Sampling oscilloscope front end device and sampling oscilloscope |
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2021
- 2021-04-12 CN CN202120742250.8U patent/CN214799506U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115060947A (en) * | 2022-07-27 | 2022-09-16 | 苏州联讯仪器有限公司 | Sampling oscilloscope front end device and sampling oscilloscope |
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