CN215067112U - Application circuit of serial port chip test system - Google Patents
Application circuit of serial port chip test system Download PDFInfo
- Publication number
- CN215067112U CN215067112U CN202120920834.XU CN202120920834U CN215067112U CN 215067112 U CN215067112 U CN 215067112U CN 202120920834 U CN202120920834 U CN 202120920834U CN 215067112 U CN215067112 U CN 215067112U
- Authority
- CN
- China
- Prior art keywords
- circuit
- test
- chip
- serial port
- standard
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Tests Of Electronic Circuits (AREA)
Abstract
An application circuit of a serial port chip test system comprises a connecting circuit, an expansion circuit and a test circuit; the connecting circuit is respectively connected with the expansion circuit and the test circuit, the model of the expansion circuit chip is PCA9506BS, the test channel of the test circuit is switched through the expansion circuit, and test channel transmission test parameters are increased; the test circuit comprises a test chip, a switch circuit and a standard chip; the test chip is connected with the input end of the switch circuit, the output end of the switch circuit is connected with the standard chip, the test chip and the standard chip are set to be in a one-transmitting-one-receiving state, the performance of the test chip is judged by comparing with the data of the standard chip, the working state of the test circuit is controlled by the switch circuit, and the data of the test chip and the data of the standard chip are compared to improve the accuracy of the test.
Description
Technical Field
The utility model belongs to the technical field of serial ports chip test technique and specifically relates to a serial ports chip test system's application circuit.
Background
The serial port chip can receive data and transmit data in bidirectional communication, is an important data communication interface and has the essential function of being used as a code converter between a CPU and serial equipment; when data is sent out from the CPU through the serial port, byte data is converted into serial bits; upon receiving data, the serial bits are converted into byte data; the application program needs to use the serial port for communication, a resource application requirement (opening the serial port) needs to be provided for an operating system before the application program is used, and resources need to be released (closing the serial port) after the communication is completed; the serial port chip is extremely important in data transmission, so that the requirement on performance parameters of the serial port chip is higher and higher, various parameters need to be tested, but the number of test channels of the conventional serial port chip test system is not enough, and the test channels cannot be switched to obtain corresponding test parameters.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to overcome prior art's is not enough, provides a serial ports chip test system's application circuit.
The utility model provides a its technical problem take following technical scheme to realize:
an application circuit of a serial port chip test system comprises a connecting circuit, an expansion circuit and a test circuit; the connecting circuit is respectively connected with the expansion circuit and the test circuit, and a test channel of the test circuit is switched through the expansion circuit.
Preferably, the extended circuit chip is of the PCA9506BS type.
Preferably, the test circuit further comprises a control circuit, the control circuit is connected with the connecting circuit, and the control circuit is connected with the test circuit through the connecting circuit in a control mode.
Preferably, the connection circuit is of the type TFM-150-12-L-D-A.
Preferably, the model of the control circuit chip is PXIe _ 6571.
Preferably, the test circuit comprises a test chip, a switch circuit and a standard chip; the test chip is connected with the input end of the switch circuit, the output end of the switch circuit is connected with the standard chip, the test chip and the standard chip are set to be in a one-transmitting-one-receiving state, the performance of the test chip is judged by comparing with the data of the standard chip, and the working state of the test circuit is controlled by the switch circuit.
Preferably, the test circuit further comprises a filter circuit; the test chip is connected with the filter circuit and used for carrying out filtering processing on the test chip.
Preferably, the model of the standard chip is MAX 3490; the model of the test chip is DG 3490.
Preferably, the power supply filter circuit connected with the standard chip is further included for performing filtering processing on the power supply signal.
Preferably, the test circuit further comprises a switching circuit connected to the test circuit for switching data channels.
The utility model has the advantages that:
1. the utility model relates to an application circuit of a serial port chip test system, which comprises a connecting circuit, an extension circuit and a test circuit; the connecting circuit is respectively connected with the expansion circuit and the test circuit, the model of the expansion circuit chip is PCA9506BS, the test channel of the test circuit is switched through the expansion circuit, and test channel transmission test parameters are increased.
2. The test circuit of the utility model comprises a test chip, a switch circuit and a standard chip; the test chip is connected with the input end of the switch circuit, the output end of the switch circuit is connected with the standard chip, the test chip and the standard chip are set to be in a one-transmitting-one-receiving state, the performance of the test chip is judged by comparing with the data of the standard chip, the working state of the test circuit is controlled by the switch circuit, and the data of the test chip and the data of the standard chip are compared to improve the accuracy of the test.
Drawings
Fig. 1 is a connection block diagram of the present invention;
fig. 2 is a connection diagram of the expansion circuit of the present invention;
fig. 3 is a connection circuit diagram of the present invention;
fig. 4 is a connection diagram of a control circuit of the present invention;
FIG. 5 is a circuit diagram of the test circuit of the present invention;
fig. 6 is a connection diagram of the power filter circuit of the present invention;
fig. 7 is a switching circuit connection diagram of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When a component is referred to as being "connected" to another component, it can be directly connected to the other component or intervening components may also be present. When a component is referred to as being "disposed on" another component, it can be directly on the other component or intervening components may also be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
As shown in fig. 1-3, the utility model relates to an application circuit of serial port chip test system, its characterized in that: the test circuit comprises a connecting circuit, an expansion circuit and a test circuit; the connecting circuit is respectively connected with the expansion circuit and the test circuit, and a test channel of the test circuit is switched through the expansion circuit;
specifically, the model of the expansion circuit chip is PCA9506 BS; the model of the connecting circuit is TFM-150-12-L-D-A; the S0_ IO pin of the connecting circuit is correspondingly connected with the S0_ IO pin of the expansion circuit respectively; the S0_ DIO pins of the connecting circuit are correspondingly connected with the S0_ DIO pins of the testing circuit respectively.
Further, as shown in fig. 4, the testing device further includes a control circuit, the control circuit is connected to the connection circuit, and the control circuit is connected to the testing circuit through the connection circuit; specifically, the control circuit chip is PXIe _ 6571; the S0_ DIO pins of the connecting circuit are correspondingly connected with the S0_ DIO pins of the control circuit respectively.
Further, as shown in fig. 5, the test circuit includes a test chip, a switch circuit and a standard chip; the test chip is connected with the input end of the switch circuit, the output end of the switch circuit is connected with the standard chip, the test chip and the standard chip are set to be in a one-transmitting-one-receiving state, the performance of the test chip is judged by comparing the data of the test chip with the data of the standard chip, and the working state of the test circuit is controlled by the switch circuit;
specifically, the standard chip model is MAX 3490; the model of the test chip is DG 3490; the switch circuit comprises a switch relay RLY18B and a switch relay RLY 19B; the test chip is connected with the standard chip through the switch circuit, the test chip can be set to be in a data sending mode and the standard chip can be set to be in a data receiving mode, and whether the performance of the test chip is good or not is judged by comparing the data sent by the test chip with the data received by the standard chip; the test chip can be set to a data receiving mode and the standard chip can be set to a data sending mode, whether the performance of the test chip is good or not is judged by comparing the data received by the test chip with the data sent by the standard chip, and the switch circuit controls the working state of the test circuit.
Further, the test circuit further comprises a filter circuit; the test chip is connected with the filter circuit and is used for carrying out filtering processing on the test chip; specifically, the filter circuit includes a capacitor C1 and a capacitor C2.
Further, as shown in fig. 6, the device further includes a power filter circuit connected to the standard chip for performing filtering processing on the power signal; specifically, the power supply filter circuit comprises a switch relay RLY17B and a jumper switch J3; and a VCC _ MAX3490 pin of the power supply filter circuit is connected with a VCC _ MAX3490 pin of the standard chip.
Further, as shown in fig. 7, the testing apparatus further includes a switching circuit connected to the testing circuit, for switching the data channel; specifically, an S0_ IO pin and a PMV pin of the switching circuit are respectively and correspondingly connected with an S0_ IO pin and a PMV pin of the connecting circuit; the S0_ A pin to the S0_ Z pin of the switching circuit are correspondingly connected with the S0_ A pin to the S0_ Z pin of the test circuit respectively.
The working principle is as follows:
1. switching a test channel of the test circuit through the expansion circuit and increasing test channel transmission test parameters;
2. the test chip is connected with the input end of the switch circuit, the output end of the switch circuit is connected with the standard chip, the test chip and the standard chip are set to be in a transmitting-receiving state, and the performance of the test chip is judged by comparing the data of the test chip and the data of the standard chip;
3. the working state of the test circuit is controlled through the switch circuit, and the data of the test chip is compared with the data of the standard chip to improve the test accuracy;
4. the power supply filter circuit connected with the standard chip is used for filtering a power supply signal; the test chip is connected with the filter circuit and is used for carrying out filtering processing on the test chip;
5. and the switching circuit is connected with the test circuit and is used for switching data channels.
The utility model relates to an application circuit of a serial port chip test system, which comprises a connecting circuit, an extension circuit and a test circuit; the connecting circuit is respectively connected with the expansion circuit and the test circuit, the model of the expansion circuit chip is PCA9506BS, the test channel of the test circuit is switched through the expansion circuit, and test channel transmission test parameters are increased; the test circuit comprises a test chip, a switch circuit and a standard chip; the test chip is connected with the input end of the switch circuit, the output end of the switch circuit is connected with the standard chip, the test chip and the standard chip are set to be in a one-transmitting-one-receiving state, the performance of the test chip is judged by comparing with the data of the standard chip, the working state of the test circuit is controlled by the switch circuit, and the data of the test chip and the data of the standard chip are compared to improve the accuracy of the test.
The above description is for the detailed description of the preferred possible embodiments of the present invention, but the embodiments are not intended to limit the scope of the present invention, and all equivalent changes or modifications accomplished under the technical spirit suggested by the present invention should fall within the scope of the present invention.
Claims (10)
1. The utility model provides an application circuit of serial ports chip test system which characterized in that: the test circuit comprises a connecting circuit, an expansion circuit and a test circuit; the connecting circuit is respectively connected with the expansion circuit and the test circuit, and a test channel of the test circuit is switched through the expansion circuit.
2. The application circuit of the serial port chip test system according to claim 1, wherein: the extended circuit chip is of the PCA9506BS model.
3. The application circuit of the serial port chip test system according to claim 1, wherein: the test circuit is characterized by further comprising a control circuit, wherein the control circuit is connected with the connecting circuit, and the control circuit is connected with the test circuit through the connecting circuit in a control mode.
4. The application circuit of the serial port chip test system according to claim 3, wherein: the model of the connecting circuit is TFM-150-12-L-D-A.
5. The application circuit of the serial port chip test system according to claim 3, wherein: the model of the control circuit chip is PXIe _ 6571.
6. The application circuit of the serial port chip test system according to claim 1, wherein: the test circuit comprises a test chip, a switch circuit and a standard chip; the test chip is connected with the input end of the switch circuit, the output end of the switch circuit is connected with the standard chip, the test chip and the standard chip are set to be in a one-transmitting-one-receiving state, the performance of the test chip is judged by comparing with the data of the standard chip, and the working state of the test circuit is controlled by the switch circuit.
7. The application circuit of the serial port chip test system according to claim 6, wherein: the test circuit further comprises a filter circuit; the test chip is connected with the filter circuit and used for carrying out filtering processing on the test chip.
8. The application circuit of the serial port chip test system according to claim 6, wherein: the model of the standard chip is MAX 3490; the model of the test chip is DG 3490.
9. The application circuit of the serial port chip test system according to claim 6, wherein: the power supply filter circuit is connected with the standard chip and is used for filtering power supply signals.
10. The application circuit of the serial port chip test system according to claim 1, wherein: the test circuit also comprises a switching circuit connected with the test circuit and used for switching data channels.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120920834.XU CN215067112U (en) | 2021-04-29 | 2021-04-29 | Application circuit of serial port chip test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120920834.XU CN215067112U (en) | 2021-04-29 | 2021-04-29 | Application circuit of serial port chip test system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN215067112U true CN215067112U (en) | 2021-12-07 |
Family
ID=79107826
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202120920834.XU Active CN215067112U (en) | 2021-04-29 | 2021-04-29 | Application circuit of serial port chip test system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN215067112U (en) |
-
2021
- 2021-04-29 CN CN202120920834.XU patent/CN215067112U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103714029A (en) | Novel two-line synchronous communication protocol and application | |
| CN109307833A (en) | Apparatus for testing chip and chip detecting method | |
| CN212009333U (en) | Interface board compatible with multiple interface signals | |
| CN215067112U (en) | Application circuit of serial port chip test system | |
| CN109407574A (en) | Output-controlling device and its method may be selected in a kind of multibus | |
| CN105406883A (en) | Wireless communication device | |
| CN105068967B (en) | Control method, device and the terminal of I2C equipment | |
| CN207623778U (en) | A kind of board interface test device | |
| CN107577574B (en) | Debugging switching circuit and debugging circuit board | |
| CN210804414U (en) | Circuit with reusable communication interface | |
| CN109347548B (en) | Optical path integration test platform | |
| CN205176076U (en) | Switching device who connects multiport testing arrangement and multiport device | |
| CN212750729U (en) | Bypass control circuit and network security equipment | |
| CN211906270U (en) | 485 device and RS485 interface of self-adaptation serial bus polarity | |
| CN207283547U (en) | A kind of carrier communication apparatus for three-phase power line communication | |
| CN114896185B (en) | MIPI interface data receiving and transmitting device and mobile terminal | |
| CN110825681B (en) | LBE bus-based SMHK381 test method | |
| CN216527145U (en) | Serial port half/full duplex testing tool | |
| CN221303972U (en) | Reconfigurable PCI input/output card based on FPGA | |
| CN104636302A (en) | Experimental device, experimental client, experimental system and experimental method of experimental system | |
| CN215005739U (en) | Bus board level protocol verification circuit | |
| CN213637740U (en) | Equipment debugging device based on bluetooth communication | |
| CN218630094U (en) | Circuit board batch test circuit and circuit board batch test tool | |
| CN217087898U (en) | A field debugging frock for HPLC carrier module | |
| CN113783620B (en) | Control method and device of light conversion equipment, light conversion equipment and communication system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |