CN214313181U - High-current field effect transistor - Google Patents
High-current field effect transistor Download PDFInfo
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- CN214313181U CN214313181U CN202023119587.8U CN202023119587U CN214313181U CN 214313181 U CN214313181 U CN 214313181U CN 202023119587 U CN202023119587 U CN 202023119587U CN 214313181 U CN214313181 U CN 214313181U
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Abstract
The utility model provides a high-current field effect transistor, which comprises an insulating packaging body, wherein a field effect chip is arranged in the insulating packaging body, a drain electrode of the field effect chip is welded on a D-pole conductive pin, and an S-pole conductive pin and a G-pole conductive pin are respectively arranged on two opposite sides of the D-pole conductive pin; the S-pole conductive pin is connected with the source electrode of the field effect transistor chip through the S-pole conductive bridge sheet, an S-pole positioning column is fixed on the S-pole conductive pin, and an S-pole positioning hole is formed in the S-pole conductive bridge sheet; the G pole conductive pin is connected with the grid of the field effect tube chip through the G pole conductive bridge sheet, a G pole positioning column is fixed on the G pole conductive pin, and a G pole positioning hole is formed in the G pole conductive bridge sheet. The utility model discloses not only can show the heat dispersion that improves field effect tube chip, can also show the electric conductive property that improves between conducting pin and the field effect tube chip, excellent performance under the condition of heavy current work, overall structure is stable firm, long service life.
Description
Technical Field
The utility model relates to a field effect transistor specifically discloses a heavy current field effect transistor.
Background
The field effect transistor is also called as field effect transistor, is a semiconductor device for controlling the current of an output loop by controlling the electric field effect of an input loop, and has the advantages of high input resistance, low noise, low power consumption, large dynamic range, easy integration, no secondary breakdown phenomenon, wide safe working area and the like.
The field effect transistor is divided into a direct insertion type package and a patch type package according to the package type, the field effect transistor of the patch type package is generally used in electronic products with flat design, but because the field effect transistor of the patch type package is tightly attached to the surface of a PCB (printed Circuit Board), heat generated in the working process can be dissipated only from the upper part of the field effect transistor, the heat dissipation efficiency is low, the working performance of the field effect transistor is influenced, a chip and a pin in the field effect transistor in the prior art are bridged through a lead, the heat generated in the large-current working process is large, and the large-current working is unstable.
SUMMERY OF THE UTILITY MODEL
Therefore, it is necessary to provide a high-current field effect transistor, which has good heat dissipation performance and electrical conductivity, stable operation of high current, and stable and firm overall structure, in view of the problems in the prior art.
In order to solve the prior art problem, the utility model discloses a high-current field effect transistor, which comprises an insulating packaging body, wherein a field effect chip is arranged in the insulating packaging body, the drain electrode of the field effect chip is welded on a D-pole conductive pin, and an S-pole conductive pin and a G-pole conductive pin are respectively arranged at two opposite sides of the D-pole conductive pin;
the S-pole conductive pin is connected with the source electrode of the field effect chip through the S-pole conductive bridge sheet, the S-pole conductive bridge sheet is tightly attached to the source electrode of the field effect chip and the S-pole conductive pin, an S-pole positioning column is fixed on the S-pole conductive pin, an S-pole positioning hole is formed in the S-pole conductive bridge sheet, and the S-pole positioning column is inserted in the S-pole positioning hole;
the G pole conductive pin is connected with the grid of the field effect chip through the G pole conductive bridge sheet, the G pole conductive bridge sheet is tightly attached to the grid of the field effect chip and the G pole conductive pin, a G pole positioning column is fixed on the G pole conductive pin, a G pole positioning hole is formed in the G pole conductive bridge sheet, and the G pole positioning column is inserted in the G pole positioning hole.
Furthermore, the D pole conducting pin comprises a D pole upper flat plate, a D pole vertical plate and a D pole lower flat plate which are sequentially connected, and the drain electrode of the field effect transistor chip is welded on the D pole upper flat plate; the S pole conductive pin comprises an S pole upper flat plate, an S pole vertical plate and an S pole lower flat plate which are sequentially connected, and the S pole positioning column is fixed on the S pole upper flat plate; the G pole conductive pin comprises a G pole upper flat plate, a G pole vertical plate and a G pole lower flat plate which are sequentially connected, and a G pole positioning column is fixed on the G pole upper flat plate.
Furthermore, a heat dissipation ceramic seat is fixed at the bottom of the insulating packaging body, a concave groove is formed in the heat dissipation ceramic seat, the D electrode upper flat plate is located in the concave groove, and the S electrode upper flat plate and the G electrode upper flat plate are both located on the heat dissipation ceramic seat.
Furthermore, a plurality of reinforcing grooves are also arranged on the heat dissipation ceramic seat, and the reinforcing grooves are positioned on the peripheries of the S pole upper flat plate and the G pole upper flat plate.
Furthermore, the S pole positioning column and the G pole positioning column are both conductive silver glue columns.
Furthermore, the shape of one end of the G-pole conductive bridge piece close to the S-pole conductive bridge piece is the same as that of the grid electrode in the field effect transistor chip, and an insulating glue layer is connected between the G-pole conductive bridge piece and the S-pole conductive bridge piece.
Furthermore, the bottom of the insulating glue layer is fixed with an insulating raised line which is positioned between the grid electrode and the source electrode of the field effect transistor chip.
The utility model has the advantages that: the utility model discloses a heavy current field effect transistor, the mode of connecting is hugged closely through electrically conductive bridge piece to two electrodes in the top of field effect chip and the electrically conductive foot that corresponds realizes switching on, not only can show the heat dispersion that improves field effect chip, can also show the electric conductive property that improves between electrically conductive foot and the field effect chip, excellent performance under the condition of heavy current work, the connection structure between electrically conductive bridge piece and the electrically conductive foot can effectively release the stress that produces among the encapsulation process of moulding plastics, can effectively avoid insulating packaging body to tear, overall structure is stable firm, long service life.
Drawings
Fig. 1 is a schematic view of the exploded structure of the present invention.
Fig. 2 is a schematic sectional view of the present invention.
The reference signs are: the structure comprises an insulating packaging body 10, a field effect transistor chip 20, a D pole conductive pin 30, a D pole upper flat plate 301, a D pole vertical plate 302, a D pole lower flat plate 303, an S pole conductive pin 40, an S pole upper flat plate 401, an S pole vertical plate 402, an S pole lower flat plate 403, an S pole positioning column 41, a G pole conductive pin 50, a G pole upper flat plate 501, a G pole vertical plate 502, a G pole lower flat plate 503, a G pole positioning column 51, an S pole conductive bridge sheet 60, an S pole positioning hole 61, a G pole conductive bridge sheet 70, a G pole positioning hole 71, an insulating glue layer 80, an insulating raised line 81, a heat dissipation ceramic seat 90, a depressed groove 91 and a reinforcing groove 92.
Detailed Description
For further understanding of the features and technical means of the present invention, as well as the specific objects and functions attained by the present invention, the present invention will be described in further detail with reference to the accompanying drawings and detailed description.
Refer to fig. 1 and 2.
The embodiment of the utility model discloses a high-current field effect transistor, including insulating packaging body 10, be equipped with field effect chip 20 in the insulating packaging body 10, the drain electrode of field effect chip 20 welds on D utmost point conducting pin 30, D utmost point conducting pin 30 is located the below of field effect chip 20, and the relative both sides of D utmost point conducting pin 30 are equipped with S utmost point conducting pin 40 and G utmost point conducting pin 50 respectively;
the S pole conductive pin 40 is connected with the source electrode of the field effect chip 20 through the S pole conductive bridge sheet 60, the S pole conductive bridge sheet 60 is respectively connected with the S pole conductive pin 40 and the source electrode in a welding way through solder paste, the S pole conductive bridge sheet 60 is tightly attached to the source electrode of the field effect chip 20 and the S pole conductive pin 40, the heat conduction effect of the S pole conductive bridge sheet 60 between the field effect chip 20 and the S pole conductive pin 40 can be effectively ensured, the performance is excellent under the condition of large current operation, in addition, the S pole conductive bridge sheet 60 and the S pole conductive pin 40 are both conductive structures with enough sectional areas, the performance of the large current operation can be further ensured, the S pole positioning column 41 is fixed on the S pole conductive pin 40, the S pole conductive bridge sheet 60 is provided with the S pole positioning hole 61, the S pole positioning column 41 is inserted in the S pole positioning hole 61, the reliability of the connection structure between the S-pole conductive bridge piece 60 and the S-pole conductive pin 40 can be effectively improved;
the G-pole conductive pin 50 is connected with the grid of the field effect chip 20 through the G-pole conductive bridge sheet 70, the G-pole conductive bridge sheet 70 is respectively connected with the G-pole conductive pin 50 and the grid in a welding way through solder paste, the G-pole conductive bridge sheet 70 is tightly attached to the grid of the field effect chip 20 and the G-pole conductive pin 50, the heat conduction effect of the G-pole conductive bridge sheet 70 between the field effect chip 20 and the G-pole conductive pin 50 can be effectively ensured, the performance is excellent under the condition of high-current operation, in addition, the G-pole conductive bridge sheet 70 and the G-pole conductive pin 50 are both conductive structures with enough sectional areas, the performance of the high-current operation can be further ensured, a G-pole positioning column 51 is fixed on the G-pole conductive pin 50, a G-pole positioning hole 71 is arranged in the G-pole conductive bridge sheet 70, and the G-pole positioning column 51 is inserted in the G-pole positioning hole 71, the reliability of the connection structure between the G-pole conductive bridge piece 70 and the G-pole conductive pin 50 can be effectively improved.
The utility model discloses the electrically conductive bridge piece of inside setting can effectively improve heat dispersion and electric conductive property, can effectively improve the performance of heavy current during operation, is connected through the tin cream between electrically conductive bridge piece and the electrically conductive pin that corresponds, can effectively release the stress that produces among the encapsulation process of moulding plastics to effectively avoid insulating packaging body 10 to be torn, overall structure is reliable and stable.
In this embodiment, the D-pole conductive pin 30 includes a D-pole upper flat plate 301, a D-pole vertical plate 302, and a D-pole lower flat plate 303, which are sequentially connected from top to bottom, the D-pole conductive pin 30 is an integrally formed structure, the D-pole lower flat plate 303 is located outside the insulating package 10, the D-pole upper flat plate 301 is located inside the insulating package 10, the D-pole vertical plate 302 may be partially or completely located inside the insulating package 10, preferably, the D-pole vertical plate 302 is an inclined vertical plate, and the drain of the fet chip 20 is welded to the D-pole upper flat plate 301; the S-pole conductive pin 40 comprises an S-pole upper flat plate 401, an S-pole vertical plate 402 and an S-pole lower flat plate 403 which are sequentially connected from top to bottom, the S-pole conductive pin 40 is of an integrally formed structure, the S-pole lower flat plate 403 is positioned outside the insulating packaging body 10, the S-pole upper flat plate 401 is positioned in the insulating packaging body 10, the S-pole vertical plate 402 can be partially or completely positioned in the insulating packaging body 10, preferably, the S-pole vertical plate 402 is an oblique vertical plate, the S-pole positioning column 41 is fixed on the S-pole upper flat plate 401, and the S-pole conductive bridge piece 60 is tightly welded on the S-pole upper flat plate 401 through tin paste; the G-pole conductive pin 50 comprises a G-pole upper flat plate 501, a G-pole vertical plate 502 and a G-pole lower flat plate 503 which are sequentially connected from top to bottom, the G-pole conductive pin 50 is of an integrally formed structure, the G-pole lower flat plate 503 is located outside the insulating packaging body 10, the G-pole upper flat plate 501 is located in the insulating packaging body 10, the G-pole vertical plate 502 can be partially or completely located in the insulating packaging body 10, preferably, the G-pole vertical plate 502 is an inclined vertical plate, the G-pole positioning column 51 is fixed on the G-pole upper flat plate 501, and the G-pole conductive bridge piece 70 is tightly welded on the G-pole upper flat plate 501 through solder paste.
Based on the above embodiment, the bottom of the insulating package 10 is fixed with a heat dissipation ceramic base 90, the heat dissipation ceramic has good heat dissipation performance and insulation performance, the heat dissipation ceramic base 90 is provided with a recessed groove 91 therein, preferably, the depth of the recessed groove 91 is equal to the thickness of the fet chip 20, the D-pole upper plate 301 is located in the recessed groove 91, the flat plate 401 on the S pole and the flat plate 501 on the G pole are both positioned on the heat dissipation ceramic seat 90, so that the heat dissipation performance of the field effect transistor can be further improved, the stability of the overall structure can be effectively improved, the conductive pins are prevented from being crushed and deformed in the solid crystal welding process, the flat plate 401 on the S pole and the flat plate 501 on the G pole are positioned on the same horizontal plane, the flat plate 301 on the D pole is positioned above the flat plate 401 on the S pole and the flat plate 501 on the G pole, the reliability of the overall structure can be effectively improved, and the conductive bridge piece can be ensured to be in reliable surface contact with the corresponding upper plane.
Based on the above embodiment, the heat dissipation ceramic base 90 is further provided with a plurality of reinforcing grooves 92, and the reinforcing grooves 92 are located around the S-pole upper flat plate 401 and the G-pole upper flat plate 501, so that the firmness of the connection structure between the insulating package body 10 and the heat dissipation ceramic base 90 can be effectively improved.
In this embodiment, the S-pole positioning column 41 and the G-pole positioning column 51 are conductive silver adhesive columns, and the conductive silver adhesive columns have good elasticity and conductivity, so that the positioning effect between the positioning holes and the positioning columns can be effectively improved, and meanwhile, the conductive connection effect between the conductive bridge piece and the corresponding conductive pins can be effectively ensured.
In this embodiment, the shape of the end of the G-pole conductive bridge piece 70 close to the S-pole conductive bridge piece 60 is the same as the shape and size of the gate in the field effect chip 20, so as to effectively ensure the heat dissipation performance of the G-pole conductive bridge piece 70, and the insulating adhesive layer 80 is connected between the G-pole conductive bridge piece 70 and the S-pole conductive bridge piece 60, so as to effectively avoid the short circuit between the G-pole conductive bridge piece 70 and the S-pole conductive bridge piece 60.
Based on the above embodiment, the bottom of the insulating adhesive layer 80 is fixed with the insulating protruding strip 81, and the insulating protruding strip 81 is located between the gate and the source of the field effect transistor chip 20, so as to effectively avoid short circuit caused by solder paste overflow during soldering.
The above-mentioned embodiments only represent some embodiments of the present invention, and the description thereof is specific and detailed, but not to be construed as limiting the scope of the present invention. It should be noted that, for those skilled in the art, without departing from the spirit of the present invention, several variations and modifications can be made, which are within the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the appended claims.
Claims (7)
1. The high-current field effect transistor is characterized by comprising an insulating packaging body (10), wherein a field effect chip (20) is arranged in the insulating packaging body (10), the drain electrode of the field effect chip (20) is welded on a D-pole conductive pin (30), and an S-pole conductive pin (40) and a G-pole conductive pin (50) are respectively arranged on two opposite sides of the D-pole conductive pin (30);
the S-pole conductive pin (40) is connected with the source electrode of the field effect chip (20) through an S-pole conductive bridge sheet (60), the S-pole conductive bridge sheet (60) is tightly attached to the source electrode of the field effect chip (20) and the S-pole conductive pin (40), an S-pole positioning column (41) is fixed on the S-pole conductive pin (40), an S-pole positioning hole (61) is formed in the S-pole conductive bridge sheet (60), and the S-pole positioning column (41) is inserted into the S-pole positioning hole (61);
the G-pole conductive pin (50) is connected with the grid electrode of the field effect chip (20) through a G-pole conductive bridge sheet (70), the G-pole conductive bridge sheet (70) is tightly attached to the grid electrode of the field effect chip (20) and the G-pole conductive pin (50), a G-pole positioning column (51) is fixed on the G-pole conductive pin (50), a G-pole positioning hole (71) is formed in the G-pole conductive bridge sheet (70), and the G-pole positioning column (51) is inserted in the G-pole positioning hole (71).
2. The high-current Field Effect Transistor (FET) of claim 1, wherein said D-pole conducting pin (30) comprises a D-pole upper flat plate (301), a D-pole vertical plate (302) and a D-pole lower flat plate (303) which are connected in sequence, and the drain of said FET chip (20) is soldered on said D-pole upper flat plate (301); the S-pole conductive pin (40) comprises an S-pole upper flat plate (401), an S-pole vertical plate (402) and an S-pole lower flat plate (403) which are sequentially connected, and the S-pole positioning column (41) is fixed on the S-pole upper flat plate (401); the G pole conductive pin (50) comprises a G pole upper flat plate (501), a G pole vertical plate (502) and a G pole lower flat plate (503) which are sequentially connected, and the G pole positioning column (51) is fixed on the G pole upper flat plate (501).
3. A high current fet according to claim 2, wherein a heat dissipating ceramic base (90) is fixed to the bottom of the insulating package (10), a recessed groove (91) is formed in the heat dissipating ceramic base (90), the D-pole upper plate (301) is located in the recessed groove (91), and the S-pole upper plate (401) and the G-pole upper plate (501) are both located on the heat dissipating ceramic base (90).
4. A high current fet as claimed in claim 3 wherein said heat dissipating ceramic base (90) further comprises a plurality of stiffening grooves (92), said stiffening grooves (92) being located around said S-pole top plate (401) and said G-pole top plate (501).
5. A high current fet as claimed in claim 1 wherein said S-pole positioning post (41) and said G-pole positioning post (51) are conductive silver glue posts.
6. A high current fet as claimed in claim 1, wherein said G-pole conductive bridge (70) has a shape close to the end of said S-pole conductive bridge (60) identical to the shape of the gate of said fet chip (20), and an insulating glue layer (80) is connected between said G-pole conductive bridge (70) and said S-pole conductive bridge (60).
7. A high current FET as claimed in claim 6, wherein said insulating glue layer (80) has an insulating rib (81) affixed to the bottom thereof, said insulating rib (81) being located between the gate and source of said FET chip (20).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023119587.8U CN214313181U (en) | 2020-12-22 | 2020-12-22 | High-current field effect transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023119587.8U CN214313181U (en) | 2020-12-22 | 2020-12-22 | High-current field effect transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN214313181U true CN214313181U (en) | 2021-09-28 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202023119587.8U Active CN214313181U (en) | 2020-12-22 | 2020-12-22 | High-current field effect transistor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN214313181U (en) |
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2020
- 2020-12-22 CN CN202023119587.8U patent/CN214313181U/en active Active
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