CN214203699U

CN214203699U - P-type crystalline silicon solar cell with tunneling passivation

Info

Publication number: CN214203699U
Application number: CN202022731561.2U
Authority: CN
Inventors: 陈姝; 冯志强
Original assignee: Trina Solar Changzhou Technology Co ltd; Trina Solar Co Ltd
Current assignee: Trina Solar Changzhou Technology Co ltd; Trina Solar Co Ltd
Priority date: 2020-11-23
Filing date: 2020-11-23
Publication date: 2021-09-14
Anticipated expiration: 2030-11-23

Abstract

The utility model belongs to the technical field of crystalline silicon solar cell, a P type crystalline silicon solar cell with tunneling passivation is related to, including P type substrate, its characterized in that, P type substrate openly by interior to being equipped with selectivity projecting pole, ultra-thin tunneling silicon oxide layer, phosphorus doping polycrystalline silicon layer, positive silicon oxide passivation layer and positive silicon nitride passivation layer outward in proper order, P type substrate back by interior to outer back aluminium oxide passivation layer and back silicon nitride layer in proper order, be equipped with positive metal silver grid line on the positive silicon nitride passivation layer, P type substrate back is equipped with back metal aluminum grid line, back metal aluminum grid line run through back aluminium oxide passivation layer and back silicon nitride layer. The utility model discloses the structure is very thin, when solving silicon chip light absorption, has reduced the surface recombination speed of battery effectively, improves the positive passivation of battery, promotes the battery performance.

Description

P-type crystalline silicon solar cell with tunneling passivation

Technical Field

The utility model belongs to the technical field of crystalline silicon solar cell, a patterned passivation contact solar cell is related to.

Background

In recent years, the photovoltaic industrialization technology is rapidly developed, and each manufacturing link has technical update. The new technology and the new process bring lower cost and better product performance. In recent years, the development of the domestic crystalline silicon solar cell technology still focuses on the industrial introduction of the PERC cell, and although the productivity of the P-type PERC cell is always increasing, the industrialization efficiency is probably approaching to saturation, so that the development of the PERC cell of the next generation is urgently needed, and the breakthrough of product performance and cost is realized by reducing the process change as much as possible on the basis of the original production line.

SUMMERY OF THE UTILITY MODEL

The utility model aims at the above-mentioned problem, provide a P type crystalline silicon solar cell with tunneling passivation.

In order to achieve the above purpose, the utility model adopts the following technical proposal:

the P-type crystalline silicon solar cell with tunneling passivation comprises a P-type substrate and is characterized in that a selective emitter, an ultrathin tunneling silicon oxide layer, a phosphorus-doped polycrystalline silicon layer, a front silicon oxide passivation layer and a front silicon nitride passivation layer are sequentially arranged on the front side of the P-type substrate from inside to outside, a back aluminum oxide passivation layer and a back silicon nitride passivation layer are sequentially arranged on the back side of the P-type substrate from inside to outside, front metal silver grid lines are arranged on the front silicon nitride passivation layer, back metal aluminum grid lines are arranged on the back side of the P-type substrate, the back metal aluminum grid lines penetrate through the back aluminum oxide passivation layer and the back silicon nitride passivation layer, and a back local back surface field is arranged at the connecting position of the back metal aluminum grid lines and the P-type substrate.

Further, the thickness of the ultrathin tunneling silicon oxide layer is 0.5nm-5nm, the sum of the thicknesses of the phosphorus-doped polycrystalline silicon layer, the front silicon oxide passivation layer and the front silicon nitride passivation layer is 30nm-300nm, and the sum of the thicknesses of the back aluminum oxide passivation layer and the back silicon nitride passivation layer is 10nm-300 nm.

Compared with the prior art, the utility model has the advantages of:

a TopCon structure passivation technology consisting of a tunneling silicon oxide layer and a phosphorus-doped polycrystalline silicon layer is adopted on the front side of the cell structure, and a passivation tunneling layer is added on the basis of original pure silicon nitride surface passivation. Because the structure is very thin, the surface recombination rate of the cell is effectively reduced while the light absorption of the silicon wafer is solved, the front passivation of the cell is improved, and the cell performance is improved.

Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention.

Drawings

Fig. 1 is a schematic structural diagram of a solar cell according to the present invention.

In the figure: the solar cell comprises a P-type substrate 1, a selective emitter 2, an ultrathin tunneling silicon oxide layer 3, a phosphorus-doped polycrystalline silicon layer 4, a front silicon oxide passivation layer 5, a front silicon nitride passivation layer 6, a back aluminum oxide passivation layer 7, a back silicon nitride layer 8, a front metal silver grid line 9, a back metal aluminum grid line 10 and a back local back field 11.

Detailed Description

In order to make the technical field personnel understand the utility model discloses the scheme, will combine the drawing in the embodiment of the utility model below, to the technical scheme in the embodiment of the utility model carries out clear, complete description.

As shown in fig. 1, the embodiment provides a P-type crystalline silicon solar cell with tunneling passivation, which includes a P-type substrate 1, and is characterized in that a selective emitter 2, an ultrathin tunneling silicon oxide layer 3, a phosphorus-doped polysilicon layer 4, a front silicon oxide passivation layer 5, and a front silicon nitride passivation layer 6 are sequentially disposed on a front surface of the P-type substrate 1 from inside to outside, a back aluminum oxide passivation layer 7 and a back silicon nitride layer 8 are sequentially disposed on a back surface of the P-type substrate 1 from inside to outside, a front metal silver grid line 9 is disposed on the front silicon nitride passivation layer 6, a back metal aluminum grid line 10 is disposed on the back surface of the P-type substrate 1, the back metal aluminum grid line 10 penetrates through the back aluminum oxide passivation layer 7 and the back silicon nitride layer 8, and a back local back surface field 11 is disposed at a connection position of the back metal aluminum grid line 10 and the P-type substrate 1.

The thickness of the ultrathin tunneling silicon oxide layer 3 is 0.5nm-5nm, the sum of the thicknesses of the phosphorus-doped polycrystalline silicon layer 4, the front-side silicon oxide passivation layer 5 and the front-side silicon nitride passivation layer 6 is 30nm-300nm, and the sum of the thicknesses of the back-side aluminum oxide passivation layer 7 and the back-side silicon nitride passivation layer 8 is 10nm-300 nm.

By adopting the TopCon structure passivation technology consisting of the ultrathin tunneling silicon oxide layer and the phosphorus-doped polycrystalline silicon layer on the front side of the cell structure, the passivation tunneling layer is added on the basis of the original pure silicon nitride surface passivation, and the structure is very thin, so that the surface recombination rate of the cell is effectively reduced while the light absorption of a silicon wafer is solved, the front side passivation of the cell is improved, and the cell performance is improved.

The utility model discloses a P type crystalline silicon solar cell with tunneling passivation, preparation through following step is obtained:

1) after texturing, phosphorus diffusion is carried out on the front surface of the silicon chip, the phosphorus diffusion uses low pressure or normal pressure diffusion, the sheet resistance is between 100ohm/sq and 300ohm/sq,

2) heavily doping the front surface with laser PSG to form a selective emitter layer, wherein the difference between the sheet resistance of the heavily doped front surface with laser PSG and the sheet resistance of the original front surface is 30-150 ohm/sq,

3) after PSG is removed, the front surface of the silicon wafer is sequentially provided with an ultrathin tunneling silicon oxide layer 3 and an amorphous silicon layer, wherein the amorphous silicon layer is an in-situ phosphorus-doped amorphous silicon film or an intrinsic amorphous silicon film. When the amorphous silicon layer is an intrinsic amorphous silicon film, a doping source is introduced from the outside subsequently, when the amorphous silicon layer is an in-situ doped amorphous silicon film, the subsequent high-temperature annealing is carried out to activate doping atoms, the annealing temperature is 800-1050 ℃, the time is 1-300min, after the high-temperature treatment, the amorphous silicon film is converted into a polycrystalline silicon film, and the thickness of the polycrystalline silicon film is 2-20 nm; the ultrathin tunneling silicon oxide layer 3 is grown by high-temperature thermal oxidation and is a wet method or a strong oxidizing gas oxidation method, the thickness of the ultrathin tunneling silicon oxide layer 3 is 0.5nm-5nm,

4) high-temperature treatment is carried out on the silicon chip, the annealing crystallization process is completed under the condition that the temperature is not lower than 830 ℃, amorphous silicon is converted into doped polysilicon,

5) removing the phosphorosilicate glass layer on the back, specifically, carrying out single-side HF cleaning on the back of the silicon wafer, removing the phosphorosilicate glass layer on the back,

6) polishing the back surface to form a polished surface or texturing treatment,

7) a front side silicon oxide passivation layer 5 and a front side silicon nitride passivation layer 6 are grown on the front side,

in step 7), the grown passivation film and antireflection film may be multiple SiNx films, or a thermal SiO2 film may be grown first, and then multiple ssinx films are deposited to form a multiple passivation antireflection film. The film can be a SiOx film, an AlOx film or any combination of the three films. The growth mode is ALD or PECVD, and the sum of the thicknesses of the phosphorus-doped polycrystalline silicon layer 4, the front silicon oxide passivation layer 5 and the front silicon nitride passivation layer 6 is 30nm-300 nm. In this embodiment, the back surface is sequentially provided with a back surface aluminum oxide passivation layer 7 and a back surface silicon nitride layer 8 from inside to outside,

8) depositing a passivation film on the back, wherein the deposited passivation film on the back is a laminated SINx film, a SiNx/SiOx laminated layer, a SiNx/AlOx laminated layer or a combination of three films, the whole thickness of the passivation film is 10nm-300nm,

9) back laser holes are formed, the back laser graph is a continuous line or an intermittent line,

10) printing front and back pastes, wherein the front and back pastes are of burn-through type or non-burn-through type, and when the paste is non-burn-through type, the corresponding passivation film is opened by laser, etching paste or blocking line paste, and contact is formed after sintering,

11) and (5) sintering.

The utility model discloses a P type crystalline silicon solar cell with tunneling passivation also can obtain through the preparation method preparation of following step:

p-type monocrystalline silicon is used as a substrate, and conventional texturing is carried out in a solution containing KOH and a texturing additive. After being cleaned by hydrofluoric acid and RCA, the front surface of the silicon chip is subjected to phosphorus diffusion, and the sheet resistance is about 150 ohm/sq. And the front surface of the silicon wafer is subjected to conventional laser PSG heavy doping, and the sheet resistance is 65-75 ohm/sq. Because the thickness of the amorphous silicon is very thin, the slurry is easy to burn through when the silk screen is sintered, so the emitter is in heavy doping contact with the laser PSG, namely the front surface is actually a selective emitter, and the metalized emitter has better open pressure and contact. After hydrofluoric acid and RCA cleaning, preparing a layer of ultrathin tunneling silicon oxide with the thickness of 1nm-3nm on the front surface and the back surface of the silicon substrate or only on the front surface, and depositing a layer of phosphorus-doped amorphous silicon layer with the thickness of 5nm-10nm on the front surface and the back surface of the silicon substrate or only on the front surface by adopting LPCVD equipment. And finishing the annealing crystallization process under the condition that the temperature is not lower than 830 ℃. And carrying out single-side HF cleaning on the back side of the silicon wafer, and removing the phosphorosilicate glass layer on the back side. And then polishing the back surface to remove the diffusion layer on the back surface and form a polished surface. Then preparing a silicon oxide passivation film and a silicon nitride passivation film on the front side in sequence, and preparing an aluminum oxide passivation film and a silicon nitride passivation film on the back side in sequence. An oxide layer is superposed on the front surface, namely, damage repair can be carried out on laser PSG heavy doping through 600-850 ℃ oxidation, so that the open voltage and the current are improved. And finally, opening the aluminum oxide and silicon nitride passivation layer on the back surface by laser ablation, and performing conventional screen printing and sintering, namely front silver paste and back aluminum paste to form electrical contact.

The specific embodiments described herein are merely illustrative of the spirit of the invention. Various modifications, additions and substitutions for the specific embodiments described herein will be apparent to those skilled in the art without departing from the spirit of the invention.

Claims

1. The utility model provides a P type crystalline silicon solar cell with tunneling passivation, includes P type substrate (1), its characterized in that, P type substrate (1) openly from inside to outside be equipped with selectivity emitter (2), ultra-thin tunneling silicon oxide layer (3), phosphorus doping polycrystalline silicon layer (4), front silicon oxide passivation layer (5) and front silicon nitride passivation layer (6) in proper order, P type substrate (1) back from inside to outside back aluminium oxide passivation layer (7) and back silicon nitride layer (8) in proper order, be equipped with front metal silver grid line (9) on front silicon nitride passivation layer (6), P type substrate (1) back is equipped with back metal aluminium grid line (10), back metal aluminium grid line (10) run through back aluminium oxide passivation layer (7) and back silicon nitride layer (8).

2. The P-type crystalline silicon solar cell with tunneling passivation according to claim 1, characterized in that the ultra-thin tunneling silicon oxide layer (3) has a thickness of 0.5nm-5nm, the sum of the thicknesses of the phosphorus-doped polysilicon layer (4), the front silicon oxide passivation layer (5) and the front silicon nitride passivation layer (6) is 30nm-300nm, and the sum of the thicknesses of the back aluminum oxide passivation layer (7) and the back silicon nitride passivation layer (8) is 10nm-300 nm.