CN213583786U - Multi-chip crystal group packaging structure - Google Patents

Abstract

The utility model provides a multi-wafer crystal group packaging structure, which comprises a substrate; a plurality of support sets disposed on the substrate; a wafer disposed on each of the holder sets; and a housing disposed on the substrate for encapsulating the plurality of bracket sets and the wafer. Through using the utility model discloses a polycrystal piece crystal group packaging structure can reduce the size of wave filter greatly to effectively realized the further miniaturization of wave filter under the prerequisite of guaranteeing wave filter function and performance.

Description

Multi-chip crystal group packaging structure

Technical Field

The utility model relates to the field of semiconductor technology, in particular to multi-wafer crystal group packaging structure.

Background

In recent years, with the continuous development of the semiconductor industry, the sizes of various electronic products are more and more miniaturized, and thus the requirements for the sizes of various semiconductor products are more and more increased. Taking a crystal filter as an example, the conventional crystal filter includes a discrete crystal filter and an integrated crystal filter. Among them, the integrated crystal filter is popular in the related products of miniaturization of the filter in recent years because of its small volume, high reliability and low cost. But because the relative bandwidth is only 0.01% to 0.3%, a discrete crystal filter is still needed when the passband is required. The relative bandwidth achievable by discrete crystal filters is 0.01% to 10%. But is not suitable for use in current miniaturized products due to its large volume (about 25mm to 40mm in length, about 15mm to 20mm in width, and about 7mm to 12mm in height) and high cost. Therefore, there is a need for a filter that is suitable for use in a wide passband and that is small in size to further reduce the size of the filter.

Disclosure of Invention

An object of the utility model is to provide a polycrystal piece crystal group packaging structure for the size of wave filter reduces greatly.

In order to achieve the above purpose, the technical scheme of the utility model is that:

a multi-chip chipset package structure, comprising:

a substrate;

a plurality of support groups disposed on the substrate;

a wafer disposed on each of the holder sets; and

and a housing disposed on the substrate for encapsulating the plurality of bracket sets and the wafer.

Preferably, the substrate comprises a printed circuit board, which at least comprises from bottom to top:

a pad lead-out layer;

the shielding layer is arranged on the bonding pad lead-out layer;

an electrical connection layer disposed on the shielding layer; and

an element welding layer arranged on the electric connection layer;

the pad leading-out layer, the shielding layer, the electric connection layer and the element welding layer are electrically connected with each other through an internal circuit of the substrate.

Preferably, each bracket set comprises a first bracket and a second bracket, each of which comprises a base and a fixing device with an opening;

the bases of the first support and the second support are fixed on the substrate, the openings of the fixing devices of the first support and the second support are opposite, and the plane where the connecting line between the two openings is located is parallel to the substrate; and

the wafer is perpendicular to the substrate and has a gap with the substrate, and two ends of the wafer respectively extend into the openings of the fixing devices of the first support and the second support and are fixedly connected with the inner wall of the fixing device.

Preferably, the plurality of scaffold groups are arranged in a 2 × N array, N being an integer greater than or equal to 1.

Preferably, the securing means comprises a clevis.

Preferably, the wafer is electrically connected to both the first and second supports, and the plurality of support groups are electrically connected to each other through an internal circuit of the substrate.

The utility model discloses following beneficial effect has:

the utility model discloses a form crystal group packaging structure with a plurality of wafer encapsulation in a crystal group, through using this crystal group packaging structure, make the size of wave filter reduce greatly to effectively realized the further miniaturization of wave filter under the prerequisite of the function of guaranteeing the wave filter and performance.

Drawings

Fig. 1 is a schematic cross-sectional view of a multi-chip package structure according to the present invention;

fig. 2 is an exemplary application of a multi-chip chipset package structure in a filter according to the present invention.

In the figure: 1 a multi-chip package structure; 11 a substrate; 111 a pad extraction layer; 112 a shielding layer; 113 an electrical connection layer; 114 a component solder layer; 12 a bracket group; 121 a first support; 122 a second bracket; b, a base; f fixture (clevis); 13 a wafer; 14 a housing; 2 a filter based on a multi-chip crystal group packaging structure; 21 a resonance and matching module; 22 signal line leads.

Detailed Description

The following description will specifically explain embodiments of the present invention with reference to the accompanying drawings.

As shown in fig. 1, a multi-chip chipset package structure includes:

a substrate 11;

a plurality of holder groups 12 provided on the base plate 11;

a wafer 13 disposed on each holder set 12; and

a housing 14 disposed on the substrate 11 for enclosing the plurality of holder sets 12 and the wafer 13.

Preferably, the base plate 11 comprises a printed circuit board, which comprises at least, from bottom to top:

a pad lead-out layer 111;

a shielding layer 112 disposed on the pad lead-out layer;

an electrical connection layer 113 disposed on the shielding layer; and

and a component soldering layer 114 disposed on the electrical connection layer.

The pad drawing layer 111, the shield layer 112, the electrical connection layer 113, and the component soldering layer 114 are electrically connected to each other through an internal circuit of the substrate 11.

Preferably, each bracket set 12 comprises a first bracket 121 and a second bracket 122, and each of the first bracket 121 and the second bracket 122 comprises a base B and a U-shaped clip. The bases B of the first bracket 121 and the second bracket 122 are fixed on the substrate 11, the openings of the U-shaped clamps of the first bracket 121 and the second bracket 122 are opposite, and the connecting line between the two openings is parallel to the substrate 11. The wafer 13 is perpendicular to the substrate 11 with a gap between the wafer and the substrate 11, and two ends of the wafer 13 respectively extend into the openings of the U-shaped clips of the first support 121 and the second support 122 and are fixedly connected with the inner walls of the U-shaped clips.

As shown in fig. 2, in one embodiment of the present invention, N is 2, i.e. 4 stent groups 12 are arranged in a 2 × 2 array.

Preferably, the wafer 13 is electrically connected to both the first support 121 and the second support 122, and the plurality of support groups are electrically connected to each other through the internal circuit of the substrate 11.

The utility model discloses a during the polycrystal crystal group packaging structure was applied to the wave filter, realized the miniaturization of wave filter. Fig. 2 shows an embodiment of the multi-chip chipset package structure of the present invention applied in a filter. As shown in fig. 2, the multi-chip set package 1 can be electrically connected to the resonant and matching module 21 on the substrate 11 through the signal line leads 22 disposed on the device bonding layer 114 to form a filter. Can see out through using the utility model discloses a many chip crystal group packaging structure has significantly reduced components and parts and external circuit's in the wave filter use to a great extent the size that has reduced the wave filter. For example, a filter using a multi-wafer crystal package having 2 x 2 bracket sets may be sized up to 15mm long by 12mm wide by 4mm high. In addition, the filter using the multi-chip crystal group packaging structure of the present invention can realize a relative bandwidth of 0.01% to 10%. Therefore, the filter using the multi-chip crystal group packaging structure is far smaller than the existing discrete crystal filter in size on the premise of realizing wide passband, thereby effectively realizing the further miniaturization of the filter.

Compare with current wave filter, use the utility model discloses a size of polycrystal piece crystal group packaging structure's wave filter can reduce greatly to effectively realized the further miniaturization of wave filter under the prerequisite of the function and the performance of guaranteeing the wave filter.

Claims (6)

1. A multi-chip chipset package structure, comprising:

a substrate (11);

a plurality of holder groups (12) provided on the base plate (11);

a wafer (13) disposed on each of the holder sets (12); and

a housing (14) disposed on the substrate (11) for encapsulating the plurality of standoff sets (12) and the die (13).

2. The multi-die chipset package structure according to claim 1, wherein the substrate (11) comprises a printed circuit board, the printed circuit board at least comprising from bottom to top:

a pad extraction layer (111);

a shielding layer (112) provided on the pad lead-out layer (111);

an electrical connection layer (113) disposed on the shielding layer (112); and

a component soldering layer (114) provided on the electrical connection layer (113);

wherein the pad lead-out layer (111), the shield layer (112), the electrical connection layer (113), and the component soldering layer (114) are electrically connected to each other through an internal circuit of the substrate (11).

3. The multi-die chipset package structure of claim 1, wherein each of the standoff sets (12) comprises a first standoff (121) and a second standoff (122), the first standoff (121) and the second standoff (122) each comprising a base (B) and a fixture (F) having an opening;

the bases (B) of the first support (121) and the second support (122) are fixed on the substrate (11), the openings of the fixing devices (F) of the first support (121) and the second support (122) are opposite, and the plane where the connecting line between the two openings is located is parallel to the substrate (11); and

the wafer (13) is perpendicular to the substrate (11) and has a gap with the substrate (11), and two ends of the wafer (13) respectively extend into openings of fixing devices (F) of the first support (121) and the second support (122) and are fixedly connected with the inner wall of the fixing devices (F).

4. The multi-die crystal group package structure of claim 1, wherein the plurality of standoff groups (12) are arranged in a 2 x N array, N being an integer greater than or equal to 1.

5. The MUSCS package according to claim 3, wherein the fixture (F) is a clevis.

6. The multi-die chipset package according to claim 3, wherein the die (13) is electrically connected to both the first shelf (121) and the second shelf (122), and the plurality of shelf sets (12) are electrically connected to each other through internal circuitry of the substrate (11).

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