CN213483740U - 具有电互连桥的封装体器件 - Google Patents
具有电互连桥的封装体器件 Download PDFInfo
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- CN213483740U CN213483740U CN202021838113.6U CN202021838113U CN213483740U CN 213483740 U CN213483740 U CN 213483740U CN 202021838113 U CN202021838113 U CN 202021838113U CN 213483740 U CN213483740 U CN 213483740U
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Abstract
本公开涉及一种具有电互连桥的封装体器件,该封装体包括延伸到封装体中的开口。开口填充有导电件以将封装体中的第一管芯电耦合到封装体中的第二管芯。填充开口的导电件在第一管芯与第二管芯之间形成电互连桥。封装体中的开口可以使用激光和非掺杂的模塑件、经掺杂的模塑件、或者经掺杂或非掺杂的模塑件的组合来形成。根据本公开的封装体器件占用电子器件内的较少空间,并减少电子器件内需要提供的电连接的数目。
Description
技术领域
本公开涉及一种用于在封装体内使多个管芯彼此耦合的电互连桥。
背景技术
通常,封装体中的半导体管芯使用外部耦合到封装体的印刷电路板(PCB)彼此电耦合。这些封装体可以包括一起工作以执行某些功能的多个半导体管芯。
随着对于在电子器件中提供更多数目的半导体管芯以执行日益增长的复杂功能同时保持小而薄的轮廓的需求的增加,减少封装体的数目面临着巨大的挑战。制造方正在努力减小电子器件的轮廓,并且保持执行期望功能的能力,例如感测功能、定向功能、光感测功能、相机功能、亮度功能、声音检测功能和温度监测功能。电子器件的示例包括膝上型计算机、显示器、电视、计算机、智能电话、平板电脑或任何其他电子器件。
一个重大挑战是使这些电子器件更小、更薄,同时增加电子器件可以执行的功能的数目。随着这些功能变得更加复杂或数目增加,执行这些功能的半导体管芯的数目也增加。
另一重大挑战是在电子器件的减少区域内提供半导体管芯或封装体。例如,随着电子器件以各种方式变得可弯曲且更易于铰接,半导体管芯或封装体可以被安装在电子器件内的区域显著减少。
实用新型内容
已知的解决方案在执行复杂功能的同时保持较小的轮廓面临巨大的挑战。因此,需要一种具有电互连桥的封装体至少部分地解决上述问题。
根据本公开的第一方面,提供了一种具有电互联桥的封装体器件。该封装体器件包括:衬底,包括第一部分和与第一部分间隔开的第二部分;第一管芯,被耦合到衬底的第一部分,第一管芯在第一侧面上具有第一接触并且在第二侧面上具有第二接触,第一侧面面向衬底,第二侧面背对衬底;第二管芯,被耦合到衬底的第二部分,第二管芯在第三侧面上具有第三接触并且在第四侧面上具有第四接触,第三侧面面向衬底,第四侧面背对衬底;模塑件,在第一管芯的第二侧面、第二管芯的第四侧面、和衬底上;开口,与第二接触垫焊盘和第四接触垫焊盘对准,开口延伸到模塑件中;以及第一导电件,位于开口内,第一导电件将第一管芯的第二接触垫焊盘耦合到第二管芯的第四接触垫焊盘。
在一个实施例中,模塑件为导电模塑件。
在一个实施例中,开口包括侧壁,侧壁被覆盖在第二导电件的薄层中。
在一个实施例中,第二导电件的薄层被耦合到第二接触垫焊盘和第四接触垫焊盘。
在一个实施例中,第二导电件的薄层位于第二接触与第四接触之间。
在一个实施例中,第一导电件是焊接件。
在一个实施例中,第一导电件是导电镀层。
在一个实施例中,衬底包括钝化层、重新分布层、第一接触垫焊盘、和第二接触垫焊盘。
在一个实施例中,封装体器件还包括:在第一管芯的第二侧面上的第一钝化层;在第二管芯的第四侧面上的第二钝化层;在第一钝化层上的第一导电层,第一导电层被耦合到第二接触;以及在第二钝化层上的第二导电层,第二导电层被耦合到第四接触。
根据本公开的第二方面,提供了一种具有电互联桥的封装体器件。该封装体器件包括:衬底,包括第一表面、背对第一表面的第二表面、以及在第一表面上的多个第一接触;第一封装体,被耦合到衬底的第二表面,第一封装体包括第一管芯、在第一管芯上的第一模塑件、以及第二接触;第二封装体,被耦合到衬底的第二表面并且与第一封装体间隔开,第二封装体包括第二管芯、在第二管芯上的第一模塑件、以及第三接触;开口,位于第一封装体与第二封装体之间,开口与第二接触和第三接触对准;第二模塑件,在第一模塑件上,第二模塑件位于第二接触与第三接触之间;以及导电件,位于开口内。
在一个实施例中,导电件是电互连桥。
在一个实施例中,导电件的薄层位于第二接触与第三接触之间。在一个实施例中,封装体器件还包括:在第一管芯上的第一钝化层;在第二管芯上的第二钝化层;在第一钝化层上的第一导电层,第一导电层被耦合到第二接触;以及在第二钝化层上的第二导电层,第二导电层被耦合到第三接触。
在一个实施例中,在开口内的导电件被耦合到第二接触和第三接触。
根据本公开的封装体器件的益处在于,可以使封装体更薄,也将允许电子器件更薄。
附图说明
在附图中,除非上下文另外指出,否则相同的附图标记标识相似的元素或动作。附图中元件的尺寸和相对部分不必按比例绘制。
图1A是具有填充有导电件的开口的封装体的实施例的俯视图;
图1B是沿着图1A中的线1B-1B截取的封装体的实施例的截面图;
图1C是沿着图1A中的线1B-1B截取的封装体的备选实施例的截面图;
图2是封装体的备选实施例的截面图;
图3是封装体的备选实施例的截面图;
图4A是半导体管芯的实施例的截面图;
图4B是半导体管芯的备选实施例的截面图;
图5是图1B的部分3的经放大的放大图;
图6是在制造过程的一部分期间的半导体管芯阵列的实施例的俯视图;
图7是从图6中的半导体管芯阵列中单割出的单割半导体管芯的实施例的俯视图;
图8A-8I示出了用于生产图8I的封装体的方法的步骤;以及
图9A-9L示出了用于生产图9L的封装体的方法的备选实施例的步骤。
具体实施方式
鉴于以上这些并非完整列表的重大挑战,希望提供一种封装体,该封装体能够执行更复杂的功能,同时占用电子器件内的较少空间,减少电子器件内需要提供的电连接的数目,增加电子器件可以执行的功能的数目,并且减少电子器件的轮廓,例如大小、厚度等。
本公开涉及封装体的各种实施例,该封装体包括将封装体中的第一管芯耦合到第二管芯的电互连桥。
根据具有电互连桥的封装体的一个实施例,封装体包括暴露第一管芯和第二管芯的接触的开口。暴露第一管芯和第二管芯的接触的开口填充有导电件。导电件位于开口内以将第一管芯的接触耦合到第二管芯的接触。开口和导电件在第一管芯的接触与第二管芯的接触之间形成电互连桥。开口衬里(line)有导电件的薄层,该导电件的薄层耦合到第一管芯的接触和第二管芯的接触。
当开口形成在封装体中时,可以形成导电件的薄层。开口可以在封装体的为导电模塑件的模塑件中形成。例如,开口可以使用激光在封装体中形成,使得模塑件中的所掺杂的导电件熔化并且涂覆开口的侧壁。
在该实施例中,填充开口的导电件是使用回流焊料技术、焊料滴落技术或某种其他焊料放置技术而定位在开口内的焊接件。然而,在其他备选实施例中,根据需要,填充开口的导电件可以是金、铜、合金、导电镀层、或者任何其他导电件或导电件的组合,以用于将第一管芯耦合到第二管芯。
在备选实施例中,封装体的开口是未被衬里的,这意味着在开口的侧壁上没有导电件的薄层。这种情况会在模塑件是非掺杂的模塑件时发生,这意味着模塑件不是导电模塑件。
在以下描述中,阐述了某些特定细节以便提供对本公开的各种实施例的透彻理解。然而,本领域技术人员将理解,可以在没有这些具体细节的情况下实践本公开。在其他情况下,未详细描述与电子组件和半导体制造技术相关联的公知结构,以避免不必要地使本公开的实施例的描述不清楚。
除非上下文另外要求,否则在整个说明书和随后的权利要求书中,词语“包括(comprise)”及其变体(诸如“包括(comprises)”和“包括(comprising)”)应当以开放的包容性的含义来解释,即“包括但不限于”。
诸如第一、第二和第三等序数的使用不一定暗示顺序的经排序的含义,而是仅可以区分动作或结构的多个实例。
在整个说明书中,对“一个实施例”或“实施例”的引用意味着结合该实施例描述的特定特征、结构或特性被包括在至少一个实施例中。因此,在整个说明书中各处出现的短语“在一个实施例中”或“在实施例中”不一定都是指相同的实施例。此外,在一个或多个实施例中,可以以任何合适的方式来组合特定特征、结构或特性。
如本说明书和所附权利要求书中使用的,单数形式“一个(a)”、“一个(an)”和“该(the)”包括复数个对象,除非内容另外明确指出。还应当注意,除非内容另外明确指出,否则术语“或”通常以包括“和/或”的含义来使用。
本公开涉及封装体的各种实施例,该封装体包括延伸到封装体中的开口,该开口暴露邻近半导体管芯的接触垫焊盘。经暴露的接触通过填充或部分填充开口的导电件被耦合在一起。封装体的这些实施例通过各种制造方法来形成。封装体的这些各种实施例的细节以及制造这些封装体的方法将在下面详细讨论。
图1A涉及封装体100的实施例的俯视图。封装体100包括模塑件142和开口102,开口102通过模塑件142延伸到封装体100中。开口102具有侧壁104,侧壁104被导电件的薄层106覆盖,导电件可以是铜、金、镍、合金、或者某种其他导电件或导电件的组合。开口102填充有导电件108,该导电件108可以是焊接件、铜、金、合金、镀层、或者某种其他导电件或导电件的组合。
图1B涉及沿着图1A中的封装体100的线1B-1B截取的截面图。尽管下面的讨论仅针对开口102之一,但是下面的讨论适用于如图1A所示的两个开口102。可以包括开口阵列以并入封装体的多于两个管芯的备选实施例。
封装体100包括通过开口102中的导电件108耦合在一起的第一管芯116和第二管芯128。侧壁104位于第一管芯与第二管芯之间。侧壁104衬有导电件106。导电件的薄层110在开口102的端112处。
封装体100具有与在第二表面113对面的第一表面111。第一表面111由模塑件142形成。开口102穿过第一表面111和模塑件142形成。第二表面113是耦合到第一管芯116的第一衬底114的表面。第一衬底114可以是具有多个电介质层和多个导电层的重新分布层。第一衬底114中的多个电连接118以简单的形式示出。第一衬底114中的多个电连接118耦合到第一管芯116的多个接触120。多个电连接118将多个接触120耦合到第一衬底114中的外部接触阵列115,以允许将封装体耦合到另一器件或印刷电路板。
多个接触120在第一管芯116的第一侧面122上,并且第一侧面122面向第一衬底114。第一管芯116包括在第一侧面122对面的第二侧面124。第二侧面124是成形的无源表面。至少一个接触123a从第二侧面124暴露。在其他配置中,其他接触123b可以从第一管芯116的第二侧面124暴露。第二侧面124背对第一衬底114。尽管在图1B中,第一管芯116和第二管芯128看起来相似或相同,但是第一管芯116和第二管芯128可以是执行不同功能的不同类型的管芯。不同类型的第一管芯116和第二管芯128可以通过相似的制造工艺或不同的制造工艺形成。在其他备选实施例中,第一管芯116和第二管芯128可以看起来彼此不同。在其他备选实施例中,第一管芯116和第二管芯128可以具有相似的功能,或者可以是相似的管芯。
接触123a的至少一部分与开口102对准。接触123a的表面127的一部分通过开口102被暴露,而接触123a的表面127的另一部分保持被模塑件142覆盖。
接触123a耦合到导电件的薄层106、110和填充开口102的导电件108。导电件的薄层106、110和填充开口102的导电件108耦合到第二管芯128的至少一个接触130a。至少一个接触130a从第二管芯128的第二侧面140暴露。第二侧面140是成形的无源表面。第二侧面140背对耦合到第二衬底136的有源的第一侧面134的第二衬底136。在其他配置中,其他接触130b可以从第二管芯128的第二侧面140被暴露。导电件的薄层106、110和填充开口102的导电件108形成电互连桥,该电互连桥将第一管芯116的接触123a耦合到第二管芯128的接触130a。填充开口102的导电件108在本实施例中被示出为焊接件。焊接件可以通过回流焊料技术、焊料滴落技术、或者某种其他类型的焊接件形成或放置技术来形成和定位。
开口102在第一方向上的尺寸129小于在第一方向上的尺寸131。尺寸131在接触123a的第一边缘133与第二管芯128的接触130a的第一边缘135之间。尺寸131包括接触123a、导电件层110和接触130a。
模塑件142的部分137位于第一衬底114与第二衬底136之间。在第一方向上的尺寸139小于开口102的尺寸129。模塑件的部分137的表面141与第一衬底114的表面和第二衬底136的表面共面。
在一些实施例中,导电层110的尺寸143与模塑件142的部分137的上部部分145相对应。上部部分145比部分137的下部部分宽。从第一管芯116的第一延伸部147邻接模塑件142的部分137。与第一延伸部147相比,第二管芯128的第二延伸部149邻接部分137的相对侧。第一延伸部147和第二延伸部149包括在暴露第一接触123a和第二接触130a之后仍然保留的硅或半导体衬底。第一接触123a和第二接触130a在横向于第一方向的第二方向上具有厚度。第一接触123a和第二接触130a的厚度不必相同。第一管芯116和第二管芯128的所有接触123a、123b、130a、130b的厚度不必相同。导电层110的厚度小于第一接触123a和第二接触130a的厚度,使得模塑件142的部分137的上部部分145邻近导电层110。第一延伸部147和第二延伸部149两者的内表面与和模塑件142的部分137接触的第一衬底114和第二衬底136的内表面共面。
第二管芯128是与第一管芯116不同的管芯,其在不同的工艺中被制成为具有不同的功能。如下面将更详细描述的,第一管芯和第二管芯可能由不同的晶片形成。第二管芯128在第二管芯128的有源的第一侧面134上包括多个接触132。多个接触132被耦合到衬底136的多个电连接138,诸如包括在多个电连接138中的电连接周围和之间的多个绝缘层的重新分布层。第二管芯128包括接触130a,接触130a比第二侧面140更靠近第一侧面134,但是从第二管芯128的第二侧面140暴露。开口102与接触130a对准并且与接触130a重叠。
模塑件142在第一管芯116、第二管芯128和衬底114、136上。在该实施例中,模塑件142为导电模塑件。当开口102在封装体100的模塑件142中形成时,形成导电件的薄层106、110,这将在下面更详细地讨论。然而,在其他备选实施例中,模塑件142可以是非掺杂模塑件。模塑件142可以是塑料材料、非塑料材料、环氧树脂材料、绝缘材料、非导电材料、非掺杂材料、掺杂材料、或者可以用于封装体管芯以形成封装体的任何其他材料。
开口102延伸到模塑件142中。开口102具有暴露接触123a、130a的表面的端112。尽管示出了开口102具有与接触123a、130a齐平的端112,但是在备选实施例中,开口102可以延伸到接触123a、130a中,并且开口102可以延伸到封装体100中达任何期望距离。
封装体的备选实施例在图1C中示出。封装体的备选实施例包括与以上关于图1A和1B中的封装体100的实施例所讨论的相似的特征,并且为了简单和简洁起见,附图标记可以重复。
图1C涉及包括与图1B相同的结构的封装体200的备选实施例。封装体200与图1B中的封装体100之间的主要区别在于:不同的导电件108填充封装体200的开口102。具体地,导电件108是导电镀层,诸如铜、金、镍、合金、或者某种其他导电件或导电件的组合。导电镀层可以通过化学镀技术、电镀技术、化学沉积技术、或者某种其他沉积或镀覆技术来形成,以在开口102中形成和定位导电件108。导电件108将第一管芯116的接触123a耦合到第二管芯128的接触130a。
图2涉及包括第一管芯316和第二管芯328的封装体300的备选实施例。尽管图2是封装体300的备选实施例,图2是沿着与图1A的封装体100实施例所示的1B-1B相似的线截取的封装体300的截面图。此外,封装体300具有与前面讨论的图1A-1C中的封装体100、200相似的结构。
第一管芯316是与第二管芯328以不同的制造工艺形成的不同类型的管芯。第一管芯316和第二管芯328在衬底356上。
衬底356将第一管芯316的有源表面322上的多个接触垫焊盘320耦合到衬底356中的多个面向外部的接触垫焊盘311。衬底356包括将接触垫焊盘320重新分布到面向外部的接触垫焊盘311的多个绝缘层和多个电连接或迹线318,面向外部的接触垫焊盘311可以是用于耦合到另一器件或印刷电路板的凸块下金属化或其他电接触。第一管芯316的有源表面322在衬底356的表面353上。衬底356的表面353背对封装体300的暴露侧面354。面向外部的接触垫焊盘311在封装体300的暴露侧面354上。
衬底356还将第二管芯328的有源表面334上的多个接触垫焊盘332耦合到衬底356中的多个面向外部的接触垫焊盘317。衬底356包括将接触垫焊盘332重新分布到面向外部的接触垫焊盘317的多个绝缘层和多个电连接或迹线338,面向外部的接触垫焊盘317可以是用于耦合到另一器件或印刷电路板的凸块下金属化或其他电接触。第二管芯328的有源表面334在衬底356的背对封装体300的暴露侧面354的表面353上。
多个面向外部的接触垫焊盘311、317、多个接触垫焊盘320、332、以及多个电连接或迹线318、338允许第一管芯316和第二管芯328接收驱动信号、从外部电子器件接收数据、向外部电子器件提供数据、或者接收或提供使第一管芯316和第二管芯328发挥期望功能所需要的任何其他信号。例如,第一管芯316可以是处理器,并且第二管芯328可以是传感器,该传感器收集和传输关于压力、力、光、触摸灵敏度或任何其他期望量的数据。可以根据需要将数据和信号提供给外部电子器件,诸如显示器、电子控制器、计算机或任何其他电子器件。其他这样的信号可以是用于打开和关闭第一管芯316和第二管芯328或在低功率模式与高功率模式之间切换的驱动信号。
焊球350耦合到衬底356的暴露侧面354上的凸块下金属化(UBM)或面向外部的接触垫焊盘311、317。然而,如图1B和图1C中的封装体的其他备选实施例所示,可以使衬底的面向外部的接触垫焊盘311暴露,并且没有将焊球耦合到面向外部的接触垫焊盘311。第一管芯316和第二管芯328都耦合到衬底356,衬底356是单一衬底。多个电连接318形成在衬底中并且耦合到第一管芯316的多个接触320。多个电连接318将多个接触320耦合到允许将封装体耦合到另一器件或印刷电路板的多个面向外部的接触垫焊盘311。
第一管芯316包括表面324,该表面324是基本上无源的表面。第一管芯316的表面324背对第一管芯316的有源表面322并且在其对面。第二管芯328包括表面340,该表面340是基本上无源的表面。第二管芯328的表面340背对第二管芯328的有源表面334并且在其对面。第一管芯从衬底的表面353到无源表面的尺寸大于第二管芯从表面353到第二管芯的无源表面的尺寸。
钝化层344在第一管芯316的表面324上,并且钝化层346在第二管芯328的表面340上。在管芯的无源侧面被成形为暴露接触323a以及330a和330b之后形成钝化层344和346。成形工艺提供暴露接触的第一部分、远离第一部分延伸到表面324、340的成角度的侧壁部分。导电层348、351在钝化层144、146上。这些导电层348和351在第一端处电耦合到相应的接触323a、330a和330b。这些导电层的第二端在表面324、340上。导电层覆盖每个管芯的半导体衬底的成角度的侧壁部分。
延伸到封装体300中的开口302的侧壁304是成角度的,这不同于先前讨论的封装体实施例中的开口102,在先前讨论的封装体实施例中的开口102中,开口102的侧壁104是竖直的或另外垂直于衬底。注意,在本公开中描述的所有侧壁都横向于衬底表面。
封装体300包括为非掺杂的模塑件的第一模塑件342和为经掺杂的模塑件的第二模塑件358。经掺杂的模塑件358在非掺杂的模塑件142上,并且经掺杂的模塑件358的一部分位于第一管芯316和第二管芯328的接触323a、330a之间。
封装体300包括在衬底356的暴露侧面354对面且与之背对的第一表面301。第一表面301由经掺杂的模塑件358形成。开口302穿过第一表面301形成。开口302延伸穿过经掺杂的模塑件358和非掺杂的模塑件342。非掺杂的模塑件342位于管芯316、328与经掺杂的模塑件358之间。非掺杂的模塑件342覆盖钝化层344、346和导电层348、351。
第一管芯316和第二管芯328通过开口302中的导电件308耦合在一起。侧壁304位于第一管芯316与第二管芯328之间。导电件308接触导电层348、351的表面361、363和接触323a、330a的表面357、359。导电件308将导电层348、351和接触323a、330a彼此耦合。开口302与第一管芯316和第二管芯328的接触323a、330a对准。开口302暴露第一管芯的接触323a的表面357,并且开口302暴露第二管芯328的接触330a的表面359。第一管芯还包括接触323b,该接触323b被定位成比接触323a更靠近封装体300的外表面394。第二管芯还包括接触330b,该接触330b被定位成比接触323b更靠近封装体300的外表面394。开口302暴露导电层348的表面361,其在钝化层344上并且与开口302邻近并且在钝化层344上。开口302暴露导电层351的表面363,其在钝化层346上并且与开口302邻近。接触323a、330a的表面357、359、361、363以及导电层348、351耦合到部分填充开口302的导电件308。
封装体300包括在经掺杂的模塑件358上的导电件的薄层306。导电件的薄层306包括与开口302的侧壁104对准并且共面的第一表面365。导电件的薄层306延伸到经掺杂的模塑件358中并且在非掺杂的模塑件342上。导电件的薄层306包括第二表面367,该第二表面背对第一表面365并且被覆盖在经掺杂的模塑件358中。
导电件308在第一方向上的第一尺寸329小于开口302在第一方向上的第二尺寸331。导电件308的第一尺寸329是导电件308的最宽部分的直径。开口302的第二尺寸331是开口302的最宽部分的直径。第三尺寸333是导电件的薄层306的最宽部分的直径。换言之,第三尺寸333是向外延伸到导电件的薄层306的第二表面367的直径。第一尺寸329小于第二尺寸331和第三尺寸333。第二尺寸331小于第三尺寸333。第四尺寸335是在第二管芯328的表面340的一部分上延伸的距离。
来自第一管芯316的第一延伸部347邻接位于接触323a、330a之间的非掺杂的模塑件342的第一部分390。第二管芯328的第二延伸部349邻接在第一部分390对面的第二部分392。第一延伸部347和第二延伸部349包括在暴露第一管芯316的接触323a和第二管芯328的接触330a之后仍然保留的硅或半导体衬底。第一延伸部347被第一模塑件342的第一部分390覆盖,并且第二延伸部349被第一模塑件342的第二部分392覆盖。导电件的薄层310从第一模塑件342的第一部分390延伸到第二部分392。第二模塑件358的一部分位于第一模塑件342的第一部分390与第二部分392之间并且在开口312的端312处。端312位于第一管芯316的接触323a与第二管芯328的接触330a之间。
第一半导体管芯316具有与封装体300的外表面394齐平或共面的表面,并且钝化层344具有与封装体300的外表面394齐平或共面的表面。在该实施例中,第一管芯316没有去除材料以暴露接触323b。然而,在其他备选实施例中,在将第一管芯放置在封装体300内之前,可以去除第一管芯的材料以暴露接触323b。
图3涉及封装体400的备选实施例。封装体400类似于图1B和1C所示的封装体100、200。然而,在封装体400的该备选实施例中,模塑件142是非掺杂的模塑件,这与图1B和1C中的经掺杂的模塑件142不同。结果,开口是未衬里的,并且填充开口的导电件108将第一管芯116的接触123a电耦合到第二管芯128的接触130a,并且导电件108是电互连桥。
图4A涉及被耦合到衬底114、136的半导体管芯116、128的实施例。半导体管芯116、128包括与以上关于图1B、1C和3讨论的第一管芯116或第二管芯128相同的特征。尽管半导体管芯116、128可以看起来彼此相同,但是它们可以是执行不同功能并且具有不同横截面积的不同管芯。衬底114、136包括与如上所述的衬底114、136、356相同的特征。例如,在一个实施例中,管芯的半导体衬底包括形成在半导体衬底或晶片表面上的重新钝化层。重新钝化层被图案化和蚀刻。通过在重新钝化层之上进行沉积来形成或通过在其上进行镀覆来生长重新分布层。在重新分布层上形成另一重新钝化层。在对该层进行图案化和蚀刻之后,在重新钝化层上形成凸块下金属化层。可以将包括衬底114、136的该半导体管芯116、128并入如所公开的或在本公开的范围内的封装体的多个各种备选实施例中。
图4B涉及在半导体管芯116、128上具有模塑件142的半导体管芯116、128的备选实施例。模塑件可以是未掺杂的模塑件或经掺杂的模塑件。半导体管芯116、128包括与以上关于图3讨论的第一管芯116和第二管芯128相同的特征。钝化层144、146位于半导体管芯116、128上,并且多个导电层148位于钝化层144、146上并且被耦合到半导体管芯116、128的接触123、130。半导体管芯116、128可以并入如所公开的或在本公开的范围内的封装体的几个各种备选实施例中。
图5是图1B的部分3内的管芯的一部分和衬底114的若干层的经放大的放大图。管芯128在第一侧面134上包括多个接触垫焊盘120。钝化层182在管芯128上。所描绘的衬底114的实施例至少包括第一电介质层184、第一导电层186、第二电介质层188和第二导电层190。第一电介质层184可以是钝化层或重新钝化层,位于第一导电层186与钝化层182之间。第一导电层186位于第二电介质层188(其可以是钝化层或重新钝化层)与第一电介质层184之间。第一导电层186耦合到管芯128的接触120和延伸穿过第二电介质层188的第二导电层190。第二导电层190可以是接触垫焊盘、UBM、外部接触、暴露接触、安装接触、或者某种其他接触或电连接。第二导电层190形成图3中讨论的UBM 311、317。第一电介质层184、第一导电层186和第二电介质层188形成衬底114的重新分布层(RDL)。另一可选层194可以放置在第二电介质层188上,根据需要,可选层194可以是模塑件、钝化层、聚合物层或任何其他材料层。尽管上面直接关于图1B中的衬底114进行了讨论,但是在本公开的封装体的各种备选实施例中的衬底136、356也可以包括这些特征或类似特征。
图6涉及在将半导体管芯500单割成单独的管芯之前晶片上的半导体管芯500的阵列的一部分的俯视图。半导体管芯500包括与以上关于其他管芯和半导体管芯所讨论的相同或相似的特征。半导体管芯500包括开口195。开口195与接触垫焊盘197对准并且部分地暴露接触垫焊盘197。这些开口也可以在单割之后形成。虚线表示为将半导体管芯500的阵列分割为单独的半导体管芯500而进行的切割。
图7涉及在将半导体管芯500单割之后的半导体管芯500的俯视图。半导体管芯500包括开口195。开口195与半导体管芯500的接触垫焊盘197对准。开口195朝向半导体管芯500的侧表面延伸。
图8A-8I涉及生产如所讨论的并且在本公开的范围内的封装体的实施例的步骤。
图8A的实施例涉及将被处理并且单割成单独的半导体管芯的晶片620。每个管芯将包括在第一侧面624上形成的多个第一接触622和在管芯内的多个第二接触626。晶片620是其上形成有多个层的半导体衬底。多个层可以是多个电介质层、导电层或这些层的组合。导电层包括穿过电介质层以形成电连接的通孔。多个第一接触622和多个第二接触626可以位于多个层内或之上。在一个实施例中,多个第一接触622在耦合到晶片的半导体衬底的第一电介质层中的半导体衬底上,并且多个电介质层堆叠在第一电介质层上。多个第二接触在电介质层之一中,该电介质层具有用于耦合到PCB或外部电子器件或组件的暴露表面。在该实施例中,多个第一接触622通过多个导电通孔和多个导电层耦合到多个第二接触624。另外,第一侧面624是晶片620的有源侧面,该侧面耦合到形成在晶片620的半导体衬底中的各种电路元件,诸如晶体管、电阻器、电容器和其他电子组件。晶片具有第二侧面630,该第二侧面630是管芯的无源侧面。
图8B涉及关于将衬底628耦合到晶片620的步骤602。多个第一接触622耦合到衬底628中的多个电连接625。衬底628包括与在图5中讨论的相同或相似的特征。衬底628形成有多层导电和电介质材料,该材料被沉积、蚀刻并且耦合在一起以形成多个电连接625。例如,第一钝化层182形成在晶片620的第一侧面624上。在第一钝化层182中形成第一开口,并且第一开口中的每个相应第一开口与多个接触622中的相应接触对准。然后,在第一钝化层182和多个接触622上形成第一电介质层184。第一电介质层184填充第一开口。然后通过去除部分电介质层来形成第二开口。每个第二开口与多个接触622中的相应接触对准。在第一电介质层和多个接触622上形成第一导电层186,该第一导电层186可以是金属,诸如铜、金、锡或另一种金属或导电件。第一导电层186耦合到多个接触622。第一导电层186和第一电介质层184被平坦化。在平坦化的第一导电层和平坦化的第一电介质层184上形成第二电介质层188。在第二电介质层188中形成至少与第一导电层186重叠的第三开口,使得第二导电层190耦合到在第三开口中的第一导电层。可以形成附加的电介质和导电层194,直到重新分布完成并且形成外部接触垫焊盘。外部接触垫焊盘可以是凸块下金属化、或者某种其他类型的外部电接触或连接。外部接触垫焊盘是多个电连接的一部分。
第一开口、第二开口和第四开口可以使用蚀刻技术、研磨技术或某种其他去除技术来形成。蚀刻技术可以是光致抗蚀剂蚀刻、化学蚀刻或某种其他类型的蚀刻技术。
图8C涉及关于蚀刻晶片620的步骤604。从背对衬底628的无源侧面630蚀刻晶片620。在晶片620中的相邻管芯之间形成开口629,并且开口629暴露接触626。形成开口629的对无源侧面630的蚀刻暴露晶片620的多个第二接触626。该蚀刻步骤可以通过利用化学蚀刻、机械蚀刻、光致抗蚀剂蚀刻或任何其他蚀刻技术从晶片620去除材料以暴露晶片620内的多个第二接触626来完成。这些第二接触626耦合到形成在衬底中的有源和无源电路系统,诸如可以在传感器和与传感器相关联的处理器或ASIC之间传输数据的接触垫焊盘。这些内部接触使得所得到的管芯的总体占用面积(footprint)较小,这是因为,与另一管芯的连接不需要与接触622在表面上,而是内部地耦合在所得到的封装体内。
图8D涉及关于研磨晶片620的步骤606。该研磨步骤606是可选的步骤,其在蚀刻晶片之前完成。在该研磨步骤606中,晶片在无源侧面630上被向下研磨以减小晶片620的厚度。然后,在研磨步骤606之后完成如在步骤604中讨论的蚀刻步骤。在蚀刻步骤604之前的这种厚度的减小来减少具有电互连桥的完成的封装体的厚度。由于电互连桥被提供在管芯632的无源侧面630上而不是在管芯的有源侧面上形成管芯632之间的连接,因此将减小厚度。通过在无源侧面630上在两个管芯632之间形成电互连桥,封装体636将仅必须容纳两个管芯632的厚度,因为电互连桥的厚度小于两个管芯632的厚度,或者小于一个管芯632和模塑件638的组合厚度的厚度。
图8E涉及关于将晶片620单割成单独的半导体管芯632的步骤608。在该单割步骤608中,使用切割装置634对半导体管芯632进行单割。切割装置634可以是锯、激光、刀片或其他切割装置。半导体管芯也可以使用另一蚀刻步骤来单割。该另一蚀刻步骤可以是化学蚀刻、光致抗蚀剂蚀刻、或者某种其他类型的蚀刻技术。相应接触626在晶片620的无源侧面630上暴露。切口可以留下晶片的延伸部,该延伸部超过接触626的边缘,如图8E所示。在其他备选实施例中,可以使切口与接触626的边缘齐平,使得不存在延伸超过接触626的边缘的延伸部。
图8F涉及关于形成包括模塑件638和两个半导体管芯632的封装体636的步骤610。在该形成步骤610中,形成模塑件638以将两个半导体管芯632纳入在封装体636中。第一管芯和第二管芯可以由相同的晶片形成,但是更可能由两种不同的工艺形成,并且被一起耦合在单个封装体中,使得两个管芯一起工作以解决技术问题或根据需要执行更复杂的功能。模塑件638可以是经掺杂的模塑件或非掺杂的模塑件。如果模塑件638被掺杂,则模塑件638为导电模塑件,诸如铜、金、镍、合金、或者另一导电件或导电件的组合。
图8G涉及关于对封装体636进行激光钻孔的步骤612。在该激光钻孔步骤612中,将激光引导到封装体636以从封装体636中去除材料以形成开口640。激光钻孔融化、燃烧或去除先前通过蚀刻步骤604在晶片620的无源侧面630上暴露的接触626之间的模塑件638。激光钻孔形成开口640。激光钻孔形成定位在两个管芯632之间并且其表面与通过激光钻孔暴露的接触626的表面共面的模塑件638的一部分。在该实施例中,模塑件是非掺杂的模塑件。当从封装体636中去除模塑件638时,形成开口640的侧壁642,该侧壁642与管芯的无源侧面630上的接触626对准,该侧壁与接触626的表面对准。模塑件638仍然覆盖接触626的表面的一部分。
然而,当模塑件为导电模塑件时,将在开口640的侧壁642上形成导电件的薄层,这可以在图1A和1B中看到,如上所述。形成在侧壁642上的导电件的薄层将通过激光钻孔而暴露的接触626彼此耦合。当镀层用于将两个管芯632耦合在一起时,还允许将镀层放置在开口内以耦合暴露在管芯632的无源侧面630上的接触626。当模塑件638为导电模塑件时在侧壁642上形成的导电件层被称为激光直接结构化。导电件层还形成在与两个管芯632之间的一部分模塑件的接触的表面共面的表面上。
在该实施例中,侧壁642被示出为竖直的,但是,在其他备选实施例中,侧壁可以具有如上面的图3中公开和讨论的成角度的表面。
在其他备选实施例中,形成开口640的激光钻孔可以部分地钻入经暴露的接触626中。这导致经暴露的两个管芯632的接触626具有第一部分和第二部分,该第一部分的第一高度与开口640对准,并且第二部分的第二高度被覆盖在模塑件638中。暴露在两个管芯632的无源侧面630上的接触626是L形的。
图8H涉及关于在开口640中形成导电件644以将两个半导体管芯632的第二接触626彼此耦合的步骤614。在该实施例中,导电件644是焊料。这将半导体管芯632彼此耦合,并且导电件644在两个半导体管芯632之间形成电互连桥。在该实施例中,导电件644是焊接件。焊接件644使用焊料回流技术、焊料球下落技术或用于放置焊接件的某种其他技术被定位在开口640内。然而,在其他备选实施例中,导电件可以是金、铜、镍、合金、或者某种其他导电件或导电件的组合。用于放置这些备选导电件的技术可以是化学沉积技术、化学镀技术、或者某种其他镀层技术或导电件放置技术。
放置在开口640中的焊接件644形成将两个管芯632耦合在一起的电互连桥。焊接件覆盖与开口640对准的接触626的经暴露表面。焊接件644还覆盖作为定位在两个管芯632之间的模制部分的一部分的与两个管芯632的经暴露的接触626共面的表面。再次,通过利用焊接件644填充开口640并且耦合经暴露的接触626,封装体的高度不受影响,因为焊接件644的高度确实小于模塑件的高度,同时仍然在两个管芯632之间形成电互连桥。
备选地,当模塑件638为导电模塑件时,侧壁和与位于两个管芯632之间的模塑件的一部分的暴露的接触626共面的表面被导电件覆盖。该导电件层允许在两个管芯632的暴露的接触626之间形成更坚固的电互连桥。而且,当使用镀层代替导电件时,镀层在两个管芯632的暴露的接触626之间形成更坚固的电互连桥,因为大量的镀层将粘附到导电层和开口640中的暴露的接触。当使用导电镀层时,导电镀层可以通过化学镀、化学沉积或某种其他导电电镀技术来放置。
图8I涉及关于在封装体636上形成多个焊球646的步骤616。将焊球连接到衬底628的多个电连接625。在将多个焊球646耦合到封装体636之后,封装体636完成。在另一备选实施例中,焊球646可以在装运之前不耦合到封装体636,并且完整的半导体封装体715可以不包括焊球646。
图9A-9L涉及形成本公开中描述的封装体的各种实施例的备选方法800。
图9A涉及包括外部接触622和内部接触626的晶片。内部接触626由开口629暴露。晶片还包括有源侧面624和无源侧面630,有源侧面624在有源侧面624上具有外部接触622,无源侧面630在有源侧面对面。
图9B涉及晶片620的蚀刻步骤802。在该蚀刻步骤802中,在晶片620的第二侧面630上在接触626之间形成开口629。第二侧面630是无源侧面630。开口629暴露接触626。接触626的第一部分延伸到晶片620中,并且接触的第二部分被开口629暴露。在该蚀刻步骤之前,研磨步骤可以向下进行到晶片620的无源侧面以减小晶片620的高度。进而,晶片620的高度的减小将导致单独的单割管芯具有较小的高度,并且还将导致完成的封装体也具有较小的高度。
步骤804涉及在已经被蚀刻的晶片620上形成钝化层822。晶片620在蚀刻步骤802中被蚀刻。钝化层822的形成在图9C和9D中示出。在图9C的第一步骤中,钝化层被沉积到蚀刻的晶片620上。钝化层822覆盖被蚀刻的晶片620的无源侧面630、经暴露的接触626,并且填充接触626之间的开口629中的空间。钝化层822可以使用无电沉积技术、电镀沉积技术、化学沉积技术、光致抗蚀剂沉积技术、喷涂上沉积技术或任何其他沉积技术来沉积。在图9D的第二步骤中,去除钝化层822的部分。钝化层822的被去除的部分是在接触626之间的开口629的空间中的部分和覆盖接触626的部分。但是,钝化层822仍然可以覆盖接触626的一部分表面。然而,在其他备选实施例中,可以从接触626的表面上完全去除钝化层822。钝化层822的部分可以利用蚀刻技术、激光去除技术、机械去除技术、光致抗蚀剂去除技术、切割技术或任何其他去除技术来去除。
步骤806涉及在被蚀刻的晶片620上形成导电层824。导电层824可以是金属层。如图9E所示,导电层824形成在钝化层822上。导电层824耦合到被蚀刻的晶片620的接触626。导电层824沉积在钝化层822上以及在接触626之间的空间中,类似于在步骤804中如何将钝化层沉积到晶片620的无源侧面630上。去除接触626之间的开口629中的导电层824的部分,并且从钝化层822去除导电层824的部分。通过去除导电层824的这些部分,导电层824耦合到并且覆盖接触626的经暴露表面的一部分。导电层824可以利用化学沉积技术、化学镀技术、光致抗蚀剂技术、或者某种其他沉积技术或沉积技术的组合来沉积。导电层824的部分可以通过激光蚀刻、化学蚀刻、光致抗蚀剂蚀刻、或者某种其他类型的蚀刻或蚀刻的组合来去除。
步骤808涉及在具有导电层824和钝化层822的被蚀刻的晶片620上形成第一模塑件826,如图9F所示。第一模塑件826是未掺杂的模塑件。在形成第一模塑件826的步骤中,放置模塑件以覆盖导电层824、覆盖钝化层822,并且用模塑件826填充开口629。
步骤810涉及单割步骤。类似于图8E中的步骤608,通过切割装置830将模塑件826、晶片620、钝化层822和钝化层822上的导电层824单割为单个管芯。切割装置830切割穿过与开口629对准的模塑件826和晶片620的部分。在这种情况下,管芯828的一部分延伸超过接触626的边缘,并且管芯828在单割之后与模塑件826的外表面共面。然而,在其他备选实施例中,接触626的边缘和管芯828可以与模塑件826的外表面齐平,并且管芯828的部分可以不延伸超过接触626的边缘。切割装置830可以是锯、激光或用于从晶片切割或单割出管芯的其他装置。这可以在图9G中看到。同样,如上所述,在将晶片620、钝化层822、导电层824和模塑件826单割成单独的半导体管芯的备选实施例中,可以使切口比图9G所示的更宽,使得导电层824和接触626在外边缘上被暴露并且与外边缘上的模塑件826齐平。
步骤812涉及形成第二模塑件832以物理地耦合两个半导体管芯828,如图9H所示。第二模塑件832是经掺杂的模塑件。经掺杂的模塑件832为导电模塑件,诸如铜、金、镍、合金、或者某种其他导电件或导电件的组合。尽管两个半导体管芯828在图9H中看起来是相同的,但是两个管芯828可以是通过相似的制造工艺形成的相似管芯,两个管芯828可以是通过不同的制造工艺形成的不同管芯,并且两个管芯可以具有不同的功能或结构。经掺杂的模塑件832将两个管芯828耦合在一起,如图9H所示。然而,在其他备选实施例中,经掺杂的模塑件832可以根据需要耦合任何数目的管芯828,以形成能够执行更加复杂的功能的封装体。经掺杂的模塑件可以通过压缩模制、传递模制或某种其他模制技术将两个管芯828耦合在一起以形成封装体831来形成。经掺杂的第二模塑件832耦合到第一模塑件826的外表面。当导电层824和接触626的表面与非掺杂的模塑件826的外表面齐平时,第二模塑件可以直接耦合到两个管芯828、导电层824和接触626。
步骤814涉及将衬底628耦合到两个半导体管芯828,这可以在图9I中看到。该过程类似于以上关于图8B的步骤602的讨论,其中衬底628耦合到晶片620。但是,在这种情况下,衬底628的各种层(其可以是电介质层、钝化层和导电层)耦合到通过经掺杂的模塑件832而被耦合在一起的两个管芯828。
步骤816涉及将多个焊球646耦合到衬底628,这可以在图9J中看到。焊球可以通过焊剂回流技术、焊球放置技术或某种其他焊球形成技术耦合到衬底。焊球耦合到衬底628中的电接触625的凸块下金属化。
步骤818涉及激光直接结构化封装体831。该激光直接结构化步骤818具有与上面的图1A和1B所示的封装体相似的结果。在该激光直接结构化步骤816中,当去除第二模塑件832以形成开口838时,导电件的薄层834、836被留下。导电件的薄层834位于开口838的第一端处,另一导电件的薄层836位于邻近两个半导体管芯828的开口838的第二端处。上面讨论的结构化步骤和激光钻孔步骤612之间的差别在于,取代在激光钻孔612时具有非掺杂的模塑件,模塑件832为导电模塑件。当使用激光来去除、熔化或烧掉该经掺杂的模塑件832时,形成导电件的薄层,该导电件的薄层对在封装体831中形成的开口838进行衬里。类似于在图1A和1B中可以看到的结果。通过使用激光去除模塑件832,形成了将在完成的封装体831中的导电结构,因为当通过激光去除经掺杂的模塑件832时,导电件834、836被留下,但是经掺杂的模塑件832的不是掺杂剂的其余部分被燃烧或熔化。
激光去除第一模塑件826、第二模塑件832和导电层824的部分,并且导电层的表面与开口838的第二端齐平。激光形成位于两个管芯828之间的开口838,并且与第一模塑件837的一部分、第二模塑件832的一部分、以及在第二模塑件832的一部分上的另一薄导电件层836对准。在其他备选实施例中,激光可以切入第一模塑件826、第二模塑件832、导电层824和接触626。在这些其他备选实施例中,接触626的表面可以与开口838的第二端齐平。
步骤820涉及封装体831的化学镀。在图9L中可以看到化学镀步骤820。导电件840耦合到经暴露的导电层824和位于开口838的第二端处的导电件的薄层836。未掺杂的模塑件826的第一部分837位于(与填充开口838的导电件840对准的)经掺杂的模塑件与在管芯828之一上的导电层824之间。未掺杂的模塑件826的第二部分839位于与(填充开口838的导电件840对准的)经掺杂的模塑件与管芯828中的另一管芯828上的导电层824之间。换言之,导电件的薄层836和导电层824的经暴露表面被覆盖在导电件840中并且通过导电件840被耦合在一起。导电件840将封装体831中的两个管芯彼此耦合。
现在将讨论以上各种封装体的益处。为了简单和简洁起见,将关于图1B中的实施例讨论益处。但是,这些益处适用于在以上公开以及以上公开范围内的每个封装体实施例。
包括由填充封装体100中的开口102的导电件108形成的电互连桥的封装体100的益处在于,可以使封装体更薄,这也将允许电子器件更薄。之所以会产生这种益处,是因为通过以这种方式将电互连桥添加到封装体中不会改变封装体100的高度。例如,具有两个分离的管芯的两个分离的封装体将具有与封装体100相同的高度,但是,如果然后在电子器件内提供电连接以耦合两个分离的封装体,则电子器件的高度将增加。然而,利用封装体100,由于封装体100仍然具有与两个单独的封装体相同的高度,并且已经通过开口102中的导电件108被电耦合,因此减小了电子器件的高度,这消除了在电子器件内提供电连接以耦合两个单独的封装体的必要性。
封装体100的另一益处是,也减少了在电子器件中需要提供的电连接的数目,这将减小电子器件的尺寸和厚度。由于已经形成了封装体100内的半导体管芯116、128之间的电连接,因此减少了在电子器件中所提供的电连接的数目。该益处还将减少需要在电子器件内提供的封装体的数目。这意味着,如果由于电子器件可铰接(例如,可弯曲)而使电子器件内的封装体的安装区域较小,则可以在较小的安装区域内提供较少的封装体,但是仍然允许电子器件执行所有必要的操作或期望的功能。
封装体100的另一益处是衬里开口102的导电件的薄层106、110增加了封装体100内的两个半导体管芯116、128之间的电互连桥的坚固性。由于即使在将导电件108放置在开口102中之前,导电件的薄层106、110已经将封装体100内的两个半导体管芯116、128电耦合,所以增大了电互连桥的鲁棒性。然而,当在模塑件中为导电模塑件时开口102被衬里时,会产生这种益处。
这些是封装体100的一些益处,当利用封装体100或本公开中公开的或在本公开的范围内的其他备选实施例时,存在并且可能还有某些其他附加益处。
现在将讨论生产封装体的方法的益处。为了简单和简洁起见,将关于图8A-8I中的实施例来讨论益处。然而,这些益处适用于在以上公开以及以上公开的范围内的制造所公开的封装体实施例的每种方法。例如,益处也适用于图9A-9L中公开的备选方法。
图8A-8I中的方法的益处在于,可以将任何数目的半导体管芯并入具有多个电互连桥的封装体中,以在封装体内将半导体管芯彼此耦合。这使得能够生产出能够执行复杂功能的封装体,并且使得封装体内的半导体管芯能够快速且容易地彼此通信。
与上面关于封装体讨论的益处类似的另一益处是,封装体内并入的电互连桥减少了需要在电子器件中被单独提供的外部电连接的数目。外部电连接数目的减少减少了电子器件的轮廓,例如尺寸和厚度。
图8A-8I中的方法的另一益处在于,通过利用为导电模塑件的模塑件,当利用封装体的开口形成或放置导电件以形成电互连桥时,可以提高工艺的可靠性。因为当激光从封装体中去除材料以形成开口时,形成衬里开口的导电件的薄层,因此该过程的可靠性得以提高。这些导电件的薄层在导电件被放置在开口中之前将半导体管芯的接触彼此耦合。而且,当将导电件放置在开口内时,在封装体内的半导体管芯之间形成适当的电连接的可能性增加,这是因为,可以将导电件镀覆到这些导电件的薄层上,或者焊料可以更容易在半导体管芯之间形成电连接。
图8A-8I中的上述方法的另一益处在于,可以容易地重新布置步骤以提高形成具有电互连桥的封装体的可靠性。例如,在图8D中公开的研磨晶片步骤606可以是可选的,并且可以完全去除以节省成本。
图8A-8I中的方法的另一益处在于,可以形成半导体管芯并且将其并入具有任何数目的轮廓的任何数目的封装体中。例如,封装体可以具有正方形轮廓、矩形轮廓、圆形轮廓、椭圆形轮廓或任何数目的形状轮廓,因此封装体可以容易地安装在电子器件内。
这些是图8A-8I中的方法的一些益处,当利用图8A-8I中的方法或本公开中公开的或在本公开的范围内的其他备选实施例时,存在并且可能还有某些其他附加益处。
可以将上述各种实施例组合以提供其他实施例。本说明书中提及的和/或在申请数据表中列出的,包括但不限于,所有美国专利、美国专利申请出版物、美国专利申请、外国专利、外国专利申请和非专利出版物均通过引用以其整体并入本文。如果需要采用各种专利、申请和出版物的概念以提供其他实施例,则可以修改实施例的各方面。
可以根据以上详细描述对实施例进行这些和其他改变。通常,在以下权利要求书中,所使用的术语不应当解释为将权利要求书限制为说明书和权利要求书中公开的特定实施例,而应当解释为包括所有可能的实施例以及这样的权利要求有权享有的等同物的全部范围。因此,权利要求不受本公开的限制。
Claims (14)
1.一种具有电互连桥的封装体器件,其特征在于,所述封装体器件包括:
衬底,包括第一部分和与所述第一部分间隔开的第二部分;
第一管芯,被耦合到所述衬底的所述第一部分,所述第一管芯在第一侧面上具有第一接触并且在第二侧面上具有第二接触,所述第一侧面面向所述衬底,所述第二侧面背对所述衬底;
第二管芯,被耦合到所述衬底的所述第二部分,所述第二管芯在第三侧面上具有第三接触并且在第四侧面上具有第四接触,所述第三侧面面向所述衬底,所述第四侧面背对所述衬底;
模塑件,在所述第一管芯的所述第二侧面、所述第二管芯的所述第四侧面、和所述衬底上;
开口,与所述第二接触和所述第四接触对准,所述开口延伸到所述模塑件中;以及
第一导电件,位于所述开口内,所述第一导电件将所述第一管芯的所述第二接触耦合到所述第二管芯的所述第四接触。
2.根据权利要求1所述的封装体器件,其特征在于,所述模塑件为经掺杂的导电模塑件。
3.根据权利要求1所述的封装体器件,其特征在于,所述开口包括侧壁,所述侧壁被覆盖在第二导电件的薄层中。
4.根据权利要求3所述的封装体器件,其特征在于,所述第二导电件的所述薄层被耦合到所述第二接触和所述第四接触。
5.根据权利要求1所述的封装体器件,其特征在于,第二导电件的薄层位于所述第二接触与所述第四接触之间。
6.根据权利要求1所述的封装体器件,其特征在于,所述第一导电件是焊接件。
7.根据权利要求1所述的封装体器件,其特征在于,所述第一导电件是导电镀层。
8.根据权利要求1所述的封装体器件,其特征在于,所述衬底包括钝化层、重新分布层、第一接触垫焊盘、和第二接触垫焊盘。
9.根据权利要求1所述的封装体器件,其特征在于,还包括:
在所述第一管芯的所述第二侧面上的第一钝化层;
在所述第二管芯的所述第四侧面上的第二钝化层;
在所述第一钝化层上的第一导电层,所述第一导电层被耦合到所述第二接触;以及
在所述第二钝化层上的第二导电层,所述第二导电层被耦合到所述第四接触。
10.一种具有电互连桥的封装体器件,其特征在于,所述封装体器件包括:
衬底,包括第一表面、背对所述第一表面的第二表面、以及在所述第一表面上的多个第一接触;
第一封装体,被耦合到所述衬底的所述第二表面,所述第一封装体包括第一管芯、在所述第一管芯上的第一模塑件、以及第二接触;
第二封装体,被耦合到所述衬底的所述第二表面并且与所述第一封装体间隔开,所述第二封装体包括第二管芯、在所述第二管芯上的所述第一模塑件、以及第三接触;
开口,位于所述第一封装体与所述第二封装体之间,所述开口与所述第二接触和所述第三接触对准;
第二模塑件,在所述第一模塑件上,所述第二模塑件位于所述第二接触与所述第三接触之间;以及
导电件,位于所述开口内。
11.根据权利要求10所述的封装体器件,其特征在于,所述导电件是电互连桥。
12.根据权利要求10所述的封装体器件,其特征在于,导电件的薄层位于所述第二接触与所述第三接触之间。
13.根据权利要求10所述的封装体器件,其特征在于,还包括:
在所述第一管芯上的第一钝化层;
在所述第二管芯上的第二钝化层;
在所述第一钝化层上的第一导电层,所述第一导电层被耦合到所述第二接触;以及
在所述第二钝化层上的第二导电层,所述第二导电层被耦合到所述第三接触。
14.根据权利要求10所述的封装体器件,其特征在于,在所述开口内的所述导电件被耦合到所述第二接触和所述第三接触。
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