CN212750866U

CN212750866U - Chip structure

Info

Publication number: CN212750866U
Application number: CN202022196297.7U
Authority: CN
Inventors: 汪星海
Original assignee: Shanghai Simcom Wireless Solutions Co Ltd
Current assignee: Shanghai Simcom Wireless Solutions Co Ltd
Priority date: 2020-09-29
Filing date: 2020-09-29
Publication date: 2021-03-19
Anticipated expiration: 2030-09-29

Abstract

The utility model provides a chip structure, which comprises a chip bottom plane, a plurality of solder balls arranged on the chip bottom plane and a plurality of bosses arranged on the chip bottom plane; the height of the boss is smaller than that of the solder ball; the boss is used for supporting the bottom plane of the chip. The utility model discloses an evenly set up a plurality of bosss on chip bottom plane, cross the in-process of stove at the chip, because the boss can support chip bottom plane, avoided the tin ball on the plane of chip bottom to excessive diffusion all around because of the extrusion to adjacent tin ball even tin and chip short circuit have also been avoided.

Description

Chip structure

Technical Field

The utility model relates to the field of semiconductor technology, in particular to chip architecture.

Background

As shown in fig. 1 to 3, the chip structure on the market at present is chip bottom plane 1 and the structure that is provided with tin ball 2, to this kind of chip structure among the prior art, at the in-process of chip paster to PCBA (printed circuit board assembly), if increase heat dissipation materials such as heat conduction glue at chip upper surface 6, through heat conduction glue contact metal radiator or shield cover or cover heat dissipation, because materials such as heat conduction glue expend with heat and contract with cold when carrying out the secondary to the chip under this kind of situation, and the weight of heat conduction glue self, can push down the chip and lead to tin ball 2 on the plane 1 of chip bottom to excessively spread all around, the condition of continuous tin can appear in adjacent tin ball 2, thereby lead to the chip short circuit.

For example, with the development of 5G (fifth generation mobile communication technology) technology, the power of the chip is higher, and thus the heat dissipation requirement of the chip is higher. The module or the keysets of SMT (surface mount technology) paster chip need the secondary cross stove SMT paster to client terminal PCB (printed circuit board) board under some circumstances, the secondary cross stove again after module or keysets's chip upper surface 6 need increase the heat conduction and glue, the secondary cross stove because the influence of heat conduction glue expend with heat and contract with cold and heat conduction glue self weight, the heat conduction is glued and can be pushed the chip downwards, lead to chip and PCB clearance undersize, tin ball 2 on the plane 1 of chip bottom is excessively extruded and excessively spread all around, cause the condition of adjacent tin ball 2 even tin, thereby lead to the chip short circuit.

SUMMERY OF THE UTILITY MODEL

The to-be-solved technical problem of the utility model is to overcome among the prior art can appear the tin ball on the plane of chip bottom when going through the stove to the chip and be extruded and to diffusion all around, cause the condition of adjacent tin ball even tin to lead to the defect of chip short circuit, provide a chip architecture.

The utility model discloses an above-mentioned technical problem is solved through following technical scheme:

the utility model provides a chip structure, which comprises a chip bottom plane and a plurality of solder balls arranged on the chip bottom plane, and also comprises a plurality of bosses arranged on the chip bottom plane;

the height of the boss is smaller than that of the solder ball;

the boss is used for supporting the bottom plane of the chip.

Preferably, the number of bosses is at least 4.

Preferably, the bosses are arranged at the four corners of the bottom plane of the chip;

and/or the bosses are arranged at the middle positions of the four edges of the bottom plane of the chip.

Preferably, the boss is made of an insulating material.

Preferably, the distance between the boss and the nearest solder ball is greater than or equal to two thirds of the distance between the adjacent solder balls.

Preferably, the material of the boss is glass or ceramic or liquid crystal polymer.

Preferably, the number of the bosses is smaller than that of the solder balls.

Preferably, the cross-sectional shape of the boss is circular or square or oval.

Preferably, the bosses are of the same height.

The utility model discloses an actively advance the effect and lie in:

the utility model discloses a chip structure through evenly setting up a plurality of bosss on chip bottom plane, crosses the in-process of stove at the chip, because the boss can support the chip bottom plane after the welding, has avoided the tin ball on the plane of chip bottom to excessive diffusion all around because of the extrusion to adjacent tin ball even tin and chip short circuit have also been avoided.

Drawings

Fig. 1 is a schematic top surface view of a chip structure in the prior art.

Fig. 2 is a side view of a prior art chip structure.

Fig. 3 is a schematic structural diagram of a bottom plane of a chip structure in the prior art.

Fig. 4 is a side view of a chip structure according to a preferred embodiment of the present invention.

Fig. 5 is a schematic structural diagram of a bottom plane of a chip structure according to a preferred embodiment of the present invention.

Fig. 6 is a schematic diagram of the chip structure of the present invention for heat dissipation.

Fig. 7 is a partially enlarged view of a portion a in fig. 6.

Detailed Description

The present invention will be more clearly and completely described below by way of embodiments with reference to the accompanying drawings, and the description of the embodiments is provided to help understanding the present invention, but the present invention is not limited thereto.

As shown in fig. 4 to 5, a chip structure includes a chip bottom plane 1, a plurality of solder balls 2 disposed on the chip bottom plane, and a plurality of bumps 3 disposed on the chip bottom plane 1;

wherein, the height of the boss 3 is less than that of the solder ball 2; in the process of the chip 4 passing through the oven, the bump 3 is prevented from influencing the soldering between the solder ball 2 on the bottom plane 1 of the chip and the PCB 5, and generally, the height of the bump 3 is an arbitrary value between one half to two thirds of the height of the solder ball 2 which does not pass through the oven, and is not limited specifically here.

In this embodiment, the boss 3 is used to support the chip bottom plane 1 after soldering, wherein the boss 3 is made of an insulating high temperature resistant material, and the high temperature resistant temperature is at least higher than the highest temperature (i.e. 265 ℃ or higher) of the chip 4 passing through the furnace, and the boss 3 may be made of glass, ceramic, or liquid crystal polymer, and may also be made of the same material as the package material of the chip 4.

The number of the bosses 3 is smaller than the number of the solder balls 2, and the number of the bosses 3 is at least 4, except that the bosses 3 are arranged at the positions at four corners of the chip bottom plane 1 and the positions among the four corners, or the bosses 3 are arranged at the positions at four corners of the chip bottom plane 1 or the positions among the four corners, the bosses 3 can be arranged at other positions of the chip bottom plane 1, and no specific limitation is made here, for example, the chip bottom plane 1 in fig. 5 is provided with 6 bosses 3, wherein the bosses 3 are respectively arranged at the positions at four corners of the chip bottom plane 1, two bosses 3 are respectively symmetrically arranged at the middle positions at two sides of the chip bottom plane 1, and the bosses 3 can support the chip bottom plane 1 in parallel and uniformly.

In this embodiment, the cross-sectional shape of the boss 3 is one or more of a circular shape, a square shape or an oval shape, and the heights of the bosses 3 of different shapes are the same, and the bosses 3 of the same shape and the bosses 3 of different shapes can be arranged on the bottom plane 1 of the chip, so that the swing requirements of various spaces can be met.

In this embodiment, the distance between the bump 3 and the nearest solder ball 2 is greater than or equal to two thirds of the distance between the adjacent solder balls 2, so as to prevent the bump 3 and the nearest solder ball 2 from being connected together when the chip 4 passes through the oven.

In this embodiment, referring to fig. 1, in the process of passing through the oven by the chip 4 and the PCB 5, the solder balls 2 on the bottom plane 1 of the chip will melt and deform at high temperature regardless of the stress on the upper surface 6 of the chip, and the bottom plane 1 of the chip is provided with the boss 3, so that the boss 3 can support the bottom plane 1 of the chip after soldering, thereby preventing the solder balls 2 on the bottom plane 1 of the chip from being extruded and connected with the solder to cause short circuit.

And when chip upper surface 6 atress, chip 4 is at the in-process of high temperature stove of crossing, chip 4 can extrude excessively to press tin ball 2 downwards, at this moment, when the height less than or equal to boss 3 of tin ball 2 was high, boss 3 can support chip bottom plane 1, avoided chip 4 atress back and PCB board 5 clearance undersize to tin ball 2 of having avoided chip bottom plane 1 is excessively extruded and excessively expanded and avoided adjacent tin ball 2 the condition of even tin appearing all around, and then avoided chip 4 short circuit.

For example, as shown in fig. 6 to 7, when performing heat dissipation processing on a chip structure, a heat dissipation material such as a thermal conductive adhesive 7 may be added on a chip upper surface 6 of a module or a PCB interposer having an SMT chip, and the thermal conductive adhesive 7 contacts a shielding cover 8 to conduct and dissipate heat generated by a communication module, where the shielding cover 8 may be replaced by a metal heat sink or a heat dissipation cover. In the process of secondary furnace passing under the condition that the heat-conducting glue 7 is added on the upper surface 6 of the chip of the SMT chip or the PCB adapter plate, due to the thermal expansion and cold contraction of the heat-conducting glue 7 and the influence of the self weight of the heat-conducting glue 7, the heat-conducting glue 7 on the upper surface 6 of the chip can downwards extrude the chip 4, the solder balls 2 on the plane 1 of the bottom of the chip can be extruded and can be expanded all around, at the moment, when the height of the solder balls 2 is less than or equal to the height of the boss 3, the boss 3 can support the plane 1 of the bottom of the chip after welding, the gap between the chip 4 and the PCB 5 after stress is avoided to be too small, so that the solder balls 2 on the plane 1 of the bottom of the chip are excessively extruded and can be excessively expanded all around, the condition that the adjacent solder balls 2 are.

Although specific embodiments of the present invention have been described above, it will be understood by those skilled in the art that this is by way of example only and that the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the spirit and the principles of the present invention, and these changes and modifications are all within the scope of the present invention.

Claims

1. A chip structure, the said chip structure includes the bottom plane of the chip and several tin balls set in bottom plane of the said chip, characterized by that, the said chip structure also includes setting up multiple bosses on the bottom plane of the said chip;

the height of the boss is smaller than that of the solder ball;

the boss is used for supporting the bottom plane of the chip.

2. The chip structure of claim 1 wherein the number of mesas is at least 4.

3. The chip structure according to claim 2, wherein the bosses are provided at four corners of the bottom plane of the chip;

4. The chip structure of claim 1 wherein the mesa is an insulating material.

5. The chip structure of claim 1 wherein the distance between the bump and the nearest solder ball is greater than or equal to two-thirds of the distance between adjacent solder balls.

6. The chip structure of claim 1, wherein the bumps are made of glass or ceramic or liquid crystal polymer.

7. The chip structure of claim 1, wherein the number of the mesas is less than the number of the solder balls.

8. The chip structure according to claim 1, wherein the cross-sectional shape of the mesa is circular or square or oval.

9. The chip structure of claim 1 wherein the mesas are of the same height.