CN211062719U - Laminated chip bonding structure - Google Patents

Abstract

The utility model discloses a laminated chip bonding structure, which comprises a substrate and a plurality of laminated chips; the substrate is provided with an electric connection circuit, any laminated chip in the laminated chips comprises a flip chip and a horizontal chip, and the light emitting color of the flip chip is different from that of the horizontal chip; the bottom of the flip chip is provided with a flip chip electrode, the substrate is provided with a flip chip bonding pad corresponding to the flip chip electrode, and the flip chip electrode is connected with the corresponding flip chip bonding pad based on a conductive first adhesive; the top of the horizontal chip is provided with a horizontal chip electrode, the bottom of the horizontal chip is a transparent substrate, and the substrate is fixed on the top surface of the flip chip based on a second adhesive; the flip chip electrode of the flip chip is electrically connected with the power connection circuit based on the corresponding flip chip bonding pad, and the horizontal chip electrode of the horizontal chip is electrically connected with the power connection circuit based on the lead. The utility model discloses a stromatolite chip bonded structure has luminous even characteristics.

Description

Laminated chip bonding structure

Technical Field

The utility model relates to a light emitting device field, concretely relates to stromatolite chip bonding structure.

Background

The existing multi-primary-color COB device is provided with chips with different light-emitting colors on a substrate, the chips with different light-emitting colors are used for exciting fluorescent powder in a fluorescent glue layer to realize the light emission of the device, and the chips with different light-emitting colors are used as light sources, so that the color rendering index of the laminated chip bonding structure is usually higher, and the laminated chip bonding structure has a good color rendering effect.

However, in specific implementation, it is found that, in the existing multi-primary-color COB device structure, since the chips with different light-emitting colors are adopted and are spread on the substrate, the chips with different light-emitting colors have a certain luminance difference and position difference, the chips with different light-emitting colors have different excitation effects on the fluorescent powder, and the light color uniformity difference of each region of the device is large, so that the light-emitting effect of the COB device is affected.

SUMMERY OF THE UTILITY MODEL

In order to overcome the luminous inhomogeneous shortcoming of current many primary colors COB device structure, the utility model provides a stromatolite chip bonded structure, this stromatolite chip bonded structure forms the stromatolite chip with the different chip coincide of two kinds of luminous colours, and a plurality of stromatolite chip is arranged according to the predetermined mode on the base plate to the luminous effect uniformity that makes different positions on the base plate increases, has improved the luminous homogeneity based on the many primary colors COB device that this stromatolite chip bonded structure made, has good practicality.

Correspondingly, the utility model provides a laminated chip bonding structure, which comprises a substrate and a plurality of laminated chips;

the substrate is provided with an electric connection circuit, any laminated chip in the laminated chips comprises a flip chip and a horizontal chip, and the light emitting color of the flip chip is different from that of the horizontal chip;

the bottom of the flip chip is provided with a flip chip electrode, the substrate is provided with a flip chip bonding pad corresponding to the flip chip electrode, and the flip chip electrode is connected with the corresponding flip chip bonding pad based on a conductive first adhesive;

a horizontal chip electrode is arranged on the top of the horizontal chip, a transparent substrate is arranged at the bottom of the horizontal chip, and the substrate is fixed on the top surface of the flip chip based on a second adhesive;

the flip chip electrode of the flip chip is electrically connected with the power connection circuit based on the corresponding flip chip bonding pad, and the horizontal chip electrode of the horizontal chip is electrically connected with the power connection circuit based on a lead.

In an optional implementation manner, the flip chips of the stacked chips respectively form a plurality of flip chip branches, any flip chip branch of the flip chip branches comprises at least one flip chip, and the flip chips in any flip chip branch are sequentially electrically connected in series through the flip chip bonding pads;

the horizontal chips of the laminated chips respectively form a plurality of horizontal chip branches, any one horizontal chip branch in the plurality of horizontal chip branches comprises at least one horizontal chip, and the horizontal chips in any one horizontal chip branch are sequentially connected in series and electrically connected through a lead;

the positive poles of the flip chip branches are electrically connected with the positive poles of the horizontal chip branches, and the negative poles of the flip chip branches are electrically connected with the negative poles of the horizontal chip branches.

In an optional embodiment, the number of the flip chip branches is the same as the number of the horizontal chip branches;

each flip chip branch in the plurality of flip chip branches comprises the same number of flip chips;

each horizontal chip branch in the plurality of horizontal chip branches comprises the same number of horizontal chips.

In an alternative embodiment, the power connection circuit comprises a positive circuit and a negative circuit;

the anodes of the flip chip branches are electrically connected with the anode circuit;

the anodes of the horizontal chip branches are electrically connected with the anode circuit;

the negative electrodes of the flip chip branches are electrically connected with the negative electrode circuit;

and the cathodes of the plurality of horizontal chip branches are electrically connected with the cathode circuit.

In an optional embodiment, the positive electrode circuit and the negative electrode circuit enclose a circular chip mounting area on the substrate;

the plurality of laminated chips are arranged in the chip arrangement area.

In an optional implementation mode, a plurality of concentric circles with equal radius difference and a plurality of straight lines which pass through the circle center and have equal angle difference are constructed by taking a central point in the chip mounting area as the circle center;

the plurality of concentric circles and the plurality of straight lines are intersected to form a plurality of positioning intersection points;

the plurality of laminated chips are respectively arranged on the plurality of positioning intersection points.

In an optional embodiment, a bisector circle is constructed with a center point of the chip mounting area as a center, and a radius of the bisector circle is one half of a radius of the chip mounting area;

some of the laminated chips are arranged in the bisector circle or the bisector circle, and the rest of the laminated chips are arranged outside the bisector circle;

the laminated chips arranged outside the equant circle are uniformly distributed along the circumference of the circle center of the equant circle.

In an optional embodiment, a plurality of equally spaced horizontal lines and a plurality of equally spaced vertical lines are constructed in the chip mounting area;

the horizontal lines and the vertical lines intersect to form a plurality of positioning intersection points;

the plurality of laminated chips are respectively arranged on the plurality of positioning intersection points.

In an optional implementation manner, the substrate is further provided with a positive contact and a negative contact, the positive contact is electrically connected to the positive circuit, and the negative contact is electrically connected to the negative circuit.

In an optional embodiment, the emission peak wavelength of the flip chip is [430nm,460nm ], and the emission peak wavelength of the horizontal chip is [460nm,500nm ];

or the luminescence peak wavelength of the flip chip is [460nm,500nm ], and the luminescence peak wavelength of the horizontal chip is [430nm,460nm ].

The utility model provides a laminated chip bonding structure, the laminated chip in the laminated chip bonding structure adopts a superposed structure that a flip chip is arranged below and a horizontal chip is arranged above, so that the light excitation regions of the flip chip and the horizontal chip are close to each other, and the uniformity of excitation of chips with different colors to fluorescent glue layer by layer is improved; the laminated chip adopts a series-parallel combined branch circuit electrical connection mode, so that a fault area can be clearly indicated, and reference is provided for process optimization; the design of the arrangement structure of the laminated chip in the chip mounting area can improve the overall light-emitting uniformity of the laminated chip bonding structure.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 shows a three-dimensional structure diagram of a stacked chip bonding structure according to an embodiment of the present invention;

fig. 2 is a schematic diagram illustrating a front view structure of a stacked chip according to an embodiment of the present invention;

fig. 3 is a schematic diagram illustrating a top view structure of a substrate according to an embodiment of the present invention;

fig. 4 is a schematic top view of a stacked chip bonding structure according to an embodiment of the present invention;

fig. 5 is a schematic diagram illustrating a position of a stacked chip according to a first embodiment of the present invention;

fig. 6 is a schematic diagram illustrating a position of a stacked chip according to a second embodiment of the present invention;

fig. 7 shows a schematic diagram of a position where stacked chips are disposed according to a third embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without creative efforts belong to the protection scope of the present invention.

Fig. 1 is a schematic three-dimensional structure diagram of a stacked chip bonding structure according to an embodiment of the present invention, and it should be noted that the component structures in the drawing are only used for illustrating the installation positions and the main installation forms thereof, and do not represent the unique installation manner of the components, and the description is specifically referred to in conjunction with the following text.

The embodiment provides a laminated chip bonding structure, which comprises a substrate 1 and a plurality of laminated chips 2.

The substrate is provided with a power connection circuit, the power connection circuit is used for connecting the chip, and optionally, the power connection circuit comprises a positive circuit and a negative circuit.

Fig. 2 shows a schematic front view structure diagram of a chip according to an embodiment of the present invention. Any laminated chip 2 of the plurality of chips 2 includes a flip chip 210 and a horizontal chip 220 which emit light of different colors.

The flip chip 210 has a flip chip electrode 211 located at the bottom, the substrate 1 is provided with a flip chip pad 4 corresponding to the flip chip electrode 211, and the flip chip electrode 211 is connected to the corresponding flip chip pad 4 based on a conductive first adhesive 241.

It should be noted that the flip chip 210 may adopt an existing flip chip structure, and therefore, the structure of the flip chip 210 except the flip chip electrode 211 may refer to the prior art, which is not particularly limited in the embodiments of the present invention; in a specific embodiment, the flip chip electrode 211 usually has a polarity requirement, and the above description is only about the physical connection manner between the flip chip electrode 211 and the substrate, and the circuit connection manner of the flip chip electrode 211 will be described later.

Specifically, the first adhesive 241 has a function of fixing the flip chip 210 on the substrate 1 (specifically, the flip chip pad 4) and electrically connecting the flip chip electrode 211 with the corresponding flip chip pad 4, and optionally, the first adhesive 241 may be a conductive material with an adhesive fixing function, such as solder paste or silver paste.

Specifically, the horizontal chip 220 has a horizontal chip electrode 222 on the top, and the bottom of the horizontal chip 220 is fixed on the top surface of the flip chip 210 by a transparent second adhesive 242.

Optionally, the second adhesive 242 may be a transparent adhesive material such as a transparent epoxy resin, a transparent silicone gel, or the like.

It should be noted that a substrate is disposed at the bottom of the common horizontal chip 220, and in order to enhance the light emitting effect of the horizontal chip 220, a reflective layer is typically disposed at the bottom of the substrate; in the present embodiment, in order to allow the light of the flip chip 210 to be emitted through the horizontal chip 220, the bottom surface of the horizontal chip 220 is not provided with a reflective layer. Specifically, the horizontal chip 220 has a substrate 221 at the bottom, no reflective layer is disposed under the substrate 221, and the substrate 221 is fixed on the top surface of the flip chip 210 based on the second adhesive 242. The remaining component structures of the horizontal chip 220 can refer to the prior art, and the present embodiment is not limited thereto.

Optionally, the emission peak wavelength of the flip chip is [430nm,460nm ], and the emission peak wavelength of the horizontal chip is [460nm,500nm ]; or the luminescence peak wavelength of the flip chip is [460nm,500nm ], and the luminescence peak wavelength of the horizontal chip is [430nm,460nm ].

Preferably, the flip chip 210 is a blue light flip chip, and the horizontal chip 220 is a green light horizontal chip; or the flip chip 210 is a green light flip chip and the horizontal chip 220 is a blue light horizontal chip.

Specifically, in order to realize the power-on of the stacked chip (the flip chip 210 and the horizontal chip 220), since the flip chip electrodes 211 of the flip chip 210 and the corresponding flip chip pads 4 of the present embodiment are connected by the conductive first adhesive 241, the flip chip 210 can be electrically connected to the electrical circuit by the corresponding flip chip pads 4, and the horizontal chip 220 is electrically connected to the electrical circuit by the wires 5.

Specifically, when the stacked chip bonding structure is used for manufacturing a multi-primary-color COB device, the stacked chip needs to be covered with fluorescent glue, and the fluorescent glue is cured to form a fluorescent glue layer. Specifically, the fluorescent glue is generally formed by mixing fluorescent powder and colloid, and forms a required color after being excited by light. Optionally, the fluorescent powder comprises yellow fluorescent powder and red fluorescent powder, the flip chip is a blue light flip chip, and the horizontal chip is a green light horizontal chip; or the flip chip is a green light flip chip, the horizontal chip is a blue light horizontal chip, light rays with different colors form white light by exciting fluorescent powder, and the white light of the laminated chip bonding structure has a good color development effect because the white light is formed by exciting light rays with various primary colors.

In the stacked chip bonding structure provided by this embodiment, two chips with different light-emitting colors are stacked to form a stacked chip, and the stacked chips are arranged on a substrate in a certain manner; because the stromatolite chip sets up the coincide of the different chip of two kinds of luminous colours, when giving out light, the light region that two kinds of luminous colour difference in the stromatolite chip sent is closer, and the fluorescence that arouses is regional unanimous to the luminous homogeneity that makes the many primary colors COB device based on this stromatolite chip bonded structure makes is better, has good practicality.

Alternatively, the electrical connection of the stacked chip may be performed by the following method:

fig. 3 is a schematic diagram illustrating a top view structure of a substrate according to an embodiment of the present invention, fig. 4 is a schematic diagram illustrating a top view structure of a stacked chip bonding structure according to an embodiment of the present invention, and it should be noted that, in order to illustrate an inner circuit structure of the substrate, a part of a surface material of the substrate in fig. 3 is hidden and not shown; in addition, the components and their labels, which are not shown in fig. 3 and 4, can be understood in conjunction with fig. 1 and 2 of the accompanying drawings.

The flip chips 210 of the laminated chips respectively form a plurality of flip chip branches, any flip chip branch in the flip chip branches comprises at least one flip chip 210, and the flip chips 210 in any flip chip branch are sequentially connected in series and electrically connected through the flip chip bonding pads 4;

the horizontal chips 22 of the plurality of laminated chips respectively form a plurality of horizontal chip branches, any one horizontal chip branch in the plurality of horizontal chip branches comprises at least one horizontal chip 220, and the horizontal chips 220 in any one horizontal chip branch are sequentially and electrically connected in series through a lead 5;

the positive poles of the flip chip branches are electrically connected with the positive poles of the horizontal chip branches, and the negative poles of the flip chip branches are electrically connected with the negative poles of the horizontal chip branches.

By the embodiment, the operation difficulty of the electrical connection between the flip chip 210 and the horizontal chip 220 can be reduced, and the processing convenience can be improved.

Optionally, each flip chip branch of the plurality of flip chip branches includes the same number of flip chips 210; each of the plurality of horizontal chip branches includes the same number of horizontal chips 220.

Optionally, the number of the flip chip branches is the same as that of the horizontal chip branches. Because the plurality of flip chip branches and the plurality of horizontal chips adopt the arrangement mode that the positive electrodes and the negative electrodes are respectively and electrically connected with each other, in specific implementation, the flip chip and the horizontal chips can adopt a common driving electric connection structure, namely, the positive electrodes of the flip chip branches are connected with the positive electrodes of the horizontal chip branches, and the negative electrodes of the flip chip branches are connected with the negative electrodes of the horizontal chips, which is equivalent to that the flip chip branches and the horizontal chip branches are parallel circuits; in order to ensure the voltage consistency and the current consistency of the flip chip branches and the horizontal chip branches, the number of chips in each flip chip branch and each horizontal chip branch should be kept the same.

Specifically, the power connection circuit comprises a positive circuit and a negative circuit; because the base plate 1 has multilayer structure, the inside and outside of base plate 1 can set up the circuit, it is optional, the utility model discloses the positive circuit includes the positive circuit 103 of nexine and the positive circuit 101 of top layer, nexine positive circuit 103 and the positive circuit 101 of top layer are electric connection each other, in essence, nexine positive circuit 103 and positive circuit 101 of top layer are the same conductive metal spare, show mainly used for distinguishing different electric connection positions with nexine positive circuit 103 and positive circuit 101 of top layer; the negative electrode circuit comprises a lining negative electrode circuit 104 and a surface layer negative electrode circuit 102, the lining negative electrode circuit 104 and the surface layer negative electrode circuit 102 are electrically connected with each other, and in essence, the lining negative electrode circuit 104 and the surface layer negative electrode circuit 102 are the same conductive metal piece, and the lining negative electrode circuit 104 and the surface layer negative electrode circuit 102 are mainly used for distinguishing different electric connection positions.

The anodes of the flip chip branches are electrically connected with the anode circuit, and the anodes of the horizontal chip branches are electrically connected with the anode circuit; specifically, the positive electrode of the flip chip branch circuit is electrically connected with the inner layer positive circuit 103 based on the flip chip bonding pad 4, and the positive electrode of the horizontal chip branch circuit is electrically connected with the surface layer positive circuit 101 based on the lead 5.

The negative electrodes of the flip chip branches are electrically connected with the negative electrode circuit, and the negative electrodes of the horizontal chip branches are electrically connected with the negative electrode circuit; specifically, the negative electrode of the flip chip branch is electrically connected with the inner-layer negative electrode circuit 104 based on the flip chip bonding pad 4, and the negative electrode of the horizontal chip branch is electrically connected with the surface-layer negative electrode circuit 102 based on the wire 5.

Further, the substrate 1 is designed to meet the circuit connection requirement of the chip 2, and also needs to meet the external connection requirement of the stacked chip bonding structure. Optionally, the substrate 1 is further provided with an anode contact 111 and a cathode contact 112, the anode contact 111 is electrically connected to the anode circuit, and specifically, the anode contact 111 is electrically connected to the inner layer anode circuit 103 and the surface layer anode circuit 101 respectively; the negative contact 112 is electrically connected to the negative circuit, and specifically, the negative contact 112 is electrically connected to the inner layer negative circuit 104 and the surface layer negative circuit 102, respectively.

Further, in order to improve the light emitting uniformity of the stacked chip bonding structure, in a specific implementation, the arrangement position of the plurality of stacked chips 2 on the substrate 1 may be defined.

Specifically, in this embodiment, the positive electrode circuit and the negative electrode circuit enclose a circular area on the substrate 1, and the circular area is a chip mounting area; the plurality of stacked chips 2 are disposed in the chip mounting area.

The positions of the stacked chips 2 in the chip placement area will be described below.

The first embodiment is as follows:

fig. 5 is a schematic diagram illustrating a position of a stacked chip according to an embodiment of the present invention, in which a circle pointed by reference numeral 6 is a chip mounting region 6.

In this embodiment, a plurality of concentric circles 601 with equal radius difference are constructed by taking a point (preferably, a central point of the chip mounting area 6) in the chip mounting area 6 as a center, and the radius difference between any two adjacent concentric circles 601 in the plurality of concentric circles 601 is equal; meanwhile, the included angle difference values between any two adjacent straight lines 602 in the straight lines 602 are equal;

the plurality of concentric circles 601 and the plurality of straight lines 602 intersect to form a plurality of positioning intersection points;

the plurality of laminated chips 2 are respectively arranged on the plurality of positioning intersections.

Example two:

fig. 6 shows a schematic diagram of a position for arranging stacked chips according to an embodiment of the present invention, wherein the circle pointed by the reference numeral 6 is the chip mounting region 6.

In this embodiment, a bisector circle 603 is constructed with the center point of the chip mounting region 6 as the center, and the radius of the bisector circle 603 is one half of the radius of the chip mounting region 6;

a part of the plurality of stacked chips 2 is disposed within the bisector 603 or on the bisector 603, and the rest of the plurality of stacked chips 2 are disposed outside the bisector 603;

the laminated chips 2 arranged outside the bisector 603 are uniformly distributed along the circumference of the center of the bisector 603.

In a specific implementation, the circular ring-shaped area between the bisector 603 and the outline of the chip placement area 6 may be bisected into a plurality of blocks, the number of the stacked chips 2 in each block is opposite, and the positions of the stacked chips 2 in the blocks are the same or symmetrical.

Example three:

fig. 7 is a schematic diagram illustrating a position of a stacked chip according to an embodiment of the present invention, in which a circle pointed by reference numeral 6 is a chip mounting region 6.

In the present embodiment, a plurality of equally spaced horizontal lines 604 and a plurality of equally spaced vertical lines 605 are constructed in the chip mounting area 6;

the horizontal lines 604 intersect the vertical lines 605 to form a plurality of positioning intersections;

the plurality of laminated chips 2 are respectively arranged on the plurality of positioning intersections.

The arrangement of the stacked chips in the chip mounting region 6 described in the first to third embodiments can ensure the light-emitting uniformity of the stacked chip bonding structure.

The embodiment provides a laminated chip bonding structure, wherein a laminated chip in the laminated chip bonding structure adopts a superposed structure of a flip chip on a lower chip and a horizontal chip on an upper chip, so that the light excitation regions of the flip chip and the horizontal chip are close to each other, and the excitation uniformity of chips with different colors on a fluorescent glue layer is improved; the laminated chip adopts a series-parallel combined branch circuit electrical connection mode, so that a fault area can be clearly indicated, and reference is provided for process optimization; the design of the arrangement structure of the laminated chip in the chip mounting area can improve the overall light-emitting uniformity of the laminated chip bonding structure.

The laminated chip bonding structure provided by the embodiment of the present invention is described in detail above, and the principle and the implementation of the present invention are explained by applying specific examples herein, and the description of the above embodiments is only used to help understanding the method and the core idea of the present invention; meanwhile, for the general technical personnel in the field, according to the idea of the present invention, there are changes in the specific implementation and application scope, to sum up, the content of the present specification should not be understood as the limitation of the present invention.

Claims (10)

1. A laminated chip bonding structure is characterized by comprising a substrate and a plurality of laminated chips;

the substrate is provided with an electric connection circuit, any laminated chip in the laminated chips comprises a flip chip and a horizontal chip, and the light emitting color of the flip chip is different from that of the horizontal chip;

the bottom of the flip chip is provided with a flip chip electrode, the substrate is provided with a flip chip bonding pad corresponding to the flip chip electrode, and the flip chip electrode is connected with the corresponding flip chip bonding pad based on a conductive first adhesive;

a horizontal chip electrode is arranged on the top of the horizontal chip, a transparent substrate is arranged at the bottom of the horizontal chip, and the substrate is fixed on the top surface of the flip chip based on a second adhesive;

the flip chip electrode of the flip chip is electrically connected with the power connection circuit based on the corresponding flip chip bonding pad, and the horizontal chip electrode of the horizontal chip is electrically connected with the power connection circuit based on a lead.

2. The laminated chip bonding structure of claim 1, wherein the flip chips of the laminated chips respectively constitute flip chip branches, each flip chip branch of the flip chip branches includes at least one flip chip, and the flip chips in the flip chip branches are sequentially electrically connected in series through the flip chip pads;

the horizontal chips of the laminated chips respectively form a plurality of horizontal chip branches, any one horizontal chip branch in the plurality of horizontal chip branches comprises at least one horizontal chip, and the horizontal chips in any one horizontal chip branch are sequentially connected in series and electrically connected through a lead;

the positive poles of the flip chip branches are electrically connected with the positive poles of the horizontal chip branches, and the negative poles of the flip chip branches are electrically connected with the negative poles of the horizontal chip branches.

3. The stacked die bond structure of claim 2, wherein the number of flip chip branches and the number of horizontal chip branches are the same;

each flip chip branch in the plurality of flip chip branches comprises the same number of flip chips;

each horizontal chip branch in the plurality of horizontal chip branches comprises the same number of horizontal chips.

4. The laminated die bond structure of claim 2, wherein the power circuit comprises a positive circuit and a negative circuit;

the anodes of the flip chip branches are electrically connected with the anode circuit;

the anodes of the horizontal chip branches are electrically connected with the anode circuit;

the negative electrodes of the flip chip branches are electrically connected with the negative electrode circuit;

and the cathodes of the plurality of horizontal chip branches are electrically connected with the cathode circuit.

5. The laminated chip bonding structure according to claim 4, wherein the positive electrode circuit and the negative electrode circuit enclose a circular chip placement area on the substrate;

the plurality of laminated chips are arranged in the chip arrangement area.

6. The laminated chip bonding structure of claim 5, wherein a plurality of concentric circles of equal radius difference, a plurality of straight lines crossing the center of the circle and having equal angle difference are constructed with a center point in the chip mounting region as a center;

the plurality of concentric circles and the plurality of straight lines are intersected to form a plurality of positioning intersection points;

the plurality of laminated chips are respectively arranged on the plurality of positioning intersection points.

7. The laminated chip bonding structure of claim 5, wherein a bisector circle is constructed with a center point of the chip mounting area as a center, and a radius of the bisector circle is one half of a radius of the chip mounting area;

some of the laminated chips are arranged in the bisector circle or the bisector circle, and the rest of the laminated chips are arranged outside the bisector circle;

the laminated chips arranged outside the equant circle are uniformly distributed along the circumference of the circle center of the equant circle.

8. The laminated chip bonding structure of claim 5, wherein a plurality of equally spaced horizontal lines and a plurality of equally spaced vertical lines are constructed within the chip placement area;

the horizontal lines and the vertical lines intersect to form a plurality of positioning intersection points;

the plurality of laminated chips are respectively arranged on the plurality of positioning intersection points.

9. The laminated chip bonding structure according to claim 4, wherein a positive contact and a negative contact are further disposed on the substrate, the positive contact is electrically connected to the positive circuit, and the negative contact is electrically connected to the negative circuit.

10. The stacked die bond structure of claim 1, wherein said flip chip has an emission peak wavelength of [430nm,460nm ], said horizontal die has an emission peak wavelength of [460nm,500nm ];

or the luminescence peak wavelength of the flip chip is [460nm,500nm ], and the luminescence peak wavelength of the horizontal chip is [430nm,460nm ].

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