CN210897260U - 新型封装的分立器件 - Google Patents

新型封装的分立器件 Download PDF

Info

Publication number
CN210897260U
CN210897260U CN201922012880.5U CN201922012880U CN210897260U CN 210897260 U CN210897260 U CN 210897260U CN 201922012880 U CN201922012880 U CN 201922012880U CN 210897260 U CN210897260 U CN 210897260U
Authority
CN
China
Prior art keywords
metal
heat dissipation
effect transistor
field effect
dissipation plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201922012880.5U
Other languages
English (en)
Inventor
房军军
封丹婷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Daozhi Technology Co ltd
Original Assignee
Shanghai Daozhi Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Daozhi Technology Co ltd filed Critical Shanghai Daozhi Technology Co ltd
Priority to CN201922012880.5U priority Critical patent/CN210897260U/zh
Application granted granted Critical
Publication of CN210897260U publication Critical patent/CN210897260U/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

新型封装的分立器件，主要包括绝缘散热板及固定设置在绝缘散热板上的二极管芯片和场效应晶体管芯片，所述绝缘散热板靠近二极管芯片的一侧固定设置有作为输入端的第一金属引脚，所述二极管芯片及场效应晶体管芯片通过金属连接件设置有作为输出端的第二金属引脚；所述绝缘散热板、二极管芯片、场效应晶体管芯片包覆在塑封外壳内且所述绝缘散热板的外端暴露在塑封外壳外并与所述塑封外壳的外侧持平；所述场效应晶体管芯片上通过金属连接件设置有控制引脚；本实用新型将金属引脚位置进行优化，增加引脚间爬电距离，在总体上提高了散热效率，功率输出密度，抗冲击能力与绝缘可靠性，降低了安装和使用成本。

Description

新型封装的分立器件
技术领域
本实用新型属于电力电子学领域，具体涉及一种新型封装的分立器件。
背景技术
目前场效应晶体管模块在变频器，焊机，感应加热，不间断电源，风力发电与电动汽车领域的应用越来越广泛，以上的各领域对于分立器件来说，封装体积，功率密度，可靠性等各方面的要求也越来越严苛。
在传统的分立器件封装中，为良好的散热条件与功率密度之间平衡，塑封体均将一侧带电金属面外露；为方便安装还需在塑封体表面预留压块空间，或者贯通圆孔。导致安装过程中客户端需要加装绝缘垫片，提升了封装的接触热阻，降低了封装的散热效率与芯片的抗冲击能力。空间利用率的压缩导致功率密度无法提升。引脚间的间距短，长期使用过程中受环境影响更易产生爬电现象，降低了器件使用的安全性与可靠性。
发明内容
本实用新型要解决的技术问题在于，针对现有技术的上述缺陷，提供一种新封装的分立器件，以解决现有技术情况下散热面不带绝缘，散热效率低，功率密度低等问题。
本实用新型的目的是通过如下技术方案来完成的，一种新型封装的分立器件，主要包括绝缘散热板及固定设置在绝缘散热板上的二极管芯片和场效应晶体管芯片，所述绝缘散热板靠近二极管芯片的一侧固定设置有作为输入端的第一金属引脚，所述二极管芯片及场效应晶体管芯片通过金属连接件设置有作为输出端的第二金属引脚；所述绝缘散热板、二极管芯片、场效应晶体管芯片包覆在塑封外壳内且所述绝缘散热板的外端暴露在塑封外壳外并与所述塑封外壳的外侧持平；所述场效应晶体管芯片上通过金属连接件设置有控制引脚。
进一步地，所述绝缘散热板包括绝缘层及设置在绝缘层前后相对侧面上的金属导电层，所述绝缘层为氧化铝、氮化铝或氮化硅材料制成，所述金属导电层为铜或者铝材料制成。
进一步地，所述金属连接件为分别设置在二极管芯片和场效应晶体管芯片上的金属垫片，所述第二金属引脚的一端通过两金属垫片依次与场效应晶体管芯片及二极管芯片固定连接，另一端向塑封外壳的外侧延伸。
进一步地，所述金属连接件为连接二极管芯片和场效应晶体管芯片的若干金属引线，所述金属引线的形状为波浪形，所述第二金属引脚的一端通过金属引线依次与场效应晶体管芯片及二极管芯片固定连接，另一端向塑封外壳的外侧延伸。
进一步地，所述场效应晶体管芯片及二极管芯片通过回流焊接方式与所述绝缘散热板固定连接。
进一步地，所述塑封外壳的长度为25-30mm，宽度为15-20mm，厚度为3-6mm；所述绝缘散热板长度为20-25mm，宽度为12-16mm，厚度为0.5-1.5mm。
本实用新型的有益技术效果在于：本实用新型加大散热片面积并增加了绝缘设计，可直接在客户端安装至散热板；对芯片装载区域面积优化，提高封装的额定电流上限，并使用金属垫片对芯片进行双面焊接，增加热容；优化金属引脚位置，降低长期使用造成的爬电现象，加大金属引脚面积，提升过电流能力；在保证散热效率的情况下大幅度提升输出功率，安全性与可靠性。
附图说明
图1为本实用新型所述分立器件第一种实施例的侧面结构示意图；
图2为图1的局部放大结构示意图；
图3为本实用新型所述分立器件第一种实施例的正面结构示意图；
图4为本实用新型所述分立器件第二种实施例的侧面结构示意图；
图5为本实用新型所述分立器件第二种实施例的正面结构示意图。
具体实施方式
为使本领域的普通技术人员更加清楚地理解本实用新型的目的、技术方案和优点，以下结合附图和实施例对本实用新型做进一步的阐述。
如图1-5所示，本实用新型所述的一种新型封装的分立器件，主要包括绝缘散热板1及固定设置在绝缘散热板1上的二极管芯片2和场效应晶体管芯片3，所述绝缘散热板1长度为20-25mm，宽度为12-16mm，厚度为0.5-1.5mm，所述绝缘散热板1靠近二极管芯片2的一侧固定设置有作为输入端的第一金属引脚4，所述二极管芯片2及场效应晶体管芯片3通过金属连接件设置有作为输出端的第二金属引脚5；所述绝缘散热板1、二极管芯片2、场效应晶体管芯片3包覆在塑封外壳6内且所述绝缘散热板1的外端暴露在塑封外壳6外并与所述塑封外壳6的外侧持平；所述场效应晶体管芯片3上通过金属连接件设置有控制引脚7。在整体框架制造完成后通过外包覆塑封外壳6的方式，进行相对位置的固定，提高金属引脚之间的爬电距离与整体可靠性。
参照图2所示，所述绝缘散热板1包括绝缘层8及设置在绝缘层8前后相对侧面上的金属导电层9，所述绝缘层8为氧化铝、氮化铝或氮化硅材料制成，所述金属导电层9为铜或者铝材料制成。
参照图1所示，所述金属连接件为分别设置在二极管芯片2和场效应晶体管芯片3上的金属垫片10，所述第二金属引脚5的一端通过两金属垫片10依次与场效应晶体管芯片3及二极管芯片2固定连接，另一端向塑封外壳6的外侧延伸。
参照图4所示，所述金属连接件为连接二极管芯片2和场效应晶体管芯片3的若干金属引线11，所述金属引线11的形状为波浪形，所述第二金属引脚5的一端通过金属引线11依次与场效应晶体管芯片3及二极管芯片2固定连接，另一端向塑封外壳6的外侧延伸；金属引脚的材料为铝碳或铝碳化硅合金。
参照图1所示，所述场效应晶体管芯片3及二极管芯片2通过回流焊接方式与所述绝缘散热板1固定连接。所述塑封外壳6的长度为25-30mm，宽度为15-20mm，厚度为3-6mm；所述绝缘散热板长度为20-25mm，宽度为12-16mm，厚度为0.5-1.5mm。
本实用新型加大散热片面积并增加了绝缘设计，可直接在客户端安装至散热板；对芯片装载区域面积优化，提高封装的额定电流上限，并使用金属垫片对芯片进行双面焊接，增加热容；优化金属引脚位置，降低长期使用造成的爬电现象，加大金属引脚面积，提升过电流能力；在保证散热效率的情况下大幅度提升输出功率，安全性与可靠性。
本文中所描述的具体实施例仅例示性说明本实用新型的原理及其功效，而非用于限制本实用新型。任何熟悉此技术的人士皆可在不违背本实用新型的精神及范畴下，对上述实施例进行修饰或改变。因此，但凡所属技术领域中具有通常知识者在未脱离本实用新型所揭示的精神与技术思想下所完成的一切等效修饰或改变，仍应由本实用新型的权利要求所涵盖。

Claims (6)

1.新型封装的分立器件，其特征在于：主要包括绝缘散热板及固定设置在绝缘散热板上的二极管芯片和场效应晶体管芯片，所述绝缘散热板靠近二极管芯片的一侧固定设置有作为输入端的第一金属引脚，所述二极管芯片及场效应晶体管芯片通过金属连接件设置有作为输出端的第二金属引脚；所述绝缘散热板、二极管芯片、场效应晶体管芯片包覆在塑封外壳内且所述绝缘散热板的外端暴露在塑封外壳外并与所述塑封外壳的外侧持平；所述场效应晶体管芯片上通过金属连接件设置有控制引脚。
2.根据权利要求1所述的新型封装的分立器件，其特征在于：所述绝缘散热板包括绝缘层及设置在绝缘层前后相对侧面上的金属导电层，所述绝缘层为氧化铝、氮化铝或氮化硅材料制成，所述金属导电层为铜或者铝材料制成。
3.根据权利要求2所述的新型封装的分立器件，其特征在于：所述金属连接件为分别设置在二极管芯片和场效应晶体管芯片上的金属垫片，所述第二金属引脚的一端通过两金属垫片依次与场效应晶体管芯片及二极管芯片固定连接，另一端向塑封外壳的外侧延伸。
4.根据权利要求2所述的新型封装的分立器件，其特征在于：所述金属连接件为连接二极管芯片和场效应晶体管芯片的若干金属引线，所述金属引线的形状为波浪形，所述第二金属引脚的一端通过金属引线依次与场效应晶体管芯片及二极管芯片固定连接，另一端向塑封外壳的外侧延伸。
5.根据权利要求3或4所述的新型封装的分立器件，其特征在于：所述场效应晶体管芯片及二极管芯片通过回流焊接方式与所述绝缘散热板固定连接。
6.根据权利要求5所述的新型封装的分立器件，其特征在于：所述塑封外壳的长度为25-30mm，宽度为15-20mm，厚度为3-6mm；所述绝缘散热板长度为20-25mm，宽度为12-16mm，厚度为0.5-1.5mm。
CN201922012880.5U 2019-11-20 2019-11-20 新型封装的分立器件 Active CN210897260U (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201922012880.5U CN210897260U (zh) 2019-11-20 2019-11-20 新型封装的分立器件

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201922012880.5U CN210897260U (zh) 2019-11-20 2019-11-20 新型封装的分立器件

Publications (1)

Publication Number Publication Date
CN210897260U true CN210897260U (zh) 2020-06-30

Family

ID=71315106

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201922012880.5U Active CN210897260U (zh) 2019-11-20 2019-11-20 新型封装的分立器件

Country Status (1)

Country Link
CN (1) CN210897260U (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110854096A (zh) * 2019-11-20 2020-02-28 上海道之科技有限公司 一种新型封装的分立器件

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110854096A (zh) * 2019-11-20 2020-02-28 上海道之科技有限公司 一种新型封装的分立器件

Similar Documents

Publication Publication Date Title
CN107170714B (zh) 一种低寄生电感功率模块及双面散热低寄生电感功率模块
CN107195623B (zh) 一种双面散热高可靠功率模块
US20240203841A1 (en) Novel packaging structure of power semiconductor module
CN210897260U (zh) 新型封装的分立器件
CN219435850U (zh) Mosfet芯片封装结构
CN110854096A (zh) 一种新型封装的分立器件
CN210467825U (zh) 一种具有抗干扰结构的贴片式二极管
CN218039169U (zh) 二极管光伏模块的封装结构和太阳能电池接线盒装置
CN201303481Y (zh) 热电分离的散热模块结构
CN111463177A (zh) 一种功率模块及其应用方法
CN213988456U (zh) 一种散热式无感厚膜功率电阻器
CN214279732U (zh) 一种带有便拆装外壳的变压器
CN211045412U (zh) 一种压接型SiC功率模块封装结构
CN216054669U (zh) 一种便于散热的氮化镓功率器件
CN110473849B (zh) 一种导热稳固型贴片式二极管
CN111128898B (zh) 一种压接型SiC功率模块封装结构
CN209785918U (zh) 一种贴片式三极管
CN210778564U (zh) 一种功率半导体
CN214477422U (zh) 一种新型封装的功率模块
CN216413081U (zh) 一种具有良好平衡性能的智能功率模块
CN212750867U (zh) 一种双面散热封装器件
CN212587482U (zh) 一种顶部散热半导体产品及电子产品
CN211670191U (zh) 一种高散热性的贴片整流桥
CN218896627U (zh) 一种sbd器件封装散热结构
CN210467819U (zh) 一种芯片封装件

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant