CN210780504U - Voltage conversion device - Google Patents
Voltage conversion device Download PDFInfo
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- CN210780504U CN210780504U CN201921479362.8U CN201921479362U CN210780504U CN 210780504 U CN210780504 U CN 210780504U CN 201921479362 U CN201921479362 U CN 201921479362U CN 210780504 U CN210780504 U CN 210780504U
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Abstract
The utility model belongs to the technical field of the converter technique and specifically relates to a voltage conversion device, including current sampling circuit output, AD mouth signal input end, be connected with resistance R1 at current sampling circuit output, at resistance R1's tip parallel resistance R2, resistance R5 and AD signal input end, wherein resistance R2's the other end voltage is pressed and is pulled to the required positive voltage maximum value of analog quantity AD mouth input end, and resistance R5's the other end is connected to GND the utility model discloses a voltage conversion device who obtains, it has following advantage ① low cost, and topological structure is simple, only increases a resistance, and the PCB board changes very little, and ② preceding stage circuit need not to do any change, and the interface realizes complete compatibility.
Description
Technical Field
The utility model belongs to the technical field of the converter technique and specifically relates to a current sampling circuit and MCU analog quantity AD mouth sampling voltage conversion equipment for converter.
Background
At present, the MCU (or DSP) is widely applied and is used as a core control unit in a plurality of electronic products, such as a frequency converter. However, the design ideas of the sampling circuits of the AD ports of the MCU (or DSP) of different manufacturers are different, and the input voltage range of the AD port is mostly 0-5V, 0-3.3V, 0-3V and the like. When MCU (or DSP) of different models is replaced, the input range change of analog quantity of AD port needs to be considered, and proper adjustment is made.
In the prior art, for the above adjustment, engineers generally consider directly changing the voltage of the previous stage circuit to adapt to the new AD sampling range. This involves a relatively large number of circuits, especially for ac signals with + and-levels of the current sampling circuit for the frequency converter, since a dc bias circuit is necessary for the AD port, which requires the ac voltage to be boosted. Taking the case of converting-3.3V- +3.3V to 0- +3.3V, the dc bias circuit is generally designed as shown in fig. 1, wherein the ac signal is boosted to become a dc signal with +1.65V as the center point, all signals are above 0V, although the signals are dc signals, but the signals contain ac components, which is equivalent to superimposing a dc voltage. The voltage sampling range of the AD port of the MCU (or DSP) is 0 to +3.3V, if another MCU (or DSP) with the voltage sampling range of the AD port being 0 to +3V is to be replaced, the designed circuit is generally as shown in figure 2, or other means are utilized to directly convert-3.3V to +3.3V into-3V to +3V at the front stage. Such a method has the following disadvantages:
1. the increased cost is more, and an operational amplifier and peripheral devices are added;
2. a relatively large space needs to be left on the circuit PCB board for amplifying the devices, and the circuit board is relatively large in change.
3. Some devices (such as a current sampling circuit for a frequency converter) -3.3V- +3.3V are placed on another circuit board, and if the device parameters on the other circuit board are selected to be changed, the situation that the circuit board interfaces are incompatible occurs.
SUMMERY OF THE UTILITY MODEL
The utility model aims at solving the not enough of above-mentioned technique and providing a converter is with electric current sampling circuit and MCU analog quantity AD mouth sampling voltage conversion equipment, can effectively convert the analog quantity AD mouth sampling voltage who takes direct current off-set.
In order to achieve the above object, the utility model discloses a current sampling circuit and MCU analog quantity AD mouth sampling voltage conversion equipment for converter, including the current sampling circuit output, AD mouth signal input end, be connected with resistance R1 at current sampling circuit output, at resistance R1's tip parallel resistance R2, resistance R5 and AD signal input end, wherein pull the required positive voltage maximum value of analog quantity AD mouth input end on resistance R2's the other end voltage, resistance R5's the other end is connected to GND.
When the sampling voltage between the current sampling circuit and the MCU analog quantity AD port is converted from-3.3V- +3.3V to 0- +3V, the voltage at the other end of the resistor R2 is pulled up to +3V, and the resistance ratio of the resistor R1 to the resistor R2 to the resistor R5 is 1.1: 1: 11.
the principle of the technical scheme is as follows: the algebraic sum of the currents at any node in the circuit is 0. First, the input impedance of the AD port of the MCU (or DSP) is very high, the resistance approaches infinity, so the current flowing to the AD port is negligible, and the remaining current has only 3 channels, as shown in fig. 3, i.e. Ia + Ib + Ic = 0. By this principle, it can be calculated that the conversion from-3.3V- +3.3V to 0- +3V can be realized by taking the resistance value as shown in the above figure.
The specific calculation formula is as follows:
Ia+Ib+Ic =(IU-IU_AD)/1.1 + (3-IU_AD)/1+ (0-IU_AD)/11=0
examples are: we IU took 3 voltage points: 3.3V, 0V and-3.3V, see what voltage IU _ AD gets.
① IU =3.3V, the formula is (3.3-IU _ AD)/1.1 + (3-IU _ AD)/1+ (0-IU _ AD)/11=0,
calculating IU _ AD = 3V;
② IU =0V, the formula is (0-IU _ AD)/1.1 + (3-IU _ AD)/1+ (0-IU _ AD)/11=0,
calculating IU _ AD = 1.5V;
③ IU = -3.3V, formula is (-3.3-IU _ AD)/1.1 + (3-IU _ AD)/1+ (0-IU _ AD)/11=0,
IU _ AD =0V was calculated.
When the sampling voltage between the current sampling circuit and the MCU analog quantity AD port is converted from-5V- +5V to 0- +3.3V, the voltage at the other end of the resistor R2 is pulled up to +3.3V, and the resistance ratio of the resistor R1, the resistor R2 and the resistor R5 is 5: 3.3: 9.7.
when the sampling voltage between the current sampling circuit and the MCU analog quantity AD port is converted from-5V- +5V to 0- +3V, the voltage at the other end of the resistor R2 is pulled up to +3V, and the resistance ratio of the resistor R1, the resistor R2 and the resistor R5 is 5: 3: 7.5.
the utility model provides a current sampling circuit and MCU analog quantity AD mouth sampling voltage conversion equipment for converter, it has ① low cost, and topological structure is simple, only increases a resistance, and the PCB board changes very little, ② preceding stage circuit need not to make any change, and the interface realizes completely compatible.
Drawings
FIG. 1 is a circuit diagram of a prior art converter for converting a current sampling voltage of-3.3V- +3.3V of a frequency converter to 0- +3.3V required by an AD port;
FIG. 2 is a circuit diagram of a prior art converter for converting a current sampling voltage of-3.3V- +3.3V to 0- +3V required by an AD port;
FIG. 3 is a schematic diagram of the calculation principle of the present invention;
fig. 4 is a circuit diagram of embodiment 1 of the present invention;
fig. 5 is a circuit diagram of embodiment 2 of the present invention;
fig. 6 is a circuit diagram of embodiment 3 of the present invention.
Detailed Description
The invention is further described by the following embodiments in conjunction with the accompanying drawings.
Example 1:
as shown in fig. 4, the current sampling circuit and MCU analog AD port sampling voltage conversion device for a frequency converter described in this embodiment includes a current sampling circuit output terminal, an AD port signal input terminal, a resistor R1 connected to the current sampling circuit output terminal, a resistor R2, a resistor R5, and an AD signal input terminal connected in parallel to the end of the resistor R1, wherein the other terminal of the resistor R2 is pulled up to the maximum positive voltage required by the analog AD port input terminal, and the other terminal of the resistor R5 is connected to GND.
When the sampling voltage between the current sampling circuit and the MCU analog quantity AD port is converted from-3.3V- +3.3V to 0- +3V, the voltage at the other end of the resistor R2 is pulled up to +3V, and the resistance ratio of the resistor R1 to the resistor R2 to the resistor R5 is 1.1: 1: 11, specifically: the resistance of the resistor R1 is 1.1K, the resistance of the resistor R2 is 1K, and the resistance of the resistor R5 is 11K.
Example 2:
as shown in fig. 5, the current sampling circuit and MCU analog AD port sampling voltage conversion device for a frequency converter described in this embodiment includes a current sampling circuit output terminal, an AD port signal input terminal, a resistor R1 connected to the current sampling circuit output terminal, a resistor R2, a resistor R5, and an AD signal input terminal connected in parallel to the end of the resistor R1, wherein the other terminal of the resistor R2 is pulled up to the maximum positive voltage required by the analog AD port input terminal, and the other terminal of the resistor R5 is connected to GND.
When the sampling voltage between the current sampling circuit and the MCU analog quantity AD port is converted from-5V- +5V to 0- +3.3V, the voltage at the other end of the resistor R2 is pulled up to +3.3V, and the resistance ratio of the resistor R1, the resistor R2 and the resistor R5 is 5: 3.3: 9.7, specifically: the resistance of the resistor R1 is 5K, the resistance of the resistor R2 is 3.3K, and the resistance of the resistor R5 is 9.7K.
Example 3:
as shown in fig. 6, the current sampling circuit and MCU analog AD port sampling voltage conversion device for a frequency converter described in this embodiment includes a current sampling circuit output terminal, an AD port signal input terminal, a resistor R1 connected to the current sampling circuit output terminal, a resistor R2, a resistor R5, and an AD signal input terminal connected in parallel to the end of the resistor R1, wherein the other terminal of the resistor R2 is pulled up to the maximum positive voltage required by the analog AD port input terminal, and the other terminal of the resistor R5 is connected to GND.
When the sampling voltage between the current sampling circuit and the MCU analog quantity AD port is converted from-5V- +5V to 0- +3V, the voltage at the other end of the resistor R2 is pulled up to +3V, and the resistance ratio of the resistor R1, the resistor R2 and the resistor R5 is 5: 3: 7.5, specifically: the resistance of the resistor R1 is 5K, the resistance of the resistor R2 is 3K, and the resistance of the resistor R5 is 7.5K.
Claims (4)
1. A voltage conversion device is characterized in that: the device comprises a current sampling circuit output end and an AD port signal input end, wherein the current sampling circuit output end is connected with a resistor R1, the end part of a resistor R1 is connected with a resistor R2, a resistor R5 and the AD signal input end in parallel, the other end of the resistor R2 is pulled up to the maximum positive voltage value required by the analog AD port input end, and the other end of the resistor R5 is connected to GND.
2. A voltage conversion device according to claim 1, wherein: when the sampling voltage between the current sampling circuit and the MCU analog quantity AD port is converted from-3.3V- +3.3V to 0- +3V, the voltage at the other end of the resistor R2 is pulled up to +3V, and the resistance ratio of the resistor R1 to the resistor R2 to the resistor R5 is 1.1: 1: 11.
3. a voltage conversion device according to claim 1, wherein: when the sampling voltage between the current sampling circuit and the MCU analog quantity AD port is converted from-5V- +5V to 0- +3.3V, the voltage at the other end of the resistor R2 is pulled up to +3.3V, and the resistance ratio of the resistor R1, the resistor R2 and the resistor R5 is 5: 3.3: 9.7.
4. a voltage conversion device according to claim 1, wherein: when the sampling voltage between the current sampling circuit and the MCU analog quantity AD port is converted from-5V- +5V to 0- +3V, the voltage at the other end of the resistor R2 is pulled up to +3V, and the resistance ratio of the resistor R1, the resistor R2 and the resistor R5 is 5: 3: 7.5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921479362.8U CN210780504U (en) | 2019-09-06 | 2019-09-06 | Voltage conversion device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921479362.8U CN210780504U (en) | 2019-09-06 | 2019-09-06 | Voltage conversion device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210780504U true CN210780504U (en) | 2020-06-16 |
Family
ID=71050311
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201921479362.8U Expired - Fee Related CN210780504U (en) | 2019-09-06 | 2019-09-06 | Voltage conversion device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN210780504U (en) |
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2019
- 2019-09-06 CN CN201921479362.8U patent/CN210780504U/en not_active Expired - Fee Related
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20200616 |