CN106773910A - A kind of high linearity difference isolates sample circuit - Google Patents
A kind of high linearity difference isolates sample circuit Download PDFInfo
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- CN106773910A CN106773910A CN201611059718.3A CN201611059718A CN106773910A CN 106773910 A CN106773910 A CN 106773910A CN 201611059718 A CN201611059718 A CN 201611059718A CN 106773910 A CN106773910 A CN 106773910A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
- G05B19/0425—Safety, monitoring
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/26—Pc applications
- G05B2219/2612—Data acquisition interface
Abstract
The present invention relates to a kind of High Linear difference isolation sample circuit, specifically a kind of high linearity difference isolation sample circuit.Can be applied to high-power electric power network altogether, full voltage range linearity zero error and the difference with sampling precision higher isolation sample circuit.High linearity difference of the invention isolates sample circuit, including impedance isolated form differential amplifier circuit, voltage matches filter circuit, voltage clamp circuit, AD Acquisition Circuit, high-speed figure isolation circuit and digital control circuit；The impedance isolated form differential amplifier circuit input point to be sampled with power electronics main circuit is connected；The impedance isolated form differential amplifier circuit output end is connected with voltage matches filter circuit input, and the voltage matches filter circuit output end is connected with voltage clamp circuit input；The voltage clamp circuit output end is connected with AD Acquisition Circuit input, and the AD Acquisition Circuit output end is connected with high-speed isolated circuit input end, and the high-speed isolated circuit output end is connected with digital control circuit input.
Description
Technical field
Can be used for the high linearity AD sample circuits of complex electromagnetic environment, a kind of high linearity the present invention relates to a kind of
Difference isolates sample circuit, including：Impedance isolated form differential amplifier circuit, voltage matches filter circuit, voltage clamp circuit, AD
Acquisition Circuit, high-speed isolated circuit and digital control circuit, belong to power electronics Sampling techniques field.
Background technology
Because power electronics main circuit is different with digital control circuit voltage class, size of current is also different, it is necessary to
Power electronics main circuit and digital control circuit are carried out into electrical isolation.
In the prior art, the sampling of power electronics main circuit voltage x current is general uses electric resistance partial pressure, passing ratio to amplify
Circuit carries out impedance transformation and voltage conversion, then linear optocoupler carries out electrical isolation, by AD conversion chip by analog signal
Data signal is converted into, AD conversion result is passed into single-chip microcomputer or DSP digitial controllers.
It is that sampling linearity has certain mistake in full voltage range that known power electronics sample circuit is primarily present problem
Sampling is inclined caused by ground potential of being sampled altogether under the conditions of sample precision is not high and high-power in difference, full voltage range is unstable
Difference.
The content of the invention
The present invention be directed to the deficiency that prior art is present, propose that one kind can be applied to high-power electric power network altogether, complete
Voltage range linearity zero error and the isolation sample circuit of the difference with sampling precision higher.
The present invention specifically provides a kind of high linearity difference isolation sample circuit, including：Impedance isolated form differential amplification electricity
Road, voltage matches filter circuit, voltage clamp circuit, AD Acquisition Circuit, high-speed isolated circuit and digital control circuit；
The impedance isolated form differential amplifier circuit include electric capacity C1, resistance R1, resistance R2, diode D1, diode D2,
Resistance R3, resistance R4 and operational amplifier U1A；Described electric capacity C1 one end is used as sample circuit input cathode, the electric capacity C1
The other end as sample circuit input anode, one end of the electric capacity C1 is connected with one end of the resistance R1, the electricity
The other end for holding C1 is connected with one end of resistance R2；The other end of the resistance R1 and the positive ends of diode D1, resistance R4
One end, operational amplifier U1A inverting input connection；The other end of the resistance R2 and the negative polarity end of diode D2,
The in-phase input end connection of one end and operational amplifier U1A of resistance R3；The negative polarity end of the diode D1 and the positive VCC of power supply
Connection, the positive ends VEE negative with power supply of the diode D2 is connected；The other end ground connection of the resistance R3, the resistance R4
Another termination operational amplifier U1A output end and one end of resistance R5；
The voltage matches filter circuit includes resistance R5, resistance R6, electric capacity C2, operational amplifier U1B；The resistance R5
The in-phase input end of one end, one end of electric capacity C2 and operational amplifier U1B of other end connection resistance R6；The resistance R6's is another
One end is grounded, the other end ground connection of the electric capacity C2；The inverting input of the operational amplifier U1B and operational amplifier U1B
Output end connection；
The voltage clamp circuit includes resistance R7 and clamper tube D3；One end of the resistance R7 and operational amplifier U1B
Output end connection, one end of the other end connection clamper tube D3 of the resistance R7, the other end ground connection of clamper tube D3；
The AD Acquisition Circuit includes AD acquisition chips and reference voltage source X1, and wherein AD acquisition chips have multi-channel analog
Input；The analog input end all the way of the AD acquisition chips connects the other end of the resistance R7, the AD acquisition chips
The positive ends of the positive connection reference voltage X1 of benchmark input, the negative connection reference voltage source X1 of benchmark input of the AD acquisition chips
Negative polarity end；
The high-speed isolated circuit includes input and output end, for the output signal of AD acquisition chips to be transmitted into number
Word control circuit, to realize the electrical isolation of AD acquisition chips and digital control circuit；The high-speed isolated digital circuit input
End DD1~DDn connections corresponding with the data output interface D1~Dn of the AD acquisition chips；
The digital control circuit has an IO digital interfaces, and IO digital interfaces and the high-speed figure isolation circuit
Output end correspondence is connected；
The impedance isolated form differential amplifier circuit input as sample circuit input.
Further, described impedance isolated form differential amplifier circuit, voltage matches filter circuit and voltage clamp circuit
Constitute difference sampling all the way；Difference sampling described in multichannel is while corresponding with the multi-channel analog input of the AD acquisition chips connect
Connect.
The span of the further electric capacity C1 is 0~100uf.
The further resistance R1 and resistance R2 spans are 10K to 500M Ω.
Further, the clamp voltage span of the clamper tube D3 is 1V to VCC.
Reference voltage source X1 in the present invention is used to provide reference voltage level for the AD acquisition chips.The present invention is by resistance
The anti-larger impedance of isolated form differential amplifier circuit input realizes that analog acquisition circuit is isolated with the impedance of power electronics main circuit,
And can realize sampling power electronics main circuit multiple spot difference, it is to avoid the conventional inconsistent sampling for causing of ground potential of sampling altogether is inclined
Difference；Sampled analogue signals feeding AD, again through voltage clamping, is gathered electricity by differential amplifier circuit output by voltage matches and filtering
Road；Data signal is converted analog signals into by AD Acquisition Circuit；AD Acquisition Circuit signal output or input digital level warp
Cross high-speed figure amount isolation circuit and realize that sample circuit is completely isolated with digital control circuit, due to straight using AD Acquisition Circuit
Connect and power electronics main circuit analog quantity is sampled, be not in linearity error that conventional linear optocoupler brings, sampling precision
Also (sampling precision is by selected ADC acquisition chips restriction) is greatly improved, so as to realize to power electronics main circuit full voltage
The isolation collection of scope high linearity.
Brief description of the drawings
Fig. 1 is high linearity difference isolation sampling structure schematic diagram of the invention；
Fig. 2 is the circuit theory diagrams of the high linearity difference isolation sampling that first embodiment of the invention is provided；
Fig. 3 is the circuit theory diagrams of the high linearity difference isolation sampling that second embodiment of the invention is provided；
Specific embodiment
Further illustrate technical scheme below in conjunction with the accompanying drawings and by specific embodiment.
First embodiment
Fig. 1 and 2 is the high linearity difference isolation sampling structure schematic diagram that first embodiment of the invention is provided.This structure chart
Including：
A kind of high linearity difference isolation sample circuit is provided, including：Impedance isolated form differential amplifier circuit, voltage matches
Filter circuit, voltage clamp circuit, AD Acquisition Circuit, high-speed isolated circuit and digital control circuit；
The impedance isolated form differential amplifier circuit include electric capacity C1, resistance R1, resistance R2, diode D1, diode D2,
Resistance R3, resistance R4 and operational amplifier U1A；Described electric capacity C1 one end is used as sample circuit input cathode, the electric capacity C1
The other end as sample circuit input anode, one end of the electric capacity C1 is connected with one end of the resistance R1, the electricity
The other end for holding C1 is connected with one end of resistance R2；The other end of the resistance R1 and the positive ends of diode D1, resistance R4
One end, operational amplifier U1A inverting input connection；The other end of the resistance R2 and the negative polarity end of diode D2,
The in-phase input end connection of one end and operational amplifier U1A of resistance R3；The negative polarity end of the diode D1 and the positive VCC of power supply
Connection, the positive ends VEE negative with power supply of the diode D2 is connected；The other end ground connection of the resistance R3, the resistance R4
Another termination operational amplifier U1A output end and one end of resistance R5；
The voltage matches filter circuit includes resistance R5, resistance R6, electric capacity C2, operational amplifier U1B；The resistance R5
The in-phase input end of one end, one end of electric capacity C2 and operational amplifier U1B of other end connection resistance R6；The resistance R6's is another
One end is grounded, the other end ground connection of the electric capacity C2；The inverting input of the operational amplifier U1B and operational amplifier U1B
Output end connection；
The voltage clamp circuit includes resistance R7 and clamper tube D3；One end of the resistance R7 and operational amplifier U1B
Output end connection, one end of the other end connection clamper tube D3 of the resistance R7, the other end ground connection of clamper tube D3；
The AD Acquisition Circuit includes AD acquisition chips and reference voltage source X1, and wherein AD acquisition chips have multi-channel analog
Input；The analog input end all the way of the AD acquisition chips connects the other end of the resistance R7, the AD acquisition chips
The positive ends of the positive connection reference voltage X1 of benchmark input, the negative connection reference voltage source X1 of benchmark input of the AD acquisition chips
Negative polarity end；
The high-speed isolated circuit includes input and output end, for the output signal of AD acquisition chips to be transmitted into number
Word control circuit, to realize the electrical isolation of AD acquisition chips and digital control circuit；The high-speed isolated digital circuit input
End DD1~DDn connections corresponding with the data output interface D1~Dn of the AD acquisition chips；
The digital control circuit has an IO digital interfaces, and IO digital interfaces and the high-speed figure isolation circuit
Output end correspondence is connected；
The impedance isolated form differential amplifier circuit input as sample circuit input.
Further, described impedance isolated form differential amplifier circuit, voltage matches filter circuit and voltage clamp circuit
Constitute difference sampling all the way；Difference sampling described in multichannel is while corresponding with the multi-channel analog input of the AD acquisition chips connect
Connect.
The span of the further electric capacity C1 is 0~100uf.
The further resistance R1 and resistance R2 spans are 10K to 500M Ω.
Further, the clamp voltage span of the clamper tube D3 is 1V to VCC.
The sampled voltage of circuit to be sampled is connected to impedance isolated form differential amplifier circuit input CH1GND and CHIN, warp
Crossing the electric capacity C1 carries out differential filtering, through the resistance R1, resistance R2, resistance R3, resistance R4 and affiliated operational amplifier U1A
Composition difference isolating amplifier circuit, due to the resistance R1 and resistance R2 resistances be not less than 10K so that the sample circuit with
Power electronics main circuit forms one-level impedance isolation, the impedance isolated form differential amplifier circuit output end voltage and input electricity
Pressure relation is (condition：R4/R1=R3/R2)
V_OUT=(R4/R1) * (VCH1IN-VCH1GND)=(R3/R2) * (VCH1IN-VCH1GND)
The first amplifier output end voltage V_OUT carries out electric resistance partial pressure through the resistance R5R5 and resistance R6, makes output
Voltage is consistent with the AD acquisition chips U001 input voltage ranges, and voltage passes through after the resistance R5 and the resistance R6 partial pressures
The electric capacity C2 carries out smothing filtering and carries out impedance transformation through second amplifier composition voltage follower again, makes second fortune
Put output end strictly follow the resistance R5 and with the resistance R6 partial pressure values；The second amplifier output end voltage is through the electricity
Resistance R7 and clamper tube D3 composition clamp circuits, by AD acquisition chips U001 input terminal voltages control in zone of reasonableness
It is interior, it is ensured that the AD acquisition chips U001 steady operations.
The AD acquisition chips U001 is inputted analog voltage carries out analog-to-digital conversion, is converted into data signal, then through institute
Stating high-speed figure isolation circuit and simulating ground and line related network carries out electrical isolation, protects the single-chip microcomputer or DSP numerals
Control circuit, it is ensured that single-chip microcomputer or the reliable and stable work of digital control circuit, the single-chip microcomputer or DSP digital control circuits and institute
Discrete magnitude signal enters row data communication after stating the isolation of high-speed figure isolation circuit, AD sampled results is read, so as to finally collect
Power electronics main circuit voltage to be sampled.
Second embodiment
Fig. 3 is the high linearity difference isolation sample circuit schematic diagram that second embodiment of the invention is provided.The present embodiment is
Multi-channel differential isolates sample circuit.
Further, the multichannel impedance isolated form differential amplifier circuit include the anti-isolated form differential amplifier circuit of n roadlocks,
N roads voltage matches filter circuit, n roads voltage clamp circuit, n roads AD Acquisition Circuit (can share same AD acquisition chips), n roads are high
Speed digital isolation circuit (same high-speed isolated chip can be shared) and all the way single-chip microcomputer or DSP digital control circuits.
The anti-isolated form differential amplifier circuit output end of n roadlocks is connected with n roads voltage matches filter circuit input, institute
State n roads voltage matches filter circuit output end to be connected with n roads voltage clamp circuit input, n roads voltage clamp circuit is defeated
Go out end and be connected to AD Acquisition Circuit input described in multichannel, the AD Acquisition Circuit output end be connected to the high-speed figure every
From circuit, the high-speed figure isolation circuit output end is connected to the I/O port of single-chip microcomputer or DSP digital control circuits.
The anti-isolated form differential amplifier circuit of n roadlocks, n roads voltage matches filter circuit, n roads voltage clamp circuit, n roads
AD Acquisition Circuit (same AD acquisition chips can be shared), n roads high-speed figure isolation circuit (same high-speed isolated chip can be shared),
It is consistent with same names circuit theory and circuit parameter in second embodiment per circuit structure all the way.
The output end of the reference voltage source will be equal to the reference voltage level of the AD acquisition chips U001.
The span of the electric capacity C1 is 0~100uf.
The resistance R1 and resistance R2 spans are 10K to 500M Ω.
The clamp voltage span of the clamper tube D3 is 1V to VCC.
Power electronics main circuit voltage to be sampled be connected to impedance isolated form differential amplifier circuit input CH1GND and
CHIN, differential filtering is carried out by the electric capacity C1, is put through the resistance R1, resistance R2, resistance R3, resistance R4 and affiliated computing
Big device U1A composition difference isolating amplifier circuits, because the resistance R1 and resistance R2 resistances are not less than 10K so that described to adopt
Sample circuit and power electronics main circuit form one-level impedance isolate, the impedance isolated form differential amplifier circuit output end voltage and
Input terminal voltage relation is (condition：R4/R1=R3/R2)
V_OUT=(R4/R1) * (VCH1IN-VCH1GND)=(R3/R2) * (VCH1IN-VCH1GND)
The first amplifier output end voltage V_OUT carries out electric resistance partial pressure through the resistance R5 and resistance R6, makes output electricity
Pressure is consistent with the AD acquisition chips U001 input voltage ranges, and voltage is by institute after the resistance R5 and the resistance R6 partial pressures
State electric capacity C2 carry out smothing filtering again through second amplifier composition voltage follower carry out impedance transformation, make second amplifier
Output end strictly follows the resistance R5 and the resistance R6 partial pressure values；The second amplifier output end voltage is through the resistance R7
Clamp circuit is constituted with the clamper tube D3, by AD acquisition chips U001 input terminal voltages control in the reasonable scope, is protected
Demonstrate,prove the AD acquisition chips U001 steady operations.
The AD acquisition chips U001 is inputted analog voltage carries out analog-to-digital conversion, is converted into data signal, then through institute
Stating high-speed figure isolation circuit and simulating ground and line related network carries out electrical isolation, protects the single-chip microcomputer or DSP numerals
Control circuit, it is ensured that single-chip microcomputer or the reliable and stable work of digital control circuit, the single-chip microcomputer or DSP digital control circuits and institute
Discrete magnitude signal enters row data communication after stating the isolation of high-speed figure isolation circuit, AD sampled results is read, so as to finally collect
Power electronics main circuit voltage to be sampled.
Each embodiment in this specification is described by the way of progressive, what each embodiment was stressed be with
The difference of other embodiment, same or analogous part between each embodiment mutually referring to.
The preferred embodiments of the present invention are the foregoing is only, is not intended to limit the invention, for those skilled in the art
For, the present invention can have various changes and change.It is all any modifications made within spirit and principles of the present invention, equivalent
Replace, improve etc., should be included within the scope of the present invention.
Claims (5)
1. a kind of high linearity difference isolates sample circuit, including impedance isolated form differential amplifier circuit, voltage matches filtered electrical
Road, voltage clamp circuit, AD Acquisition Circuit, high-speed isolated circuit and digital control circuit；
The impedance isolated form differential amplifier circuit includes electric capacity C1, resistance R1, resistance R2, diode D1, diode D2, resistance
R3, resistance R4 and operational amplifier U1A；Described electric capacity C1 one end is used as sample circuit input cathode, and the electric capacity C1's is another
One end is connected as sample circuit input anode, one end of the electric capacity C1 with one end of the resistance R1, the electric capacity C1
The other end be connected with one end of resistance R2；The other end of the resistance R1 and the positive ends of diode D1, the one of resistance R4
End, the inverting input connection of operational amplifier U1A；The other end of the resistance R2 and negative polarity end, the resistance of diode D2
The in-phase input end connection of one end and operational amplifier U1A of R3；The negative polarity end of diode D1 VCC positive with power supply connects
Connect, the positive ends VEE negative with power supply of the diode D2 is connected；The other end ground connection of the resistance R3, the resistance R4's
The output end of another termination operational amplifier U1A and one end of resistance R5；
The voltage matches filter circuit includes resistance R5, resistance R6, electric capacity C2, operational amplifier U1B；The resistance R5 is another
End connects the in-phase input end of one end, one end of electric capacity C2 and operational amplifier U1B of resistance R6；The other end of the resistance R6
Ground connection, the other end ground connection of the electric capacity C2；The inverting input of the operational amplifier U1B is defeated with operational amplifier U1B
Go out end connection；
The voltage clamp circuit includes resistance R7 and clamper tube D3；One end of the resistance R7 is defeated with operational amplifier U1B
Go out end connection, one end of the other end connection clamper tube D3 of the resistance R7, the other end ground connection of clamper tube D3；
The AD Acquisition Circuit includes AD acquisition chips and reference voltage source X1, and there is wherein AD acquisition chips multi-channel analog to be input into
End；The analog input end all the way of the AD acquisition chips connects the other end of the resistance R7, the benchmark of the AD acquisition chips
The positive ends of the positive connection reference voltage X1 of input, the negative connection reference voltage source X1's of benchmark input of the AD acquisition chips is negative
Polar end；
The high-speed isolated circuit includes input and output end, for the output signal of AD acquisition chips to be transmitted into digital control
Circuit processed, to realize the electrical isolation of AD acquisition chips and digital control circuit；The high-speed isolated digital circuit input DD1
~DDn connections corresponding with the data output interface D1~Dn of the AD acquisition chips；
The digital control circuit has an IO digital interfaces, and IO digital interfaces and the high-speed figure isolation circuit output
End correspondence connection；
The impedance isolated form differential amplifier circuit input as sample circuit input.
2. a kind of high linearity difference according to claim 1 isolates sample circuit, it is characterised in that：Described impedance every
Release differential amplifier circuit, voltage matches filter circuit and voltage clamp circuit constitute difference sampling all the way；Difference described in multichannel
Divide sampling connection corresponding with the multi-channel analog input of the AD acquisition chips simultaneously.
3. a kind of high linearity difference according to claim 1 isolates sample circuit, it is characterised in that：The electric capacity C1's
Span is 0~100uf.
4. a kind of high linearity difference according to claim 1 isolates sample circuit, it is characterised in that：The resistance R1 and
Resistance R2 spans are 10K to 500M Ω.
5. a kind of high linearity difference according to claim 1 isolates sample circuit, it is characterised in that：The clamper tube D3
Clamp voltage span be 1V to VCC.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611059718.3A CN106773910B (en) | 2016-11-22 | 2016-11-22 | A kind of high linearity difference isolation sample circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611059718.3A CN106773910B (en) | 2016-11-22 | 2016-11-22 | A kind of high linearity difference isolation sample circuit |
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| Publication Number | Publication Date |
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| CN106773910A true CN106773910A (en) | 2017-05-31 |
| CN106773910B CN106773910B (en) | 2019-05-21 |
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| CN201611059718.3A Active CN106773910B (en) | 2016-11-22 | 2016-11-22 | A kind of high linearity difference isolation sample circuit |
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| CN108802446A (en) * | 2018-07-11 | 2018-11-13 | 杭州电子科技大学 | A kind of industrial robot controller busbar voltage detection circuit |
| CN110673052A (en) * | 2019-10-18 | 2020-01-10 | 湖南小步科技有限公司 | SOC estimation method and device of power battery and battery management system |
| CN110967540A (en) * | 2019-12-12 | 2020-04-07 | 中国电子科技集团公司第四十四研究所 | Isolated linear detection circuit with adjustable transmission coefficient and module comprising same |
| CN111879997A (en) * | 2020-07-31 | 2020-11-03 | 中国人民解放军海军工程大学 | High-voltage input current output isolated type and high-precision voltage sensor |
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| CN111879997A (en) * | 2020-07-31 | 2020-11-03 | 中国人民解放军海军工程大学 | High-voltage input current output isolated type and high-precision voltage sensor |
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| Publication number | Publication date |
|---|---|
| CN106773910B (en) | 2019-05-21 |
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