CN106773910B - A kind of high linearity difference isolation sample circuit - Google Patents
A kind of high linearity difference isolation sample circuit Download PDFInfo
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- CN106773910B CN106773910B CN201611059718.3A CN201611059718A CN106773910B CN 106773910 B CN106773910 B CN 106773910B CN 201611059718 A CN201611059718 A CN 201611059718A CN 106773910 B CN106773910 B CN 106773910B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
- G05B19/0425—Safety, monitoring
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/26—Pc applications
- G05B2219/2612—Data acquisition interface
Abstract
The present invention relates to a kind of High Linear difference, and sample circuit is isolated, and sample circuit is isolated in specifically a kind of high linearity difference.It can be applied to high-power electric power network altogether, full voltage range linearity zero error and the difference isolation sample circuit with higher sampling precision.Sample circuit, including impedance isolated form differential amplifier circuit, voltage matches filter circuit, voltage clamp circuit, AD Acquisition Circuit, high-speed figure isolation circuit and digital control circuit is isolated in high linearity difference of the invention；The impedance isolated form differential amplifier circuit input terminal and power electronics main circuit point to be sampled connect；The impedance isolated form differential amplifier circuit output end is connect with voltage matches filter circuit input terminal, and the voltage matches filter circuit output end is connect with voltage clamp circuit input terminal；The voltage clamp circuit output end is connect with AD Acquisition Circuit input terminal, and the AD Acquisition Circuit output end is connect with high-speed isolated circuit input end, and the high-speed isolated circuit output end is connect with digital control circuit input terminal.
Description
Technical field
The present invention relates to a kind of high linearity AD sample circuit that can be used for complex electromagnetic environment, a kind of high linearities
Sample circuit is isolated in difference, comprising: impedance isolated form differential amplifier circuit, voltage matches filter circuit, voltage clamp circuit, AD
Acquisition Circuit, high-speed isolated circuit and digital control circuit belong to power electronics sampling technique field.
Background technique
Since power electronics main circuit and digital control circuit voltage class are different, size of current is also different, it is necessary to
Power electronics main circuit and digital control circuit are subjected to electrical isolation.
In the prior art, power electronics main circuit voltage and current sampling generally uses electric resistance partial pressure, passes through ratio enlargement
Circuit carries out impedance transformation and voltage conversion, then linear optocoupler carries out electrical isolation, by AD conversion chip by analog signal
It is converted into digital signal, AD conversion result is passed into single-chip microcontroller or DSP digitial controller.
It is that sampling linearity has certain miss in full voltage range that well known power electronics sample circuit, which is primarily present problem,
It is inclined that the unstable caused sampling of ground potential is sampled under the conditions of sample precision is not high and high-power in difference, full voltage range altogether
Difference.
Summary of the invention
The present invention be directed to the shortcomings of the prior art, propose that one kind can be applied to high-power electric power network altogether, complete
Voltage range linearity zero error simultaneously there is the difference of higher sampling precision sample circuit is isolated.
The present invention specifically provides a kind of high linearity difference isolation sample circuit, comprising: impedance isolated form differential amplification electricity
Road, voltage matches filter circuit, voltage clamp circuit, AD Acquisition Circuit, high-speed isolated circuit and digital control circuit；
The impedance isolated form differential amplifier circuit include capacitor C1, resistance R1, resistance R2, diode D1, diode D2,
Resistance R3, resistance R4 and operational amplifier U1A；The one end the capacitor C1 is as sample circuit input cathode, the capacitor C1
The other end as sample circuit input anode, one end of the capacitor C1 is connect with one end of the resistance R1, the electricity
The other end for holding C1 is connect with one end of resistance R2；The other end of the resistance R1 and positive ends, the resistance R4 of diode D1
One end, operational amplifier U1A inverting input terminal connection；The negative polarity end of the other end of the resistance R2 and diode D2,
One end of resistance R3 is connected with the non-inverting input terminal of operational amplifier U1A；The negative polarity end of the diode D1 and the positive VCC of power supply
Connection, the positive ends of the diode D2 are connect with the negative VEE of power supply；The other end of the resistance R3 is grounded, the resistance R4
Another termination operational amplifier U1A output end and resistance R5 one end；
The voltage matches filter circuit includes resistance R5, resistance R6, capacitor C2, operational amplifier U1B；The resistance R5
One end, one end of capacitor C2 and the non-inverting input terminal of operational amplifier U1B of other end connection resistance R6；The resistance R6's is another
One end ground connection, the other end ground connection of the capacitor C2；The inverting input terminal and operational amplifier U1B of the operational amplifier U1B
Output end connection；
The voltage clamp circuit includes resistance R7 and clamper tube D3；One end of the resistance R7 and operational amplifier U1B
Output end connection, the resistance R7 the other end connection clamper tube D3 one end, clamper tube D3 the other end ground connection；
The AD Acquisition Circuit includes AD acquisition chip and reference voltage source X1, and wherein AD acquisition chip has multi-channel analog
Input terminal；The analog input end all the way of the AD acquisition chip connects the other end of the resistance R7, the AD acquisition chip
The positive ends of the positive connection reference voltage X1 of benchmark input, the negative connection reference voltage source X1 of benchmark input of the AD acquisition chip
Negative polarity end；
The high-speed isolated circuit includes input terminal and output end, for the output signal of AD acquisition chip to be transmitted to number
Word control circuit, to realize the electrical isolation of AD acquisition chip and digital control circuit；The high-speed isolated digital circuit input
Data output interface D1~Dn of end DD1~DDn and the AD acquisition chip are correspondingly connected with；
The digital control circuit has an IO digital interface, and IO digital interface and the high-speed figure isolation circuit
Output end is correspondingly connected with；
Input terminal of the impedance isolated form differential amplifier circuit input terminal as sample circuit.
Further, impedance isolated form differential amplifier circuit, voltage matches filter circuit and the voltage clamp circuit
Difference all the way is constituted to sample；The sampling of difference described in multichannel is corresponding with the multi-channel analog input terminal of the AD acquisition chip simultaneously to be connected
It connects.
The value range of the further capacitor C1 is 0~100uf.
The further resistance R1 and resistance R2 value range are 10K to 500M Ω.
Further, the clamp voltage value range of the clamper tube D3 is 1V to VCC.
Reference voltage source X1 in the present invention is used to provide reference voltage value for the AD acquisition chip.The present invention passes through resistance
The anti-larger impedance of isolated form differential amplifier circuit input terminal realizes that analog acquisition circuit is isolated with the impedance of power electronics main circuit,
And can realize and power electronics main circuit multiple spot difference is sampled, avoid it is conventional sample altogether ground potential it is inconsistent caused by sampling it is inclined
Difference；Sampled analogue signals, again through voltage clamping, are sent into AD acquisition electricity by voltage matches and filtering by differential amplifier circuit output
Road；Digital signal is converted analog signals by AD Acquisition Circuit；The output of AD Acquisition Circuit signal or input digital level warp
It crosses high-speed figure amount isolation circuit and realizes the completely isolated of sample circuit and digital control circuit, due to straight using AD Acquisition Circuit
It connects and power electronics main circuit analog quantity is sampled, there is no conventional linear optocoupler bring linearity error, sampling precisions
Also (sampling precision is restricted by selected ADC acquisition chip) is greatly improved, to realize to power electronics main circuit full voltage
The isolation acquisition of range high linearity.
Detailed description of the invention
Fig. 1 is high linearity difference isolation sampling structure schematic diagram of the invention；
Fig. 2 is the circuit diagram for the high linearity difference isolation sampling that first embodiment of the invention provides；
Fig. 3 is the circuit diagram for the high linearity difference isolation sampling that second embodiment of the invention provides；
Specific embodiment
To further illustrate the technical scheme of the present invention below with reference to the accompanying drawings and specific embodiments.
First embodiment
Fig. 1 and 2 is the high linearity difference isolation sampling structure schematic diagram that first embodiment of the invention provides.This structure chart
Include:
There is provided a kind of high linearity difference isolation sample circuit, comprising: impedance isolated form differential amplifier circuit, voltage matches
Filter circuit, voltage clamp circuit, AD Acquisition Circuit, high-speed isolated circuit and digital control circuit；
The impedance isolated form differential amplifier circuit include capacitor C1, resistance R1, resistance R2, diode D1, diode D2,
Resistance R3, resistance R4 and operational amplifier U1A；The one end the capacitor C1 is as sample circuit input cathode, the capacitor C1
The other end as sample circuit input anode, one end of the capacitor C1 is connect with one end of the resistance R1, the electricity
The other end for holding C1 is connect with one end of resistance R2；The other end of the resistance R1 and positive ends, the resistance R4 of diode D1
One end, operational amplifier U1A inverting input terminal connection；The negative polarity end of the other end of the resistance R2 and diode D2,
One end of resistance R3 is connected with the non-inverting input terminal of operational amplifier U1A；The negative polarity end of the diode D1 and the positive VCC of power supply
Connection, the positive ends of the diode D2 are connect with the negative VEE of power supply；The other end of the resistance R3 is grounded, the resistance R4
Another termination operational amplifier U1A output end and resistance R5 one end；
The voltage matches filter circuit includes resistance R5, resistance R6, capacitor C2, operational amplifier U1B；The resistance R5
One end, one end of capacitor C2 and the non-inverting input terminal of operational amplifier U1B of other end connection resistance R6；The resistance R6's is another
One end ground connection, the other end ground connection of the capacitor C2；The inverting input terminal and operational amplifier U1B of the operational amplifier U1B
Output end connection；
The voltage clamp circuit includes resistance R7 and clamper tube D3；One end of the resistance R7 and operational amplifier U1B
Output end connection, the resistance R7 the other end connection clamper tube D3 one end, clamper tube D3 the other end ground connection；
The AD Acquisition Circuit includes AD acquisition chip and reference voltage source X1, and wherein AD acquisition chip has multi-channel analog
Input terminal；The analog input end all the way of the AD acquisition chip connects the other end of the resistance R7, the AD acquisition chip
The positive ends of the positive connection reference voltage X1 of benchmark input, the negative connection reference voltage source X1 of benchmark input of the AD acquisition chip
Negative polarity end；
The high-speed isolated circuit includes input terminal and output end, for the output signal of AD acquisition chip to be transmitted to number
Word control circuit, to realize the electrical isolation of AD acquisition chip and digital control circuit；The high-speed isolated digital circuit input
Data output interface D1~Dn of end DD1~DDn and the AD acquisition chip are correspondingly connected with；
The digital control circuit has an IO digital interface, and IO digital interface and the high-speed figure isolation circuit
Output end is correspondingly connected with；
Input terminal of the impedance isolated form differential amplifier circuit input terminal as sample circuit.
Further, impedance isolated form differential amplifier circuit, voltage matches filter circuit and the voltage clamp circuit
Difference all the way is constituted to sample；The sampling of difference described in multichannel is corresponding with the multi-channel analog input terminal of the AD acquisition chip simultaneously to be connected
It connects.
The value range of the further capacitor C1 is 0~100uf.
The further resistance R1 and resistance R2 value range are 10K to 500M Ω.
Further, the clamp voltage value range of the clamper tube D3 is 1V to VCC.
The sampled voltage of circuit to be sampled is connected to impedance isolated form differential amplifier circuit input terminal CH1GND and CHIN, warp
It crosses the capacitor C1 and carries out differential filtering, through the resistance R1, resistance R2, resistance R3, resistance R4 and affiliated operational amplifier U1A
Form difference isolating amplifier circuit, since the resistance R1 and resistance R2 resistance value are not less than 10K so that the sample circuit with
Power electronics main circuit forms level-one impedance isolation, the impedance isolated form differential amplifier circuit output end voltage and input terminal electricity
Pressure relationship is (condition: R4/R1=R3/R2)
V_OUT=(R4/R1) * (VCH1IN-VCH1GND)=(R3/R2) * (VCH1IN-VCH1GND)
The first amplifier output end voltage V_OUT carries out electric resistance partial pressure through the resistance R5R5 and resistance R6, makes to export
Voltage is consistent with the AD acquisition chip U001 input voltage range, the resistance R5 and the resistance R6 partial pressure after voltage pass through
The capacitor C2 carries out smothing filtering and carries out impedance transformation through second amplifier composition voltage follower again, makes second fortune
Put output end strictly follow the resistance R5 and with the resistance R6 partial pressure value；The second amplifier output end voltage is through the electricity
It hinders the R7 and clamper tube D3 and forms clamp circuit, the AD acquisition chip U001 input terminal voltage is controlled in zone of reasonableness
It is interior, guarantee the AD acquisition chip U001 steady operation.
The AD acquisition chip U001 is inputted analog voltage and carries out analog-to-digital conversion, is converted into digital signal, then through institute
Ground and line related network progress electrical isolation will be simulated by stating high-speed figure isolation circuit, protect the single-chip microcontroller or DSP number
Control circuit guarantees single-chip microcontroller or the reliable and stable work of digital control circuit, the single-chip microcontroller or DSP digital control circuit and institute
Discrete magnitude signal carries out data communication after stating the isolation of high-speed figure isolation circuit, AD sampled result is read, to finally collect
Power electronics main circuit voltage to be sampled.
Second embodiment
Fig. 3 is the high linearity difference isolation sample circuit schematic diagram that second embodiment of the invention provides.The present embodiment is
Sample circuit is isolated in multi-channel differential.
Further, the multichannel impedance isolated form differential amplifier circuit include the anti-isolated form differential amplifier circuit of n roadlock,
The road n voltage matches filter circuit, the road n voltage clamp circuit, the road n AD Acquisition Circuit (can share same AD acquisition chip), the road n are high
Speed digital isolation circuit (same high-speed isolated chip can be shared) and all the way single-chip microcontroller or DSP digital control circuit.
The anti-isolated form differential amplifier circuit output end of n roadlock is connect with the road n voltage matches filter circuit input terminal, institute
It states the road n voltage matches filter circuit output end to connect with the road n voltage clamp circuit input terminal, the road n voltage clamp circuit is defeated
Outlet is connected to AD Acquisition Circuit input terminal described in multichannel, the AD Acquisition Circuit output end be connected to the high-speed figure every
From circuit, the high-speed figure isolation circuit output end is connected to the I/O port of single-chip microcontroller or DSP digital control circuit.
The anti-isolated form differential amplifier circuit of the n roadlock, the road n voltage matches filter circuit, the road n voltage clamp circuit, the road n
AD Acquisition Circuit (same AD acquisition chip can be shared), the road n high-speed figure isolation circuit (same high-speed isolated chip can be shared),
Per circuit structure and same names circuit theory and circuit parameter in second embodiment are consistent all the way.
The output end of the reference voltage source will be equal to the reference voltage value of the AD acquisition chip U001.
The value range of the capacitor C1 is 0~100uf.
The resistance R1 and resistance R2 value range are 10K to 500M Ω.
The clamp voltage value range of the clamper tube D3 is 1V to VCC.
Power electronics main circuit voltage to be sampled be connected to impedance isolated form differential amplifier circuit input terminal CH1GND and
CHIN carries out differential filtering by the capacitor C1, puts through the resistance R1, resistance R2, resistance R3, resistance R4 and affiliated operation
Big device U1A forms difference isolating amplifier circuit, since the resistance R1 and resistance R2 resistance value are not less than 10K, so that described adopt
Sample circuit and power electronics main circuit, which form level-one impedance, be isolated, the impedance isolated form differential amplifier circuit output end voltage and
Input terminal voltage relationship is (condition: R4/R1=R3/R2)
V_OUT=(R4/R1) * (VCH1IN-VCH1GND)=(R3/R2) * (VCH1IN-VCH1GND)
The first amplifier output end voltage V_OUT carries out electric resistance partial pressure through the resistance R5 and resistance R6, makes output electricity
Pressure is consistent with the AD acquisition chip U001 input voltage range, and voltage is by institute after the resistance R5 and resistance R6 partial pressure
It states capacitor C2 and carries out smothing filtering again through second amplifier composition voltage follower progress impedance transformation, make second amplifier
Output end strictly follows the resistance R5 and the resistance R6 partial pressure value；The second amplifier output end voltage is through the resistance R7
Clamp circuit is formed with the clamper tube D3, in the reasonable scope by AD acquisition chip U001 input terminal voltage control, is protected
Demonstrate,prove the AD acquisition chip U001 steady operation.
The AD acquisition chip U001 is inputted analog voltage and carries out analog-to-digital conversion, is converted into digital signal, then through institute
Ground and line related network progress electrical isolation will be simulated by stating high-speed figure isolation circuit, protect the single-chip microcontroller or DSP number
Control circuit guarantees single-chip microcontroller or the reliable and stable work of digital control circuit, the single-chip microcontroller or DSP digital control circuit and institute
Discrete magnitude signal carries out data communication after stating the isolation of high-speed figure isolation circuit, AD sampled result is read, to finally collect
Power electronics main circuit voltage to be sampled.
All the embodiments in this specification are described in a progressive manner, the highlights of each of the examples are with
The difference of other embodiments, the same or similar part between each embodiment may refer to each other.
The above description is only a preferred embodiment of the present invention, is not intended to restrict the invention, for those skilled in the art
For, the invention can have various changes and changes.All any modifications made within the spirit and principles of the present invention are equal
Replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (5)
1. sample circuit, including impedance isolated form differential amplifier circuit, voltage matches filtered electrical is isolated in a kind of high linearity difference
Road, voltage clamp circuit, AD Acquisition Circuit, high-speed isolated circuit and digital control circuit；
The impedance isolated form differential amplifier circuit includes capacitor C1, resistance R1, resistance R2, diode D1, diode D2, resistance
R3, resistance R4 and operational amplifier U1A；As sample circuit input cathode, the capacitor C1's is another for the one end the capacitor C1
One end is connect as sample circuit input anode, one end of the capacitor C1 with one end of the resistance R1, the capacitor C1
The other end connect with one end of resistance R2；The one of the positive ends of the other end of the resistance R1 and diode D1, resistance R4
The inverting input terminal connection at end, operational amplifier U1A；The other end of the resistance R2 and negative polarity end, the resistance of diode D2
One end of R3 is connected with the non-inverting input terminal of operational amplifier U1A；The negative polarity end of the diode D1 and the positive VCC of power supply connect
It connects, the positive ends of the diode D2 are connect with the negative VEE of power supply；The other end of the resistance R3 is grounded, the resistance R4's
The output end of another termination operational amplifier U1A and one end of resistance R5；
The voltage matches filter circuit includes resistance R5, resistance R6, capacitor C2, operational amplifier U1B；The resistance R5 is another
One end, one end of capacitor C2 and the non-inverting input terminal of operational amplifier U1B of end connection resistance R6；The other end of the resistance R6
Ground connection, the other end ground connection of the capacitor C2；The inverting input terminal of the operational amplifier U1B is defeated with operational amplifier U1B's
Outlet connection；
The voltage clamp circuit includes resistance R7 and clamper tube D3；One end of the resistance R7 is defeated with operational amplifier U1B's
Outlet connection, one end of the other end connection clamper tube D3 of the resistance R7, the other end ground connection of clamper tube D3；
The AD Acquisition Circuit includes AD acquisition chip and reference voltage source X1, and wherein AD acquisition chip is inputted with multi-channel analog
End；The analog input end all the way of the AD acquisition chip connects the other end of the resistance R7, the benchmark of the AD acquisition chip
The positive ends of the positive connection reference voltage X1 of input, the negative connection reference voltage source X1's of benchmark input of the AD acquisition chip is negative
Polar end；
The high-speed isolated circuit includes input terminal and output end, for the output signal of AD acquisition chip to be transmitted to digital control
Circuit processed, to realize the electrical isolation of AD acquisition chip and digital control circuit；The high-speed isolated circuit input end DD1~
Data output interface D1~Dn of DDn and the AD acquisition chip are correspondingly connected with；
The digital control circuit have IO digital interface, and IO digital interface and the high-speed isolated circuit output end pair
It should connect；
Input terminal of the impedance isolated form differential amplifier circuit input terminal as sample circuit.
2. sample circuit is isolated in a kind of high linearity difference according to claim 1, it is characterised in that: the impedance every
Release differential amplifier circuit, voltage matches filter circuit and voltage clamp circuit constitute difference all the way and sample；Difference described in multichannel
Sampling is divided to be correspondingly connected with simultaneously with the multi-channel analog input terminal of the AD acquisition chip.
3. sample circuit is isolated in a kind of high linearity difference according to claim 1, it is characterised in that: the capacitor C1's
Value range is 0uF~100uF.
4. sample circuit is isolated in a kind of high linearity difference according to claim 1, it is characterised in that: the resistance R1 and
Resistance R2 value range is 10K Ω to 500M Ω.
5. sample circuit is isolated in a kind of high linearity difference according to claim 1, it is characterised in that: the clamper tube D3
Clamp voltage value range be 1V to VCC.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201611059718.3A CN106773910B (en) | 2016-11-22 | 2016-11-22 | A kind of high linearity difference isolation sample circuit |
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| CN201611059718.3A CN106773910B (en) | 2016-11-22 | 2016-11-22 | A kind of high linearity difference isolation sample circuit |
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| CN106773910B true CN106773910B (en) | 2019-05-21 |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108802446A (en) * | 2018-07-11 | 2018-11-13 | 杭州电子科技大学 | A kind of industrial robot controller busbar voltage detection circuit |
| CN110673052A (en) * | 2019-10-18 | 2020-01-10 | 湖南小步科技有限公司 | SOC estimation method and device of power battery and battery management system |
| CN110967540B (en) * | 2019-12-12 | 2022-03-25 | 中国电子科技集团公司第四十四研究所 | Isolated linear detection circuit with adjustable transmission coefficient and module comprising same |
| CN111879997A (en) * | 2020-07-31 | 2020-11-03 | 中国人民解放军海军工程大学 | High-voltage input current output isolated type and high-precision voltage sensor |
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| US9419644B2 (en) * | 2014-08-19 | 2016-08-16 | Intersil Americas LLC | System, circuit and method for converting a differential voltage signal including a high common mode voltage component to a ground referenced signal for battery voltage managment |
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| CN200976575Y (en) * | 2006-12-08 | 2007-11-14 | 天津市红日电气自动化有限公司 | Electronic switch equipment with digital signal processor |
| US9071214B2 (en) * | 2009-06-11 | 2015-06-30 | Invensense, Inc. | Audio signal controller |
| CN102437577A (en) * | 2011-12-24 | 2012-05-02 | 西安天虹电器有限公司 | Control circuit used in active power filter (APF) |
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