CN210668350U - 一种芯片键合引线连接结构及芯片封装结构 - Google Patents

一种芯片键合引线连接结构及芯片封装结构 Download PDF

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CN210668350U
CN210668350U CN201922278276.7U CN201922278276U CN210668350U CN 210668350 U CN210668350 U CN 210668350U CN 201922278276 U CN201922278276 U CN 201922278276U CN 210668350 U CN210668350 U CN 210668350U
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insulating support
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种利
孙林华
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Jiangsu Aisi Semiconductor Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4899Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids
    • H01L2224/48996Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/48998Alignment aids
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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Abstract

本实用新型公开了一种芯片键合引线连接结构,包括基板、固定于所述基板上表面的芯片以及绝缘支撑件,所述基板的上表面设有多个第一电极焊盘,所述芯片的上表面设有多个第二电极焊盘,所述第一电极焊盘与第二电极焊盘一一对应,各第一电极焊盘与第二电极焊盘之间通过键合引线相连,还包括绝缘支撑件,所述绝缘支撑件固定于所述基板的上表面并位于所述第一电极焊盘和第二电极焊盘之间,绝缘支撑件的顶面高于第一电极焊盘并支撑于各键合引线的下方,使得绝缘支撑件两侧的键合引线绷直。本实用新型提高了键合引线的稳定性,防止键合引线发生变形和摆动,提高了成品的合格率。

Description

一种芯片键合引线连接结构及芯片封装结构
技术领域
本实用新型涉及芯片封装技术领域,具体涉及一种芯片键合引线连接结构及芯片封装结构。
背景技术
如图1所示,现有的芯片封装结构包括基板10、固定在基板10上的芯片20,基板10和芯片20上均设置有电极焊盘11、21,基板10和芯片20上的电极焊盘11、21通过键合引线30相连,键合引线30连接后呈拱形,键合引线30的中部无支撑,仅靠其自身强度保持,因而键合引线30的稳定性较差,若键合引线30较软、较长,其容易发生变形和摆动,造成30键合引线两端的焊接点失效,若键合引线30之间的距离太小,还会造成相邻键合引线30接触短路,无法保证产品的质量。
实用新型内容
针对现有技术中的缺陷,本实用新型提供了一种芯片键合引线连接结构及芯片封装结构,以提高键合引线的稳定性,防止键合引线发生变形和摆动,提高成品的合格率。
一方面,本实用新型提供了一种芯片键合引线连接结构,包括基板以及固定于所述基板上表面的芯片,所述基板的上表面设有多个第一电极焊盘,所述芯片的上表面设有多个第二电极焊盘,所述第一电极焊盘与第二电极焊盘一一对应,各第一电极焊盘与第二电极焊盘之间通过键合引线相连,还包括绝缘支撑件,所述绝缘支撑件固定于所述基板的上表面并位于所述第一电极焊盘和第二电极焊盘之间,绝缘支撑件的顶面高于第一电极焊盘并支撑于各键合引线的下方,使得绝缘支撑件两侧的键合引线绷直。
进一步地,所述绝缘支撑件的顶部沿其延伸的方向间隔分布有多个凸条,相邻的凸条之间形成可卡入键合引线的卡槽。
进一步地,所述凸条呈上宽下窄的锥形。
进一步地,所述卡槽的两端的底部均设有倾斜倒角。
进一步地,所述绝缘支撑件为塑料或陶瓷制品。
另一方面,本实用新型提供了一种芯片封装结构,包括上述芯片键合引线连接结构。
进一步地,所述芯片与基板之间设有芯片垫,所述基板位于所述芯片垫的下方分布有导热通孔。
进一步地,还包括封装胶体,用于包覆所述芯片、键合引线和绝缘支撑件于所述基板的表面。
本实用新型的有益效果体现在:在焊接每个键合引线时,先将键合引线的一端焊接在第二电极焊盘上,然后将键合引线绕过绝缘支撑件,使得键合引线绷紧,再将键合引线的另一端焊接在第一电极焊盘上,各键合引线通过绝缘支撑件支撑并绷紧,提高了键合引线的稳定性,能够有效防止键合引线在后续的工艺中发生变形和摆动,而造成键合引线两端的焊接点失效或相邻键合引线接触短路,提高了成品的合格率。
附图说明
为了更清楚地说明本实用新型具体实施方式或现有技术中的技术方案,下面将对具体实施方式或现有技术描述中所需要使用的附图作简单地介绍。在所有附图中,类似的元件或部分一般由类似的附图标记标识。附图中,各元件或部分并不一定按照实际的比例绘制。
图1为现有技术的结构示意图;
图2为本实用新型的结构示意图;
图3为本实用新型的绝缘支撑件的结构示意图。
附图中:10表示基板;11表示第一电极焊盘;12表示导热通孔;20表示芯片;21表示第二电极焊盘;30表示键合引线;40表示绝缘支撑件;41表示凸条;42表示卡槽;43表示倾斜倒角;50表示芯片垫;60表示封装胶体。
具体实施方式
下面将结合附图对本实用新型技术方案的实施例进行详细的描述。以下实施例仅用于更加清楚地说明本实用新型的技术方案,因此只作为示例,而不能以此来限制本实用新型的保护范围。
需要注意的是,除非另有说明,本申请使用的技术术语或者科学术语应当为本实用新型所属领域技术人员所理解的通常意义。
如图2和图3所示,本实用新型实施例提供了一种芯片键合引线连接结构,包括基板10以及固定于基板10上表面的芯片20,基板10的上表面设有多个第一电极焊盘11,芯片20的上表面设有多个第二电极焊盘21,第一电极焊盘11与第二电极焊盘21一一对应,各第一电极焊盘11与第二电极焊盘21之间通过键合引线30相连。
上述芯片键合引线连接结构还包括绝缘支撑件40,这里的绝缘支撑件40可为塑料或陶瓷制品。绝缘支撑件40固定于基板10的上表面并位于第一电极焊盘11和第二电极焊盘21之间,绝缘支撑件40的顶面高于第一电极焊盘11并支撑于各键合引线30的下方,使得绝缘支撑件40两侧的键合引线30绷直。
在焊接每个键合引线30时,先将键合引线30的一端焊接在第二电极焊盘21上,然后将键合引线30绕过绝缘支撑件40,使得键合引线30绷紧,再将键合引线30的另一端焊接在第一电极焊盘11上,各键合引线30通过绝缘支撑件40支撑并绷紧,提高了键合引线30的稳定性,能够有效防止键合引线30在后续的工艺中发生变形和摆动,而造成键合引线30两端的焊接点失效或相邻键合引线30接触短路,提高了成品的合格率。
作为上述方案的进一步优化,参照图3,绝缘支撑件40的顶部沿其延伸的方向间隔分布有多个凸条41,相邻的凸条41之间形成可卡入键合引线30的卡槽42,卡槽42用于对键合引线30进行限位,进一步防止键合引线30发生摆动,提高键合引线30的稳定性。需要说明的是,相邻的两条键合引线30之间可以间隔一个凸条41、也可以间隔两个凸条41、三个凸条41、甚至更多个凸条41,本实施例不对其进行限制。为了使在焊接键合引线30时,键合引线30能够顺利滑入卡槽42,凸条41呈上宽下窄的锥形。此外,卡槽42的两端的底部均设有倾斜倒角43,键合引线30从卡槽42一端的倾斜倒角43引入,再从卡槽42另一端的倾斜倒角43引出,从而防止键合引线30被硌着。
如图2所示,本实用新型实施例还提供了一种芯片封装结构,包括上述芯片键合引线连接结构。
芯片20工作时会发热,为了提高芯片20的散热性能,芯片20与基板10之间设有芯片垫50,基板10位于芯片垫50的下方分布有导热通孔12,芯片20工作时产生的热量可以从导热通孔12散发出去。
此外,上述芯片20封装结构还包括封装胶体60,用于包覆芯片20、键合引线30和绝缘支撑件40于基板10的表面,封装胶体60可为模塑树脂。
最后应说明的是:以上各实施例仅用以说明本实用新型的技术方案,而非对其限制;尽管参照前述各实施例对本实用新型进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本实用新型各实施例技术方案的范围,其均应涵盖在本实用新型的权利要求和说明书的范围当中。

Claims (8)

1.一种芯片键合引线连接结构,包括基板以及固定于所述基板上表面的芯片,所述基板的上表面设有多个第一电极焊盘,所述芯片的上表面设有多个第二电极焊盘,所述第一电极焊盘与第二电极焊盘一一对应,各第一电极焊盘与第二电极焊盘之间通过键合引线相连,其特征在于:还包括绝缘支撑件,所述绝缘支撑件固定于所述基板的上表面并位于所述第一电极焊盘和第二电极焊盘之间,绝缘支撑件的顶面高于第一电极焊盘并支撑于各键合引线的下方,使得绝缘支撑件两侧的键合引线绷直。
2.根据权利要求1所述的芯片键合引线连接结构,其特征在于:所述绝缘支撑件的顶部沿其延伸的方向间隔分布有多个凸条,相邻的凸条之间形成可卡入键合引线的卡槽。
3.根据权利要求2所述的芯片键合引线连接结构,其特征在于:所述凸条呈上宽下窄的锥形。
4.根据权利要求2所述的芯片键合引线连接结构,其特征在于:所述卡槽的两端的底部均设有倾斜倒角。
5.根据权利要求1所述的芯片键合引线连接结构,其特征在于:所述绝缘支撑件为塑料或陶瓷制品。
6.一种芯片封装结构,其特征在于,包括如权利要求1-5任一项所述的芯片键合引线连接结构。
7.根据权利要求6所述的芯片封装结构,其特征在于,所述芯片与基板之间设有芯片垫,所述基板位于所述芯片垫的下方分布有导热通孔。
8.根据权利要求6所述的芯片封装结构,其特征在于,还包括封装胶体,用于包覆所述芯片、键合引线和绝缘支撑件于所述基板的表面。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114300908A (zh) * 2021-12-31 2022-04-08 深圳市信为科技发展有限公司 具有微细多引线的压力传感器的焊接装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114300908A (zh) * 2021-12-31 2022-04-08 深圳市信为科技发展有限公司 具有微细多引线的压力传感器的焊接装置
CN114300908B (zh) * 2021-12-31 2024-02-09 深圳市信为科技发展有限公司 具有微细多引线的压力传感器的焊接装置

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