CN210490799U

CN210490799U - SoC built-in oscillating circuit

Info

Publication number: CN210490799U
Application number: CN201921941044.9U
Authority: CN
Inventors: 张飞飞; 卢孟
Original assignee: Jiangsu Brmico Electronics Co ltd
Current assignee: Jiangsu Brmico Electronics Co ltd
Priority date: 2019-11-12
Filing date: 2019-11-12
Publication date: 2020-05-08
Anticipated expiration: 2029-11-12

Abstract

The utility model discloses a built-in oscillating circuit of SoC belongs to chip technical field. To the built-in oscillator signal quality that exists among the current circuit poor, can not adjust the duty cycle, the relatively poor and bulky problem of external crystal oscillator flexibility, the utility model provides a SoC embeds oscillation circuit, including resistance voltage division module, irritate the current module, draw the current module, oscillation control module and electric capacity module, the voltage that uses oscillation control module to insert is reference voltage, irritate the circuit of current module and draw the current module and pass through the comparator comparison, decide the circuit irritate electric current and draw the current value, oscillation control module passes through logical operation according to inserting the voltage and produces oscillation signal, the adjustable duty cycle of oscillation signal, electric capacity module is built-in or external, to its guard action of circuit. The utility model discloses can conveniently realize stabilizing accurate oscillator frequency, accurate duty cycle control has the effect of low shake and high power suppression simultaneously.

Description

SoC built-in oscillating circuit

Technical Field

The invention relates to the technical field of chips, in particular to an SOC built-in oscillation circuit.

Background

With the development of design and fabrication technologies, integrated circuit designs have been developed from the integration of transistors to the integration of logic gates, and now to the integration of IP, i.e., SoC design technologies. SoC is an abbreviation of System on Chip, SoC Chip is a Chip of integrated circuit, can effectively reduce the development cost of electronic information System products, shorten the development period, improve the competitiveness of products, and is the most main product development mode to be adopted in the future industry.

The design technology of SoC is the result of the transition from "integrated circuit" level design to "integrated system" level design. The design is based on the performance of the whole system, the devices are tightly combined, and the functions of the whole system are completed on a single chip through the cooperative design of hardware and software. Of course, in practical applications, not all system functions can be implemented on one chip, and sometimes the use of multiple chips is required.

In SoC design, a plurality of clock signals are often required to be used, a built-in oscillator is arranged in a common chip to realize the function, the built-in oscillator generally adopts built-in RC (capacitance resistance) oscillation, the oscillation frequency of the built-in oscillator can change along with factors such as voltage, temperature and humidity, the problems of large frequency drift, large influence of voltage and other unstable periods exist, and meanwhile, the duty ratio of the oscillation period cannot be adjusted. In practical application, the external crystal oscillator is adopted to generate clock signals, has good frequency stability and jitter, is basically fixed in signal level, needs to select suitable output level, is poor in flexibility, is mostly an active crystal oscillator and is large in size.

Disclosure of Invention

1. Technical problem to be solved

Aiming at the problems of poor signal quality of an internal oscillator, incapability of adjusting the duty ratio, poor flexibility and large volume of an external crystal oscillator in the existing circuit, the invention provides the SoC internal oscillator circuit, which can conveniently realize stable and accurate oscillator frequency and accurate duty ratio control and has the effects of low jitter and high power supply inhibition.

2. Technical scheme

The purpose of the utility model is realized through the following technical scheme.

A built-in SoC oscillating circuit comprises a resistance voltage division module, a current filling module, a current source module, an oscillation control module and a capacitance module, wherein the oscillation control module is connected with the resistance voltage division module, the current filling module, the current source module and the capacitance module are all connected, the resistance voltage division module divides voltage of a power supply through a voltage division resistor, the divided voltage is respectively connected with the oscillation control module, the current filling module and the current source module, the oscillation circuit module generates an oscillation signal according to the input divided voltage, the current source module supplies current to the oscillation circuit module, the current filling module fills current to the oscillation circuit module, and the duty ratio of the oscillation signal is determined by the current source module and the current filling module.

Furthermore, the resistance voltage division module comprises n +2 resistors with the same resistance value which are connected in series, namely one end of the resistor Rn is connected with R_n-1One end of the resistor Rn is connected with R_n+1(ii) a One end of the first resistor R0 is connected with the ground potential, and the (n + 2) th resistor R_n+1One end of which is connected to a power supply VDD, n being a natural number greater than 0.

Furthermore, the oscillation control module comprises a comparison module, a logic operation module and a switch module, wherein the comparison module is connected with the output voltage division of the resistance voltage division module, compares the access voltage, controls the logic operation module to perform logic operation according to different access voltages, and the switch module selectively opens the MOS tube according to the operation result of the logic operation module to generate an oscillation signal.

Furthermore, the comparison module comprises operational amplifiers AMP3 and AMP4, the positive electrode of the input end of the operational amplifier AMP3 and the positive electrode of the input end of the operational amplifier AMP4 are connected with the voltage division output of the voltage division module, the output ends of the operational amplifier AMP3 and the operational amplifier AMP4 are both connected with the input end of the logic operation module, the capacitance module comprises a capacitor C1, one end of the capacitor C1 is connected with the negative electrode of the input end of the operational amplifier AMP3 and the negative electrode of the input end of the operational amplifier AMP4, and the other end of the capacitor C1 is grounded.

Furthermore, the logic operation module comprises two input nand gates X1, X3 and X4, inverters X5 and X6 and two input or gates X2, and the output end of the comparison module is respectively connected with the input end of the nand gate X1 and the input end of the or gate X2; the output end of the NAND gate X1 and the output end of the NAND gate X4 are connected with the input end of the NAND gate X3, and the output end of the OR gate X2 and the output end of the NAND gate X3 are connected with the input end of the NAND gate X4; the output end of the NAND gate X3 is further connected with the input end of the inverter X5, the output end of the NAND gate X4 is further connected with the input end of the inverter X6, and the output end of the inverter X5 and the output end of the inverter X6 are connected with the switch module.

Furthermore, the switch module comprises a PMOS transistor P2 and an NMOS transistor N2, and the output terminal of the inverter X5 in the logic control module is connected to the gate of the PMOS transistor P2; the output end of an inverter X6 in the logic control module is connected with the grid of an NMOS tube N2; the source electrode of the PMOS tube P2 is connected with the current sinking module, the source electrode of the NMOS tube N2 is connected with the current sinking module, and the drain electrodes of the PMOS tube P2 and the NMOS tube N2 are connected with the output end CLKOUT together.

Furthermore, the current sinking module comprises a resistor RP, an operational amplifier AMP1 and a PMOS tube P1, wherein the positive electrode of the input end of the operational amplifier AMP1 is connected with the voltage division output end of the voltage division module, the negative electrode of the input end of the operational amplifier AMP1 is commonly connected with one end of the resistor RP and the source electrode of the PMOS tube P1, the output end of the operational amplifier AMP1 is connected with the grid electrode of the PMOS tube P1, the drain electrode of the PMOS tube P1 is connected with the source electrode of the PMOS tube P2 in the oscillation control module, and the other end of the resistor RP is connected with the.

Furthermore, the source current module comprises a resistor RN, an operational amplifier AMP2 and an NMOS transistor N1, wherein the negative electrode of the input end of the operational amplifier AMP2 is connected with the voltage division output end of the resistor voltage division module, the positive electrode of the input end of the operational amplifier AMP2 is commonly connected with one end of the resistor RN and the source electrode of the NMOS transistor N1, the output end of the operational amplifier AMP2 is connected with the grid electrode of the NMOS transistor N1, the drain electrode of the NMOS transistor N1 is connected with the source electrode of the NMOS transistor N2 in the oscillation control module, and the other end of the resistor RN is connected with.

Furthermore, the source current module and the sink current module generate a source current In and a sink current Ip which are related to the power voltage through comparison of the operational amplifier and negative feedback control of the MOS tube.

Furthermore, the duty ratio of the oscillation signal generated by the oscillation control module is determined by the source current and the sink current, and the duty ratio is determined

The utility model discloses in the circuit, voltage can obtain n voltage value V (n) through resistance voltage divider module, and these partial pressure values provide V (a) of source current module, irritate the V (b) of electric current module to and the V (c) and V (d) of oscillation control module, as comparison reference voltage.

The partial voltage of the resistor RP in the current sinking module is compared with V (b) through an operational amplifier AMP1, and then negative feedback control is carried out through a PMOS tube P1 to enable the voltage to be equal to V (b), so that the current is equal to V (b)

Rp is the resistance of the resistor Rp in the current sinking module, VDD is the power voltage, and v (b) is the voltage provided by the resistor voltage dividing module to the current sinking module. Since V (b) is proportional to VDD, the sink current module obtains a sink current related to VDD, and the voltage V (b) determines the sink current value.

The partial voltage of the resistor RN in the source current module is compared with V (a) through an operational amplifier AMP2, and negative feedback control is carried out through an NMOS tube N1 to enable the voltage to be equal to V (a), so that the current is obtained

Rn is the resistance value of point-in RN in the source current module, VDD is the power supply voltage, and V (a) is the voltage provided by the resistor voltage dividing module for the source current module. Since V (a) is proportional to VDD, the pull-out current module obtains a pull-out current related to VDD, and the voltage V (a) determines the pull-out current value.

V (d) in the oscillation control module determines a high voltage value of CLKOUT, and V (c) determines a low voltage value of CLKOUT; when the CLKOUT voltage is higher than V (d), the oscillation control module performs logical operation, the PMOS tube P2 is disconnected, the current sinking module is closed, the NMOS tube N2 is connected, the current source module is opened, and the CLKOUT voltage is reduced; when the CLKOUT voltage is lower than v (c), the NMOS transistor N2 is turned off, the current-sourcing module is turned off, the PMOS transistor P2 is turned on, the current-sinking module is turned on, and the CLKOUT voltage is increased. The CLKOUT voltage oscillates in a triangular wave in a range of voltages V (c) and V (d). The period and duty cycle of the oscillation are formulated as follows:

v (a) is the voltage provided by the resistance voltage dividing module to the source current module, V (b) is the voltage provided by the resistance voltage dividing module to the sink current module, V (C) and V (d) are the voltages provided by the resistance voltage dividing module to the oscillation control module, Ip is the current when the PMOS tube P2 is conducted, In is the current when the NMOS tube N2 is conducted, C₁The capacitance value of capacitance module C1.

3. Advantageous effects

Compared with the prior art, the invention has the advantages that:

the patent provides a simple and easy circuit and method, and realizes an oscillator built in the SoC; the circuit of the utility model generates an oscillation signal with high precision and low jitter, and supports the random adjustment of duty ratio; the chip is suitable for being integrated in an SoC chip; the capacitor C1 of the capacitor module can be internally or externally connected with a circuit, and the connection mode of the circuit is more various.

Drawings

Fig. 1 is an overall circuit diagram of the present invention;

fig. 2 is a circuit diagram of the resistor divider of the present invention;

FIG. 3 is a circuit diagram of the current sink of the present invention;

fig. 4 is a circuit diagram of the current source of the present invention;

fig. 5 is a circuit diagram of the oscillation control of the present invention.

Detailed Description

The invention is described in detail below with reference to the drawings and specific examples.

Example 1

As shown in fig. 1, an SoC built-in oscillation circuit includes a resistance voltage division module, a current sinking module, a current sourcing module, an oscillation control module, and a capacitance module, the oscillation control module is connected to the resistance voltage division module, the current sinking module, the current sourcing module, and the capacitance module are all connected, the resistance voltage division module divides voltage through a voltage division resistor, the divided voltage is respectively connected to the oscillation control module, the current sinking module, and the current sourcing module, and the voltage is respectively connected to the oscillation control module, the current sinking module, and the current sourcing module.

The resistance voltage division module is shown in fig. 2 and comprises n +2 resistors Rn with the same resistance value which are connected in series, wherein n is a natural number larger than 0, namely one end of each resistor Rn is connected with R_n-1One end of the resistor Rn is connected with R_n+1(ii) a One end of the first resistor R0 is connected with the ground potential, and the (n + 2) th resistor R_n+1One terminal of which is connected to a power supply VDD. The number of the resistors is determined by the requirement of the circuit, and the resistor voltage division module obtains reference voltages V0 to Vn by taking the values between the resistors, wherein V (x) is VDD x/(n +1), x is a natural number which is greater than or equal to 0, and x represents the divided voltage of the number of the resistors. The divided voltage output generated by the resistance voltage dividing module determines the highest value and the lowest value of the output CLKOUT of the oscillating circuit, the values of the sink current and the source current, and the frequency and the duty ratio of the oscillating circuit.

The current sinking module is shown in fig. 3 and comprises a resistor RP, an operational amplifier AMP1 and a PMOS transistor P1, wherein the positive electrode of the input end of the operational amplifier AMP1 is connected with the voltage division output end v (b) of the voltage division module, the negative electrode of the input end of the operational amplifier AMP1 is commonly connected with one end of the resistor RP and the source electrode of the PMOS transistor P1, the output end of the operational amplifier AMP1 is connected with the gate electrode of the PMOS transistor P1, the drain electrode of the PMOS transistor P1 is connected with the source electrode of the PMOS transistor P2 in the oscillation control module, and the other end of the resistor RP. The voltage V (b) is selected from the resistance voltage division module by an external control circuit to be input in a voltage division mode, and the current filling value is determined.

The source current module comprises a resistor RN, an operational amplifier AMP2 and an NMOS tube N1, wherein the negative electrode of the input end of the operational amplifier AMP2 is connected with the voltage division output end V (a) of the resistor voltage division module, the positive electrode of the input end of the operational amplifier AMP2 is commonly connected with one end of the resistor RN and the source electrode of the NMOS tube N1, the output end of the operational amplifier AMP2 is connected with the grid electrode of the NMOS tube N1, the drain electrode of the NMOS tube N1 is connected with the source electrode of the NMOS tube N2 in the oscillation control module, and the other end of the resistor RN is connected with the ground potential. The voltage V (a) is selected from the resistance voltage-dividing module by an external control circuit to be inputted in a divided manner, and a pull-out current value is determined.

The oscillation control module comprises operational amplifiers AMP3 and AMP4, two-input NAND gates X1, X3 and X4, inverters X5 and X6, two-input OR gates X2, a PMOS transistor P2 and an NMOS transistor N2 as shown in FIG. 5. The positive electrode of the input end of the operational amplifier AMP3 is connected with the voltage division output V (d) of the voltage division module, the positive electrode of the input end of the operational amplifier AMP4 is connected with the voltage division output V (c) of the voltage division module, and the output ends of the operational amplifier AMP3 and the operational amplifier AMP4 are both connected with the input end of the NAND gate X1 and the input end of the OR gate X2; the output end of the NAND gate X1 and the output end of the NAND gate X4 are connected with the input end of the NAND gate X3, and the output end of the OR gate X2 and the output end of the NAND gate X3 are connected with the input end of the NAND gate X4; the output end of the NAND gate X3 is also connected with the input end of an inverter X5, and the output end of the inverter X5 is connected with the gate of a PMOS tube P2; the output end of the NAND gate X4 is also connected with the input end of an inverter X6, and the output end of the inverter X6 is connected with the gate of an NMOS transistor N2; the drains of the PMOS transistor P2 and the NMOS transistor N2 are commonly connected to the output terminal CLKOUT. The output terminals of the inverters X5 and X6 are oscillation square waves of the circuit, and the waveforms of the output terminals of the inverters X5 and X6 are opposite. An oscillating triangular wave of the CLKOUT output circuit, V (d) determines the high level of the CLKOUT output, and V (c) determines the low level of the CLKOUT; when the CLKOUT output reaches V (d), the current sinking module is closed, and the current sourcing module is opened; when the CLKOUT output reaches v (c), the sink current module is turned on and the source current module is turned off.

As shown in FIG. 1, the capacitor module includes a capacitor C1, one end of the capacitor C1 is connected to the negative electrodes of the input terminals of the operational amplifiers AMP3 and AMP4, the other end of the capacitor C1 is grounded, and the capacitor C1 may be embedded in a chip or externally connected.

The voltage can obtain n voltage values V (n) through the resistance voltage division module, the voltage division values are provided for V (a) of the source current module, V (b) of the sink current module and V (c) and V (d) of the oscillation control module to serve as comparison reference voltages.

The invention and its embodiments have been described above schematically, without limitation, and the invention can be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The representation in the drawings is only one of the embodiments of the invention, the actual construction is not limited thereto, and any reference signs in the claims shall not limit the claims concerned. Therefore, if a person skilled in the art receives the teachings of the present invention, without inventive design, a similar structure and an embodiment to the above technical solution should be covered by the protection scope of the present patent. Furthermore, the word "comprising" does not exclude other elements or steps, and the word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. Several of the elements recited in the product claims may also be implemented by one element in software or hardware. The terms first, second, etc. are used to denote names, but not any particular order.

Claims

1. The SoC built-in oscillation circuit is characterized by comprising a resistance voltage division module, a current filling module, a current source module, an oscillation control module and a capacitance module, wherein the oscillation control module is connected with the resistance voltage division module, the current filling module, the current source module and the capacitance module are all connected, the resistance voltage division module divides voltage of a power supply through a voltage division resistor, the divided voltage is respectively connected into the oscillation control module, the current filling module and the current source module, the oscillation circuit module generates an oscillation signal according to the input divided voltage, the current source module sources current to the oscillation circuit module, and the current filling module fills current to the oscillation circuit module.

2. The SoC built-in oscillation circuit of claim 1, wherein the resistance voltage division module comprises n +2 resistors with the same resistance value connected in series, that is, one end of the resistor Rn is connected with R_n-1One end of the resistor Rn is connected with R_n+1(ii) a One end of the first resistor R0 is connected with the ground potential, and the (n + 2) th resistor R_n+1One end of which is connected to a power supply VDD, n being a natural number greater than 0.

3. The SoC built-in oscillation circuit of claim 1, wherein the oscillation control module comprises a comparison module, a logic operation module and a switch module, the comparison module is connected with the output voltage division of the resistance voltage division module, compares the input voltage, controls the logic operation module to perform logic operation according to different input voltages, and the switch module selectively turns on the MOS transistor according to the operation result of the logic operation module to generate the oscillation signal.

4. The SoC built-in oscillation circuit of claim 3, wherein the comparison module comprises operational amplifiers AMP3 and AMP4, the positive terminal of the input terminal of the operational amplifier AMP3 and the positive terminal of the input terminal of the operational amplifier AMP4 are connected with the voltage division output of the voltage division module, the output terminals of the operational amplifier AMP3 and the operational amplifier AMP4 are both connected with the input terminal of the logic operation module, the capacitance module comprises a capacitor C1, one end of the capacitor C1 is connected with the negative terminal of the input terminal of the operational amplifier AMP3 and the negative terminal of the input terminal of the operational amplifier AMP4, and the other end of the capacitor C1 is grounded.

5. The SoC internal oscillation circuit of claim 4, wherein the logic operation module comprises two-input NAND gates X1, X3 and X4, inverters X5 and X6 and two-input OR gate X2, and the output terminal of the comparison module is connected to the input terminal of NAND gate X1 and the input terminal of OR gate X2; the output end of the NAND gate X1 and the output end of the NAND gate X4 are connected with the input end of the NAND gate X3, and the output end of the OR gate X2 and the output end of the NAND gate X3 are connected with the input end of the NAND gate X4; the output end of the NAND gate X3 is further connected with the input end of the inverter X5, the output end of the NAND gate X4 is further connected with the input end of the inverter X6, and the output end of the inverter X5 and the output end of the inverter X6 are connected with the switch module.

6. The SoC built-in oscillation circuit of claim 5, wherein the switch module comprises a PMOS transistor P2 and an NMOS transistor N2, and the output terminal of the inverter X5 in the logic control module is connected to the gate of the PMOS transistor P2; the output end of an inverter X6 in the logic control module is connected with the grid of an NMOS tube N2; the source electrode of the PMOS tube P2 is connected with the current sinking module, the source electrode of the NMOS tube N2 is connected with the current sinking module, and the drain electrodes of the PMOS tube P2 and the NMOS tube N2 are connected with the output end CLKOUT together.

7. The SoC built-in oscillation circuit of claim 1, wherein the current sinking module comprises a resistor RP, an operational amplifier AMP1 and a PMOS tube P1, the positive pole of the input end of the operational amplifier AMP1 is connected with the voltage division output end of the voltage division module, the negative pole of the input end of the operational amplifier AMP1 is commonly connected with one end of the resistor RP and the source electrode of the PMOS tube P1, the output end of the operational amplifier AMP1 is connected with the gate electrode of the PMOS tube P1, the drain electrode of the PMOS tube P1 is connected with the source electrode of the PMOS tube P2 in the oscillation control module, and the other end of the resistor RP is connected with a power supply.

8. The SoC built-in oscillation circuit of claim 1, wherein the source current module comprises a resistor RN, an operational amplifier AMP2 and an NMOS transistor N1, wherein the negative electrode of the input end of the operational amplifier AMP2 is connected with the voltage division output end of the resistance voltage division module, the positive electrode of the input end of the operational amplifier AMP2 is commonly connected with one end of the resistor RN and the source electrode of the NMOS transistor N1, the output end of the operational amplifier AMP2 is connected with the gate electrode of the NMOS transistor N1, the drain electrode of the NMOS transistor N1 is connected with the source electrode of the NMOS transistor N2 in the oscillation control module, and the other end of the resistor RN is connected with the ground potential.

9. The SoC built-In oscillation circuit of claim 7 or 8, wherein the source current module and the sink current module generate a source current In and a sink current Ip which are related to a power supply voltage through comparison of an operational amplifier and negative feedback control of a MOS (metal oxide semiconductor) tube.

10. The SoC built-in oscillation circuit of claim 9, wherein a duty cycle of the oscillation signal generated by the oscillation control module is determined by a source current and a sink current, and the duty cycle is determined by the source current and the sink current