CN115051692B - Frequency signal generator with wide power supply range and frequency modulation method - Google Patents
Frequency signal generator with wide power supply range and frequency modulation method Download PDFInfo
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- H—ELECTRICITY
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- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/53—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback
- H03K3/57—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback the switching device being a semiconductor device
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- H—ELECTRICITY
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- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
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Abstract
The invention discloses a frequency signal generator with a wide power supply range and a frequency modulation method, wherein the method comprises the following steps: providing a bias circuit, wherein the bias circuit outputs a bias current; providing a charge-discharge circuit, wherein the charge-discharge circuit generates a charge current in response to the bias current and is used for charging the capacitor; providing a feedback output circuit, wherein the feedback output circuit responds to the fact that the charging and discharging capacitor voltage reaches an overturning level and generates a clock signal; a current control circuit is provided which controls the magnitude of the charging current to increase in response to the supply voltage being within a range above a threshold voltage value, thereby adjusting the frequency of the clock signal output by the frequency signal generator in stages in accordance with the supply voltage range. The invention adjusts the charging current of the frequency signal generator according to the power supply voltage range, so that the output clock signal frequency of the frequency signal generator can be stabilized near a certain frequency in a wider power supply range, and the stabilization of the oscillation frequency in the wide power supply range is realized.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a frequency signal generator with a wide power supply range and a frequency modulation method.
Background
The main oscillator stage of the frequency signal generator generally adopts a crystal oscillator, a ring oscillator, an LC oscillator, an RC oscillator, etc., wherein the RC oscillator is widely applied to the field of some low-frequency clock signals due to the characteristics of simple structure, low power consumption and high integration level. The RC oscillator structure comprises a resistive charging part, a capacitive charging part and a feedback discharging part, and the principle is that a clock signal is obtained by using the charging delay time of a resistive device to a capacitive device. However, the oscillation frequency of the conventional RC oscillator structure is greatly affected by the process, temperature and power supply voltage, and it is difficult to obtain a clock signal with higher accuracy.
In view of the above, the conventional technical means for solving the problem of clock signal deviation caused by temperature, voltage and process influence is mainly to realize stable output of a clock signal by arranging a voltage stabilizing circuit in an RC oscillating circuit. The voltage stabilizing circuit mainly realizes voltage stability regulation of the RC oscillating circuit based on the comparator. The regulated voltage is generally a comparison of an actual voltage with a threshold voltage, and thus controls the circuit such that the voltage is stabilized around the threshold voltage, thereby reducing the influence of process, temperature, and power supply voltage on the frequency of the output clock signal. However, this technique is not suitable for frequency stabilization of a wide power supply voltage range, and when the power supply voltage input range is too large, the frequency of the clock signal output by the conventional frequency signal generator will shift, and the frequency of the output clock signal will decrease with the increase of the power supply voltage; and the technology is relatively complex to realize and is not beneficial to the integration and miniaturization of the circuit.
Disclosure of Invention
In order to solve the problem of stable frequency of the clock signal output by the frequency signal generator with a wide power supply voltage range, the invention provides a frequency modulation method suitable for the frequency signal generator with the wide power supply range. The invention adjusts the charging current of the frequency signal generator according to the power supply voltage range, so that the output clock signal frequency of the frequency signal generator can be stabilized near a certain frequency in a wider power supply range, and the stabilization of the oscillation frequency in the wide power supply range is realized.
The invention is realized by the following technical scheme:
a method of frequency modulation for a frequency signal generator for a wide power supply range, the method comprising:
providing a bias circuit, wherein the bias circuit outputs a bias current;
providing a charge and discharge circuit, wherein the charge and discharge circuit generates a charge current in response to the bias current and is used for charging a capacitor;
providing a feedback output circuit, wherein the feedback output circuit responds to the fact that when the capacitor voltage of the charge and discharge circuit reaches an overturning level, a clock signal is generated;
and providing a current control circuit, wherein the current control circuit responds to the range of the power supply voltage above the threshold voltage value to control the charging and discharging circuit to increase the charging current amplitude, so that the frequency of the clock signal output by the frequency signal generator is regulated in a segmented mode according to the range of the power supply voltage.
The technical principle of the invention is as follows: when the power voltage is low (less than the threshold voltage value), the charging and discharging circuit is controlled to provide small charging current for the capacitor, and when the power voltage is high (more than or equal to the threshold voltage value), the charging and discharging circuit is controlled to provide large charging current for the capacitor to perform accelerated oscillation, so that the frequency of the output clock signal of the frequency signal generator is improved, the frequency of the output clock signal of the frequency signal generator can be stabilized near a certain frequency in a wider power voltage range, the stability of the frequency of the output clock signal of the frequency signal generator in a wide power voltage range is ensured, the performance of the frequency signal generator is ensured, and the application range of the frequency signal generator is improved.
In the embodiment, a frequency adjustment mode is adopted by a segmented frequency modulation mode (which can be divided into two or more segments according to actual needs, for example, the range of the power supply voltage is small and can be divided into two segments, and the range of the power supply voltage is large and can be divided into multiple segments) to ensure that the frequency of the output clock signal oscillates near a certain frequency, so that the stability of the frequency of the output clock signal of the frequency signal generator in a wide range of the power supply voltage is ensured, and the problem that the frequency of the output clock signal of the frequency signal generator is deviated due to a large input range of the power supply voltage is solved.
As a preferred embodiment, the method of the present invention includes a first threshold voltage value, and the current control circuit controls the charging and discharging circuit to increase the charging current amplitude in response to the power supply voltage being in a range above the threshold voltage value, specifically:
when the power supply voltage is larger than or equal to the first threshold voltage value, a control signal is output to control the charging and discharging circuit to increase the charging current amplitude.
As a preferred embodiment, the method of the present invention includes n threshold voltage values, where n is a positive integer greater than or equal to 2, and the current control circuit increases the charging current amplitude in response to the power supply voltage being in a range above the threshold voltage value, specifically:
the supply voltage is increased once by the charging current magnitude in a range above each threshold voltage value.
In a preferred embodiment, the n threshold voltage values are at least partially different.
The invention also provides a pre-starting circuit for pre-starting the bias circuit during power-on, so that the bias circuit can rapidly enter a steady-state working point.
As a preferred embodiment, the method of the present invention further comprises:
receiving a start signal, the bias circuit accelerates into a steady state operating point in response to the start signal.
As a preferred embodiment, the method of the present invention further comprises:
the bias current output is a function related to the performance parameters of the transistor devices of the bias circuit, and is independent of the power supply voltage.
As a preferred embodiment, the method of the present invention further comprises:
providing n detection modules arranged in the current control circuit, wherein the n detection modules are connected between a power supply voltage and the ground in parallel;
providing n paths of controllable modules, 1 path of current modules and 1 capacitor which are arranged in the charging and discharging circuit, wherein the n paths of controllable modules and the 1 path of current modules are connected between a power supply voltage and an upper polar plate of the capacitor in parallel, a lower polar plate of the capacitor is grounded, and n is a positive integer greater than or equal to 1;
the ith circuit detection module responds to the power supply voltage and outputs a control signal in a range above the threshold voltage value of the ith circuit detection module to control the ith circuit controllable module to provide charging current for the capacitor;
the current module receives the bias current and provides a charging current for the capacitor.
As a preferred embodiment, the threshold voltage values of the n-way detection modules of the present invention are at least partially different.
In another aspect, the present invention provides a frequency signal generator with a wide power supply range, comprising:
a bias circuit that outputs a bias current;
a charge and discharge circuit responsive to the bias current to generate a charge current for charging a capacitor;
a feedback output circuit responsive to a capacitor voltage of the charge and discharge circuit to generate a clock signal when the capacitor voltage reaches a roll-over level;
the current control circuit responds to the fact that the power supply voltage increases the charging current amplitude within the range above the threshold voltage value, and therefore the frequency of the clock signal output by the frequency signal generator is adjusted in a segmented mode according to the power supply voltage range.
As a preferred embodiment, the frequency signal generator of the present invention further comprises:
a start-up circuit that outputs a start-up signal to the bias circuit, the bias circuit accelerating into a steady-state operating point in response to the start-up signal.
As a preferred embodiment, the threshold voltage value of the present invention includes a first threshold voltage value;
when the power supply voltage is larger than or equal to the first threshold voltage value, the current control circuit outputs a control signal to control the charging and discharging circuit to increase the charging current amplitude.
As a preferred embodiment, the threshold voltage value of the present invention includes n threshold voltage values, where n is a positive integer greater than or equal to 2;
the current control circuit increases the charging current amplitude once within a range where the power supply voltage is above each threshold voltage value.
In a preferred embodiment, the n threshold voltage values are at least partially different.
As a preferred embodiment, the bias current output by the bias circuit of the present invention is a function related to the performance parameters of the transistor devices of the bias circuit themselves, independent of the supply voltage.
As a preferred embodiment, the current control circuit of the present invention comprises n detection modules, and the n detection modules are connected in parallel between the power voltage and ground;
the charging and discharging circuit comprises n paths of controllable modules, 1 path of current modules and 1 capacitor, wherein the n paths of controllable modules and the 1 path of current modules are connected between a power supply voltage and an upper polar plate of the capacitor in parallel, a lower polar plate of the capacitor is grounded, and n is a positive integer greater than or equal to 1;
the ith detection module outputs a control signal to control the ith controllable module to provide charging current for the capacitor in response to the power supply voltage within a range above the threshold voltage value of the ith detection module;
the current module receives the bias current and provides a charging current for the capacitor.
As a preferred embodiment, the threshold voltage values of the n-way detection modules of the present invention are at least partially different.
The invention has the following advantages and beneficial effects:
the invention improves the application range of the power supply voltage, controls the charging current of the charging and discharging circuit according to the power supply voltage (when the power supply voltage is low, the charging and discharging circuit is controlled to provide smaller charging current for the capacitor, when the power supply voltage is high, the charging and discharging circuit is controlled to provide larger current for the capacitor, and accelerated oscillation is carried out, so that the frequency of the output clock signal is improved), thereby ensuring the stability of the frequency of the output clock signal in a wide power supply voltage range and ensuring the performance of the frequency signal generator.
The invention also provides a pre-starting circuit which provides a pre-starting signal for the biasing circuit, so that the biasing circuit quickly enters a stable working point, and the reliability of the device is improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:
fig. 1 is a schematic block diagram of a frequency signal generator according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a first example of a circuit of a frequency signal generator according to an embodiment of the present invention.
Fig. 3 is a diagram illustrating simulation results of the frequency signal generator shown in fig. 2 according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of a second example of a circuit of a frequency signal generator according to an embodiment of the present invention.
Fig. 5 is a schematic diagram of a third example of a circuit of a frequency signal generator according to an embodiment of the present invention.
Fig. 6 is a schematic diagram of a frequency signal generator according to an embodiment of the present invention.
FIG. 7 is a diagram illustrating simulation results of the frequency signal generator shown in FIG. 6 according to an embodiment of the present invention.
Detailed Description
Hereinafter, the term "comprising" or "may include" used in various embodiments of the present invention indicates the presence of the invented function, operation or element, and does not limit the addition of one or more functions, operations or elements. Furthermore, as used in various embodiments of the present invention, the terms "comprises," "comprising," "includes," "including," "has," "having" and their derivatives are intended to mean that the specified features, numbers, steps, operations, elements, components, or combinations of the foregoing, are only meant to indicate that a particular feature, number, step, operation, element, component, or combination of the foregoing, and should not be construed as first excluding the existence of, or adding to the possibility of, one or more other features, numbers, steps, operations, elements, components, or combinations of the foregoing.
In various embodiments of the invention, the expression "or" at least one of a or/and B "includes any or all combinations of the words listed simultaneously. For example, the expression "a or B" or "at least one of a or/and B" may include a, may include B, or may include both a and B.
Expressions (such as "first", "second", and the like) used in various embodiments of the present invention may modify various constituent elements in various embodiments, but may not limit the respective constituent elements. For example, the above description does not limit the order and/or importance of the elements described. The above description is only intended to distinguish one element from another. For example, the first user device and the second user device indicate different user devices, although both are user devices. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of various embodiments of the present invention.
It should be noted that: if it is described that one constituent element is "connected" to another constituent element, the first constituent element may be directly connected to the second constituent element, and a third constituent element may be "connected" between the first constituent element and the second constituent element. In contrast, when one constituent element is "directly connected" to another constituent element, it is understood that there is no third constituent element between the first constituent element and the second constituent element.
The terminology used in the various embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the various embodiments of the invention. As used herein, the singular forms are intended to include the plural forms as well, unless the context clearly indicates otherwise. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which various embodiments of the present invention belong. The terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning that is consistent with their contextual meaning in the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein in various embodiments of the present invention.
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to examples and the accompanying drawings, and the exemplary embodiments and descriptions thereof are only used for explaining the present invention and are not used as limiting the present invention.
Example 1
When the input range of the power supply voltage is too large, the frequency of the clock signal output by the conventional frequency signal generator may deviate, and the frequency of the output clock signal may decrease with the increase of the power supply voltage (the larger the power supply voltage is, if the charging circuit is not changed, and the charging current or voltage provided for the charging circuit is not changed, the longer the charging time is required, the longer the clock signal is inverted, that is, the frequency of the output signal decreases), so that the accuracy of the frequency of the clock signal decreases, and the working performance of the entire integrated circuit may be affected, especially the larger the range of the power supply voltage is, the greater the effect is. The event can't keep the stable problem of clock signal frequency under wide range mains voltage's application to current RC oscillating circuit, and this embodiment is through setting up current control circuit, controls charge circuit's charging current according to mains voltage, specifically is: when the power voltage is low, the charging and discharging circuit is controlled to provide a small charging current for the capacitor; when the power supply voltage is high, the charge-discharge circuit is controlled to provide large charge current for the capacitor to perform accelerated oscillation, so that the frequency of the output clock signal is improved, the frequency of the output clock signal of the frequency signal generator can be stabilized near a certain frequency in a wider power supply range, and the problem of frequency deviation of the output clock signal of the frequency signal generator caused by the large input range of the power supply voltage is solved.
Further, the frequency signal generator provided in the embodiment of the present invention adopts a segmented frequency modulation manner to realize a stable condition of the frequency of the output clock signal, specifically: according to the power supply voltage range of practical application, if the power supply voltage range is smaller, a two-stage frequency modulation mode can be adopted, namely, a threshold voltage value is adopted for realizing, and when the power supply voltage is larger than or equal to the threshold voltage value, the charging and discharging circuit is controlled to increase the charging current amplitude; if the range of the power supply voltage is large, a multi-section frequency hopping mode can be adopted, namely, the frequency hopping mode is realized by adopting at least two threshold voltage values, when the power supply voltage is more than or equal to one threshold voltage value, the charging and discharging circuit is controlled to increase the amplitude of the primary charging current, and when the power supply voltage is more than or equal to the other threshold voltage value, the charging and discharging circuit is controlled to increase the amplitude of the primary charging current, namely, the amplitude of the secondary charging current is increased at least twice. At least two threshold voltage values are at least partially different.
As shown in fig. 1, the frequency signal generator according to the embodiment of the present invention includes a start circuit, a bias circuit, a current control circuit, a charge/discharge circuit, and a feedback output circuit.
When the system is powered on, the starting circuit outputs a signal to control the bias circuit to accelerate to enter a steady-state working point, so that the bias circuit is prevented from being abnormally started.
And the bias circuit quickly enters a steady-state working point under the pre-starting of the starting circuit after the system is powered on, and outputs bias current to the charging and discharging circuit.
And the current control circuit responds to the power supply voltage within the range above the threshold voltage value to control the charge-discharge circuit to increase the charging current amplitude, so that the frequency of the clock signal output by the frequency signal generator is regulated in a segmented manner according to the power supply voltage range, and the stability of the frequency of the output signal is kept within a wide power supply voltage range. The current control circuit mainly comprises n detection modules, wherein the n detection modules are connected between a power supply voltage and the ground in parallel, and n is a positive integer greater than or equal to 1. Each detection module increases the charging current magnitude in response to the power supply voltage being within a range above its corresponding threshold voltage value.
The charging and discharging circuit charges the capacitor by utilizing the characteristic that the MOS device is in a resistive state when being conducted, the charging current is controlled by the current control circuit, and when the voltage of the upper electrode plate of the capacitor reaches the turnover level, the rear stage is triggered to generate a clock signal. The charging and discharging circuit mainly comprises at least n controllable modules, 1 current module and 1 capacitor, wherein the n controllable modules and the 1 current module are connected between a power supply voltage and an upper polar plate of the capacitor in parallel, a lower polar plate of the capacitor is grounded, and n is a positive integer greater than or equal to 1. Each controllable module is used for receiving the bias current output by the bias circuit and providing charging current for the capacitor under the control of the corresponding detection module; the current module is used for receiving the bias current output by the bias circuit and providing charging current for the capacitor.
And the feedback output circuit outputs a low level signal when the front level signal reaches the turnover level, and the charge and discharge circuit discharges, so that the output signal is turned over and forms a clock signal to be output.
Example 2
The present embodiment will explain the frequency signal generator proposed in embodiment 1 in detail, taking the case of dividing the power supply voltage into two stages to adjust the frequency of the output clock signal.
As shown in fig. 2, in the frequency signal generator of the present embodiment:
the starting circuit M1 is composed of a PMOS tube P1, a capacitor C1 and a PMOS tube P2. The source electrode of the P1 is connected with the power voltage vcc, the grid electrode of the P1 is grounded vss, and the drain electrode of the P1 is connected with the upper polar plate of the capacitor C1 and the grid electrode of the P2; the upper polar plate of the capacitor C1 is connected with the drain electrode of the P1 and the grid electrode of the P2, and the lower polar plate of the capacitor C1 is grounded vss; the source of P2 is connected with the power voltage vcc, the grid of P2 is connected with the drain of P1 and the upper plate of C1, and the drain of P2 is connected with the bias circuit.
The bias circuit M2 is composed of a PMOS tube P3, a PMOS tube P4, an NMOS tube N1, an NMOS tube N2 and a resistor R1. The source electrode of P3 is connected with the power voltage vcc, the drain electrode of P3 is connected with the drain electrode of N1, and the grid electrode of P3 is connected with the grid electrode of P4; the source electrode of the P4 is connected with the power voltage vcc, the drain electrode of the P4 is connected with the drain electrode of the N2, and the grid electrode of the P4 is connected with the grid electrode of the P3; the drain electrode of N1 is connected with the drain electrode of P3, the source electrode of N1 is connected with one end of R1, and the grid electrode of N1 is connected with the grid electrode of N2, the drain electrode of P2 and the drain electrode of N2; the drain electrode of N2 is connected with the drain electrode of P4, the grid electrode of N2 and the drain electrode of P2, the source electrode of N2 is grounded vss, the grid electrode of N2 is connected with the grid electrode of N1, the drain electrode of N2 and the drain electrode of P2; one end of R1 is connected with the source electrode of N1, and the other end of R1 is connected with vss. P3 and P4 form a current mirror, and N1 and N2 form a current mirror; the gate and drain of P3 are connected to a common terminal (i.e., nodeB) as the output terminal of the bias circuit M3, outputting a bias current. The generation principle of the bias current is as follows:
wherein,
for the current to flow through P3 and P4,
is a gate-source voltage of N1,
is the gate voltage of N2 and,
in order to turn on the voltage, the voltage is,
is a resistance value of the resistor R1,
and
are intermediate variables used for formula derivation.
According to the formulae (1) to (3):
according to the equation (4), the bias current generated by the bias circuit is related to the performance parameters of the MOS transistor, and is independent of the power supply voltage.
The current control circuit is mainly composed of 1-path detection modules, and fig. 2 illustrates the current control circuit by taking the 1-path detection module as an example, but not limited thereto. The detection module shown in fig. 2 is composed of an NMOS transistor N3, an NMOS transistor N4, a resistor R2, an NMOS transistor N5, an NMOS transistor N6, and a non-inverting device I1. The drain and the grid of the N3 are both connected with the power voltage vcc, and the source of the N3 is connected with the drain and the grid of the N4; the drain and the grid of the N4 are both connected with the source of the N3, and the source of the N4 is connected with the grid of the N6; one end of R2 is connected with the power voltage vcc, and the other end of R2 is connected with the drain of N5 and the input end of I1; the drain electrode of N5 is connected with the input ends of R2 and I1, the grid electrode of N5 is connected with an enable signal EN, and the source electrode of N5 is connected with the drain electrode of N6; the drain electrode of the N6 is connected with the source electrode of the N5, the grid electrode of the N6 is connected with the source electrode of the N4, and the source electrode of the N6 is grounded vss; the output end of the I1 is used as the output end of the current control circuit and outputs a control signal to the charge and discharge circuit M4.
The charge and discharge circuit M4 is mainly composed of at least 1 controllable module, 1 current module, and 1 capacitor C2, and fig. 2 illustrates the 1 controllable module by way of example, but not limited thereto. The controllable module comprises a PMOS pipe P5 and a PMOS pipe P6; the current module comprises a PMOS pipe P7. The source electrode of the P5 is connected with the power voltage vcc, the grid electrode of the P5 is connected with the output end of the bias circuit, and the drain electrode of the P5 is connected with the source electrode of the P6; the source electrode of P6 is connected with the drain electrode of P5, the grid electrode of P6 is connected with the output end of the current control circuit, namely the output end of I1, and the drain electrode of P6 is connected with the upper polar plate of C2 and the drain electrode of P7; the source electrode of the P7 is connected with the power voltage vcc, the grid electrode of the P7 is connected with the output end of the bias circuit, and the drain electrode of the P7 is connected with the drain electrode of the P6 and the upper polar plate of the C2; the upper polar plate of C2 is connected with the drain electrode of P6 and the drain electrode of P7, and the lower polar plate of C2 is grounded vss; the common terminal of C2 and P6, P7 is used as the output terminal of the charge-discharge circuit, namely nodeA. P5 and P3, and P7 and P3 constitute a current mirror.
The feedback output circuit M5 mainly comprises a hysteresis module, an NMOS tube N7 and an NAND gate I3; the input end of the hysteresis module is connected to the output end of the charge-discharge module, i.e. nodeA, and the output end of the hysteresis module is used as the output end of the feedback output circuit M5 to output a clock signal. When the signal output by the charging and discharging module reaches the turnover level, the delay module converts the clock output signal from a high level to a low level signal. One input end of the I3 is connected with the output end of the hysteresis module, the other input end of the I3 is connected with an enable signal EN, and the output end of the I3 is connected with the grid electrode of the N7; the grid of N7 is connected with the output end of I3, the source of N7 is grounded vss, and the drain of N7 is connected with the input end of I2.
The working principle of the frequency signal generator shown in fig. 2 is as follows:
in the power-on process of the power supply voltage vcc, when vcc is less than Vtp1 (the conducting voltage of P1), P1 is not conducted, the voltage of the upper plate of the capacitor C1 is low level, P2 is conducted, so that the drain electrode of P2 is the power supply voltage vcc, N1 and N2 are in a weak conducting state, and the state can enable the biasing circuit M2 to enter a steady state more quickly and output the biasing current; when vcc is larger than or equal to Vtp1, P1 is conducted, power supply voltage vcc charges capacitor C1, the voltage of the upper electrode plate of capacitor C1 rises, P2 is closed, and the starting function is completed. When vcc is stabilized, the P3 and P4 current mirrors, the N1 and N2 current mirrors and the resistor R1 act together to generate a bias current, and the P3, P5 and P7 current mirrors are used for providing charging current for the charging and discharging circuit. When vcc < (VthN 3+ VthN 4), wherein VthN3 is the on voltage of N3, vthN4 is the on voltage of N4, then N3 and N4 cannot be turned on, the gate voltage of N6 is low level, N6 cannot be turned on, then the input terminal of I1 is pulled up to the power voltage through the resistor R2, so that the output of I1 is high level, and then P6 is turned off, so that the charging current is only P7; when vcc is not less than (VthN 3+ VthN 4), N3 and N4 are turned on, the gate of N6 is pulled up to a high level, N6 is turned on, so that the input end of I1 is pulled down to a low level, I1 outputs a low level, and P6 is turned on, and then two paths of currents output by the controllable circuit and the current circuit are added to be used as a charging current, that is, the frequency signal generator of the embodiment provides a small charging current (i.e., one path of P7) for the charging and discharging circuit when the power voltage is small, and provides a large charging current (P5 and P7) for the charging and discharging circuit when the power voltage is large, so that accelerated oscillation is realized, and the frequency of the output clock signal is improved. The frequency signal generator shown in fig. 2 controls the frequency of the output clock signal in two segments (with the on-state voltages of N3 and N4 as thresholds) by using the 1-channel detection module and the 1-channel controllable module corresponding thereto, so as to achieve the purpose of adjusting the frequency of the output clock signal according to the power supply voltage and keeping the frequency within a certain frequency range.
By using the frequency signal generator provided in this embodiment for simulation, a graph of the variation of the output clock signal frequency with the power supply voltage as shown in fig. 3 can be obtained, and as can be seen from fig. 3, after the on-voltage threshold of the detection module is reached, the output clock signal frequency will increase, thereby ensuring that the output clock signal frequency can be maintained within a certain frequency range within a wide power supply range.
Further, in another preferred embodiment, the threshold voltage value can be adjusted by adjusting the number of devices having a turn-on function, for example, a current control module M3A shown in fig. 4, which uses one NMOS transistor N3A to perform a step frequency modulation, that is, the turn-on voltage of N3A is used as the threshold voltage value, according to the above working principle, when vcc < VthN3A, where VthN3A is the turn-on voltage of N3A, N3A cannot be turned on, the gate voltage of N6a is low level, N6a cannot be turned on, the input terminal of I1a is pulled up to the power supply voltage through a resistor R2a, so that I1a outputs high level, and further P6a is turned off, so that the charging current is only P7; when vcc is larger than or equal to VthN3a, N3a is turned on, the gate of N6a is pulled up to a high level, N6a is turned on, so that the input end of I1a is pulled down to a low level, I1a outputs a low level, and P6a is turned on, and then two paths of currents output by the controllable circuit and the current circuit are added to be used as a charging current, that is, the frequency signal generator of the embodiment provides a small charging current (i.e., one path of P7) for the charging and discharging circuit when the power supply voltage is small, and provides a large charging current (P5 a and P7) for the charging and discharging circuit when the power supply voltage is large, so that accelerated oscillation is realized, and the frequency of the output clock signal is increased.
Further, in another preferred embodiment, as shown in fig. 5, the current control module M3B may also perform segmented frequency modulation by using a sum of conduction voltage values of three NMOS transistors (N3B, N4B, and N8B) as a threshold voltage value, and the working principle is as described above, which is not described herein again.
Therefore, in this embodiment, the current control module M3A or M3B may be used to replace the M3 module, so that the segmented frequency modulation control of different threshold voltage values may be implemented.
The current control circuit in this embodiment uses an NMOS transistor to realize the control of the charging current, and in another preferred embodiment, it may also use other devices, such as a PMOS transistor, a triode, and a diode, which have conduction performance.
The threshold voltage value is constructed by adopting the conduction voltage value of the transistor, and devices such as a comparator and the like are not needed, so that the structure is simple and the implementation is convenient.
Example 3
The present embodiment takes the case of dividing the power supply voltage into three segments to adjust the frequency of the output clock signal, and the frequency signal generator proposed in the above embodiment will be described in detail.
The start module, the bias module, and the feedback output module in the frequency signal generator are the same as those described in embodiment 2, and therefore are not described again in this embodiment, and this embodiment mainly describes the current control circuit and the charge and discharge circuit in detail, as shown in fig. 6.
The current control circuit of the frequency signal generator of the embodiment is composed of 2 detection modules (namely, M3C and M3D), wherein the 2 detection modules are connected in parallel between a power source vcc and a ground vss, and the first detection module (namely, M3C) is mainly composed of an NMOS tube N3C, a resistor R2C, an NMOS tube N5C, an NMOS tube N6C and a non-inverting device I1C; the second path of detection module, namely M3D, mainly comprises an NMOS tube N3D, an NMOS tube N4D, a resistor R2D, an NMOS tube N5D, an NMOS tube N6D and a non-inverter I1D. The drain and the gate of the N3c are both connected with a power supply voltage vcc, and the source of the N3c is connected with the gate of the N6 c; one end of R2c is connected with the power supply voltage vcc, and the other end of R2c is connected with the drain electrode of N5c and the input end of I1 c; the drain electrode of the N5c is connected with the input ends of the R2c and the I1c, the source electrode of the N5c is connected with the drain electrode of the N6c, and the grid electrode of the N5c is connected with an enable signal EN; the drain electrode of the N6c is connected with the source electrode of the N5c, the grid electrode of the N6c is connected with the source electrode of the N3c, and the source electrode of the N6c is grounded vss; the input end of I1c is connected to the common connecting end of R2c and N5c, and the output end of I1c is used as the output end of the detection module. The drain and the gate of the N3d are both connected with the power supply voltage vcc, and the source of the N3d is connected with the drain and the gate of the N4 d; the drain and the grid of the N4d are both connected with the source of the N3d, and the source of the N4d is connected with the grid of the N6 d; one end of R2d is connected with the power supply voltage vcc, and the other end of R2d is connected with the drain electrode of N5d and the input end of I1 d; the drain electrode of the N5d is connected with the input ends of the R2d and the I1d, the grid electrode of the N5d is connected with an enable signal EN, and the source electrode of the N5d is connected with the drain electrode of the N6 d; the drain electrode of the N6d is connected with the source electrode of the N5d, the grid electrode of the N6d is connected with the source electrode of the N4d, and the source electrode of the N6d is grounded vss; the input end of the I1d is connected with the common connection end of the R2d and the N5d, and the output end of the I1d is used as the output end of the detection module.
The charging and discharging circuit mainly comprises 2 paths of controllable modules, 1 path of current module and a capacitor C2. The 2-path controllable module and the 1-path current module are connected in parallel between a power supply voltage vcc and an upper polar plate of a capacitor C2, the 1 st-path controllable module receives a bias current output by a bias circuit and provides a charging current for the capacitor C2 under the control of a signal output by the 1 st-path detection module (namely M3C), the 2 nd-path controllable module receives the bias current output by the bias circuit and provides the charging current for the capacitor C2 under the control of a signal output by the 2 nd-path detection module (namely M3D), and the current module receives the bias current output by the bias circuit and provides the charging current for the capacitor C2; the 1 st controllable module mainly comprises a PMOS (P-channel metal oxide semiconductor) tube P5c and a PMOS tube P6 c; the 2 nd controllable module mainly comprises a PMOS (P-channel metal oxide semiconductor) tube P5d and a PMOS tube P6 d; the current module mainly comprises a PMOS pipe P7. The source of P5c is connected with the power supply voltage vcc, the grid of P5c is connected with the output end of the bias circuit, namely the drain of nodeB, P5c is connected with the source of P6 c; the source electrode of the P6C is connected with the drain electrode of the P5C, the grid electrode of the P6C is connected with the output end of the M3C, namely the output end of the I1C, and the drain electrode of the P6C is connected with the upper electrode plate of the capacitor C2; the source electrode of the P5d is connected with the power supply voltage vcc, the grid electrode of the P5d is connected with the output end of the bias circuit, namely, nodeB, and the drain electrode of the P5d is connected with the source electrode of the P6 d; the source electrode of the P6D is connected with the drain electrode of the P5D, the grid electrode of the P6D is connected with the output end of the M3D, namely the output end of the I1D, and the drain electrode of the P6D is connected with the upper electrode plate of the capacitor C2; the source electrode of the P7 is connected with the power supply voltage vcc, the grid electrode of the P7 is connected with the output end of the bias circuit, namely nodeB, and the drain electrode of the P7 is connected with the upper electrode plate of the capacitor C2; the upper plate of the capacitor C2 is connected with the drain electrode of the P6C, the drain electrode of the P7 and the drain electrode of the P6d, and the lower plate of the capacitor C2 is grounded vss. The upper polar plate of the capacitor C2 is used as the output end of the charge-discharge circuit M4A to provide a turning signal for the rear-stage module.
If VthN3c < (VthN 3d + VthN4 d) is set, where VthN3c is the turn-on voltage of N3c, vthN3d is the turn-on voltage of N3d, and VthN4d is the turn-on voltage of N4 d.
The working principle of the frequency signal generator of this embodiment is as follows:
when vcc is less than VthN3c, N3d and N4d are not conducted, grid voltages of N6c and N6d are both low levels, and N6c and N6d cannot be conducted, so that input ends of I1c and I1d are respectively pulled up to power supply voltage through resistors R2c and R2d, outputs of I1c and I1d are both high levels, and then P6c and P6d are closed, and the charging current is only P7; when VthN3c is not more than vcc < (VthN 3d + VthN4 d), N3c is turned on, N3d and N4d are not turned on, the gate of N6c is pulled up to a high level, so that N6c is turned on, the input end of I1c is pulled down to a low level, I1c outputs a low level, P6c is further turned on, N6d is still not turned on, so that the input end of I1d maintains a high level, I1d outputs a high level, and P6d maintains a closed state, and then the two paths of currents output by the 1 st controllable circuit and the current circuit are added to serve as charging currents, i.e., along with the rise of the power supply voltage, the charging currents are increased, and accelerated oscillation is realized; with further increase of the power supply voltage, when vcc ≧ (VthN 3d + VthN4 d) is met, then N3c, N3d, and N4d are all turned on, gate voltages of N6c and N6d are pulled up to a high level, and N6c and N6d are both turned on, then input ends of I1c and I1d are pulled down to a low level, so that outputs of I1c and I1d are both low levels, and then P6c and P6d are turned on, then three currents output by the 1 st controllable circuit, the 2 nd controllable circuit, and the current circuit are added to be used as a charging current, that is, with further increase of the power supply voltage, the charging current is further increased, and accelerated oscillation is realized; that is, the frequency signal generator of this embodiment provides a smaller charging current (i.e., one path P7) for the charging and discharging circuit when the power supply voltage is smaller, provides a larger charging current (P5 c and P7) for the charging and discharging circuit when the power supply voltage is larger, and provides a larger charging current (P5 c, P5d and P7) for the charging and discharging circuit when the power supply voltage is further increased, thereby realizing accelerated oscillation and increasing the frequency of the output clock signal.
By adopting the frequency signal generator provided by the embodiment for simulation, a graph of the frequency of the output clock signal along with the change of the power supply voltage as shown in fig. 7 can be obtained, as can be seen from fig. 7, when the power supply voltage is less than the turn-on voltage of the 1 st detection module, both the first controllable module and the second controllable module are turned off, the charging current is only provided by the current module, and the oscillation frequency is low; after the on-voltage of the 1 st detection module is reached but the on-voltage of the 2 nd detection module is not reached, the first controllable module conducts the second controllable module and is switched off, the charging current is increased, and the oscillation is accelerated; after the conduction voltage of the 2 nd detection module is reached, the first controllable module and the second controllable module are both conducted, the charging current is further increased, and the oscillation is further accelerated. Finally, the frequency of the clock output signal can be adjusted by dividing the power supply voltage into three sections by setting two threshold voltage values, so that the frequency of the output clock signal can be kept in a certain frequency range in a wide power supply range.
In another preferred embodiment, in order to adjust the frequency of the output clock signal more accurately, more detection modules and corresponding controllable modules can be arranged to divide the power supply voltage into more segments for adjustment.
In other preferred embodiments, each detection module may select an appropriate threshold voltage value according to actual needs.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are merely exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (14)
1. A method of frequency modulation for a frequency signal generator for a wide power supply range, the method comprising:
providing a bias circuit, wherein the bias circuit outputs a bias current;
providing a charge and discharge circuit, wherein the charge and discharge circuit generates a charge current in response to the bias current and is used for charging a capacitor;
providing a feedback output circuit, wherein the feedback output circuit responds to the fact that when the capacitor voltage of the charge and discharge circuit reaches an overturning level, a clock signal is generated;
providing a current control circuit, wherein the current control circuit responds to the power supply voltage within the range above the threshold voltage value to control the charging and discharging circuit to increase the charging current amplitude value, so as to adjust the frequency of the clock signal output by the frequency signal generator in a segmented manner according to the power supply voltage range;
the method further comprises the following steps:
providing n detection modules arranged in the current control circuit, wherein the n detection modules are connected between a power supply voltage and the ground in parallel;
providing n paths of controllable modules, 1 path of current modules and 1 capacitor which are arranged in the charging and discharging circuit, wherein the n paths of controllable modules and the 1 path of current modules are connected between a power supply voltage and an upper polar plate of the capacitor in parallel, a lower polar plate of the capacitor is grounded, and n is a positive integer greater than or equal to 1;
the ith circuit detection module responds to the power supply voltage and outputs a control signal in a range above the threshold voltage value of the ith circuit detection module to control the ith circuit controllable module to provide charging current for the capacitor;
the current module receives the bias current and provides a charging current for the capacitor.
2. A frequency modulation method as claimed in claim 1, characterized in that the method comprises a first threshold voltage value, and the current control circuit controls the charging and discharging circuit to increase the charging current amplitude in response to the supply voltage being above the threshold voltage value, in particular:
when the power supply voltage is larger than or equal to the first threshold voltage value, a control signal is output to control the charging and discharging circuit to increase the charging current amplitude.
3. A frequency modulation method as claimed in claim 1, characterized in that the method comprises n threshold voltage values, where n is a positive integer equal to or greater than 2, and the current control circuit increases the charging current magnitude in response to the supply voltage being in a range above the threshold voltage values, in particular:
the supply voltage is increased once by the charging current magnitude in each range above the threshold voltage value.
4. A method of frequency modulation as claimed in claim 3, wherein n of said threshold voltage values are at least partially different.
5. A method of frequency modulation as claimed in claim 1, the method further comprising:
receiving a start signal, the bias circuit accelerates into a steady state operating point in response to the start signal.
6. Frequency modulation method as claimed in claim 1, characterized in that the method further comprises:
the bias current output is a function related to the performance parameters of the transistor devices of the bias circuit, and is independent of the power supply voltage.
7. Frequency modulation method according to claim 1, characterized in that the threshold voltage values of the n-way detection modules differ at least partially.
8. A wide power supply range frequency signal generator, comprising:
a bias circuit that outputs a bias current;
a charge and discharge circuit responsive to the bias current to generate a charge current for charging a capacitor;
a feedback output circuit responsive to a capacitor voltage of the charge and discharge circuit to generate a clock signal when the capacitor voltage reaches a roll-over level;
a current control circuit responsive to a supply voltage increasing the charging current amplitude in a range above a threshold voltage value to adjust the frequency of the output clock signal of the frequency signal generator in stages according to the supply voltage range;
the current control circuit comprises n detection modules, and the n detection modules are connected between the power supply voltage and the ground in parallel;
the charging and discharging circuit comprises n controllable modules, 1 current module and 1 capacitor, wherein the n controllable modules and the 1 current module are connected in parallel between a power supply voltage and an upper polar plate of the capacitor, a lower polar plate of the capacitor is grounded, and n is a positive integer greater than or equal to 1;
the ith detection module responds to the condition that the power supply voltage is in a range above the threshold voltage value of the ith detection module to output a control signal to control the ith controllable module to provide charging current for the capacitor;
the current module receives the bias current and provides a charging current for the capacitor.
9. The wide power range frequency signal generator of claim 8, further comprising:
a start-up circuit that outputs a start-up signal to the bias circuit, the bias circuit accelerating into a steady-state operating point in response to the start-up signal.
10. The wide power supply range frequency signal generator of claim 8, wherein said threshold voltage value comprises a first threshold voltage value;
when the power supply voltage is larger than or equal to the first threshold voltage value, the current control circuit outputs a control signal to control the charging and discharging circuit to increase the charging current amplitude.
11. The wide power supply range frequency signal generator of claim 8, wherein said threshold voltage values comprise n threshold voltage values, wherein n is a positive integer greater than or equal to 2;
the current control circuit increases the charging current amplitude once within a range where the power supply voltage is above each threshold voltage value.
12. The wide power supply range frequency signal generator of claim 11, wherein n of said threshold voltage values are at least partially different.
13. The wide power-supply-range frequency signal generator of claim 8, wherein the bias current output by the bias circuit is a function of a performance parameter of a transistor device of the bias circuit, independent of the supply voltage.
14. The wide power range frequency signal generator of claim 8, wherein the threshold voltage values of the n-way detection modules are at least partially different.
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