CN210199737U - Watchdog circuit based on single chip microcomputer and processing circuit based on ARM - Google Patents
Watchdog circuit based on single chip microcomputer and processing circuit based on ARM Download PDFInfo
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- CN210199737U CN210199737U CN201921516941.5U CN201921516941U CN210199737U CN 210199737 U CN210199737 U CN 210199737U CN 201921516941 U CN201921516941 U CN 201921516941U CN 210199737 U CN210199737 U CN 210199737U
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Abstract
The application provides a watchdog circuit based on a single chip microcomputer and a processing circuit based on an ARM (advanced RISC machine), wherein the watchdog circuit is applied to the reset of an ARM chip and comprises the single chip microcomputer and the ARM reset circuit, and a data communication port of the single chip microcomputer is connected with a PWM (Pulse width modulation) port of the ARM chip; an I/O port (input/output port) of the singlechip is connected with a reset signal input end of the ARM reset circuit; the ARM power supply is connected with the power supply input end of the ARM reset circuit; and the output end of the ARM reset circuit is connected with the power port of the ARM chip. Therefore, the reset time can be flexibly set aiming at different running states of the ARM chip, so that the reset of the ARM is flexibly controlled, the problem of failure in on-line program burning caused by the reset of the ARM is avoided as much as possible, and the running stability of the ARM can be further improved.
Description
Technical Field
The application relates to the technical field of electronic science, in particular to a watchdog circuit based on a single chip microcomputer and a processing circuit based on an ARM.
Background
The running stability of ARM (Advanced RISC Machine) is not particularly good, and the problems of jamming and program running are occasionally caused. In order to recover the ARM, the ARM can be reset after the ARM fails. However, the conventional reset method has a short reset time, and the problem of failed on-line program burning can be caused by resetting the failed ARM in the on-line program burning process which needs a long time.
SUMMERY OF THE UTILITY MODEL
An object of the embodiment of the application is to provide a watchdog circuit based on a single chip microcomputer and a processing circuit based on an ARM, so that the reset time of the ARM is flexibly controlled, and the problem of program online burning failure caused by short reset time of the ARM is avoided as much as possible.
In order to achieve the above object, embodiments of the present application are implemented as follows:
the embodiment of the application provides a watchdog circuit based on a single chip microcomputer, which is applied to the reset of an ARM chip, wherein the watchdog circuit comprises the single chip microcomputer and the ARM reset circuit, and a data communication port of the single chip microcomputer is connected with a PWM (Pulse width modulation) port of the ARM chip; an I/O port (input/output port) of the singlechip is connected with a reset signal input end of the ARM reset circuit; the ARM power supply is connected with the power supply input end of the ARM reset circuit; and the output end of the ARM reset circuit is connected with the power port of the ARM chip.
A relatively independent watchdog circuit is designed based on a single chip microcomputer and used for resetting an ARM chip, and the time for resetting the ARM can be flexibly controlled. The single chip microcomputer of the watchdog circuit is connected with the PWM port of the ARM chip, the running state of the ARM can be detected, and the ARM reset circuit of the watchdog circuit is controlled by the single chip microcomputer and can reset the ARM chip, so that the reset of the ARM chip is controlled by the single chip microcomputer. Aiming at different running states of the ARM chip, the reset time can be flexibly set, so that the problem of program online burning failure caused by resetting the ARM by a traditional reset circuit (a watchdog of the ARM) is avoided as much as possible, and the running stability of the ARM can be further improved.
With reference to the first aspect, in a first possible implementation manner of the first aspect, the watchdog circuit further includes a voltage conversion circuit connected between the single chip microcomputer and the ARM reset circuit, and an input end of the voltage conversion circuit is connected to an I/O port of the single chip microcomputer; and the output end of the voltage conversion circuit is connected with the reset signal input end of the ARM reset circuit.
The voltage conversion circuit arranged between the single chip microcomputer and the ARM reset circuit can realize the reset control of the single chip microcomputer with different operating voltages on the ARM, so that the selection of the single chip microcomputer is wider, and the applicability of the watchdog circuit based on the single chip microcomputer is improved.
With reference to the first possible implementation manner of the first aspect, in a second possible implementation manner of the first aspect, the voltage conversion circuit includes a triode, a first resistor, a second resistor, and a third resistor, and the first resistor is connected between an I/O port of the single chip microcomputer and a base of the triode; the emitting electrode of the triode is grounded; one end of the second resistor is connected between the I/O port of the singlechip and the first resistor, and the other end of the second resistor is grounded through the emitter; the third resistor is connected between the collector of the triode and the reset signal input end of the ARM reset circuit.
Through using the triode, the conversion of voltage is realized, and the stability of voltage conversion and the safety of the whole watchdog circuit can be ensured.
With reference to the second possible implementation manner of the first aspect, in a third possible implementation manner of the first aspect, the ARM reset circuit includes a P-channel enhancement type field-effect transistor and a fourth resistor, and a source of the P-channel enhancement type field-effect transistor is connected to the ARM power supply; the drain electrode of the P-channel enhanced field effect transistor is connected with the power supply port of the ARM chip; the grid electrode of the P-channel enhanced field effect transistor is connected with the collector electrode of the triode through the third resistor; the fourth resistor is connected between the ARM power supply and the third resistor.
The power input of the ARM chip is controlled by using the P-channel enhanced field effect transistor, and after a reset signal is received, the power input of the ARM chip is controlled by turning off and on the P-channel enhanced field effect transistor, so that the reset of the ARM chip can be realized. Because the power input of the ARM chip is controlled, the main power supply of the ARM can be turned on and off, and the ARM is reset more thoroughly.
With reference to the first aspect, in a fourth possible implementation manner of the first aspect, the power supply of the single chip microcomputer is connected to the power port of the single chip microcomputer, the watchdog circuit further includes a reset circuit of the single chip microcomputer, and the reset circuit of the single chip microcomputer is connected between the power supply of the single chip microcomputer and the reset port of the single chip microcomputer.
The singlechip reset circuit can be used for resetting the singlechip, thereby ensuring the stable operation of the singlechip.
With reference to the fourth possible implementation manner of the first aspect, in a fifth possible implementation manner of the first aspect, the single chip microcomputer reset circuit includes a fifth resistor and a first capacitor, and one end of the fifth resistor is connected to the single chip microcomputer power supply; the other end of the fifth resistor is connected with one end of the first capacitor; the other end of the first capacitor is grounded; and a reset port of the singlechip is connected between the fifth resistor and the first capacitor.
The reset of the singlechip can be realized through the mode, and the singlechip has higher stability.
With reference to the first aspect, in a sixth possible implementation manner of the first aspect, the watchdog circuit further includes a second capacitor, and one end of the second capacitor is connected between the PWM port of the ARM chip and the data communication port of the single chip microcomputer; the other end of the second capacitor is grounded.
And a capacitor is arranged at the PWM port of the ARM chip and the data communication port of the singlechip and connected with the capacitor so as to realize the function of removing trembles (burrs).
With reference to the first aspect, in a seventh possible implementation manner of the first aspect, the watchdog circuit further includes a program burning serial port, and a power port of the program burning serial port is connected to a serial power supply; the data sending port of the program burning serial port is connected with the data sending port of the single chip microcomputer; the data receiving port of the program burning serial port is connected with the data receiving port of the single chip microcomputer; and the grounding port of the program burning serial port is grounded.
The program burning serial port is connected, and the program can be burned into the single chip microcomputer through the serial port, so that the program can be conveniently changed, and the ARM resetting time can be flexibly set.
With reference to the first aspect or any one of the first to the seventh possible implementation manners of the first aspect, in an eighth possible implementation manner of the first aspect, the single chip microcomputer is STC8F1K 08.
The single chip microcomputer with the model STC8F1K08 is simple in structure, low in cost, suitable in pin number and small in occupied space of the whole single chip microcomputer.
In a second aspect, an embodiment of the present application provides an ARM-based processing circuit, where the processing circuit includes an ARM chip and any one of the first aspect or possible implementations of the first aspect, the watchdog circuit based on the single chip microcomputer, a PWM port of the ARM chip is connected to an input terminal of the watchdog circuit, a power port of the ARM chip is connected to an output terminal of the watchdog circuit, and the power port is used for resetting the ARM chip.
The processing circuit based on the ARM is provided with the independent watchdog circuit, the reset time of the ARM can be flexibly controlled, the problem of program burning failure caused by short reset time in the program on-line burning process of the ARM can be avoided as much as possible, and therefore the running stability of the ARM is improved.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 is a block diagram of a watchdog circuit based on a single chip microcomputer according to an embodiment of the present application.
Fig. 2 is a circuit diagram of a watchdog based on a single chip microcomputer according to an embodiment of the present application.
Icon: 10-watchdog circuit based on single chip microcomputer; 11-a single chip microcomputer; 12-ARM reset circuit; 13-a voltage conversion circuit; 14-a singlechip reset circuit; 15-programming a serial port; c1 — first capacitance; c2 — second capacitance; r1 — first resistance; r2 — second resistance; r3 — third resistance; r4-fourth resistor; r5-fifth resistor; x1-program burning serial port.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.
In the description of the present application, it should be noted that the terms "inside", "outside", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings or orientations or positional relationships that the products of the application usually place when using, and are only used for convenience in describing the present application and simplifying the description, but do not indicate or imply that the devices or elements that are referred to must have a specific orientation, be constructed in a specific orientation, and operate, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like are used merely to distinguish one description from another, and are not to be construed as indicating or implying relative importance.
It should also be noted that, unless expressly stated or limited otherwise, the terms "disposed" and "connected" are to be construed broadly, e.g., as meaning fixedly connected, detachably connected, or integrally connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
The stability of ARM operation is not particularly good, and occasionally, the problems of jamming and program running disorder occur. Particularly, in the on-line program burning process which needs to spend a long time, because the reset time is not well controlled by the traditional watchdog circuit design, the reset time is too short, so that the reset signal is given out when the burning is not completed, and the problem of program burning failure is caused. Based on this, the inventor of this application provides a watchdog circuit based on singlechip and processing circuit based on ARM to avoid above-mentioned problem.
Please refer to fig. 1, which is a block diagram of a watchdog circuit based on a single chip according to an embodiment of the present disclosure. In this embodiment, the watchdog circuit 10 based on the single chip microcomputer may include a single chip microcomputer 11, an ARM reset circuit 12, a voltage conversion circuit 13, a single chip microcomputer reset circuit 14, and a program burning serial port 15, and the watchdog circuit 10 based on the single chip microcomputer may reset an operating ARM chip.
Specifically, a data communication port of the single chip microcomputer 11 may be connected to a PWM port of the ARM chip, and receives a PWM signal sent by the ARM chip. And the singlechip 11 can judge the running condition of the ARM based on the PWM signal so as to determine whether the ARM needs to be reset.
The I/O port of the single chip microcomputer 11 can be connected with the reset signal input terminal of the ARM reset circuit 12, and the output terminal of the ARM reset circuit 12 can be connected with the power supply port of the ARM chip. When the single chip microcomputer 11 judges that the operation of the ARM is unstable (a fault, a program runaway and the like) based on the PWM signal, the ARM reset signal can be output to the ARM reset circuit 12 through the reset signal input terminal of the ARM reset circuit 12; and the ARM reset circuit 12 can reset the ARM through the power port of the ARM chip according to the ARM reset signal.
Aiming at different running states of the ARM chip, the watchdog circuit 10 based on the single chip microcomputer can flexibly set reset time, so that the problem of program online burning failure caused by resetting the ARM by a traditional reset circuit (the watchdog circuit of the ARM) is avoided as much as possible, and the running stability of the ARM can be further improved.
In this embodiment, in order to improve the applicability of the watchdog circuit 10 based on a single chip microcomputer, a voltage conversion circuit 13 may be additionally disposed between the single chip microcomputer 11 and the ARM reset circuit 12, wherein an input terminal of the voltage conversion circuit 13 may be connected to an I/O port of the single chip microcomputer 11, and an output terminal of the voltage conversion circuit 13 may be connected to a reset signal input terminal of the ARM reset circuit 12. Therefore, the voltage conversion circuit 13 can receive the ARM reset signal output by the I/O port of the single chip microcomputer 11, perform voltage conversion on the received ARM reset signal, and send the ARM reset signal after voltage conversion to the ARM reset circuit 12, so that the ARM reset circuit 12 completes the reset of the ARM.
The voltage conversion circuit 13 is additionally arranged between the single chip microcomputer 11 and the ARM reset circuit 12, and the ARM reset signal is subjected to voltage conversion, so that the single chip microcomputer 11 and an ARM chip can be allowed to use different voltages, and the reset of the watchdog circuit 10 based on the single chip microcomputer to the ARM can be realized. Therefore, the model selection range of the single chip microcomputer can be expanded, the single chip microcomputer which accords with the actual requirement can be further selected, and the cost can be saved (the more the types of the single chip microcomputers can be selected, the more the single chip microcomputers can be selected, the lower the cost can be selected).
In this embodiment, a single chip microcomputer reset circuit 14 may be further included for resetting the single chip microcomputer 11, so as to ensure stable operation of the single chip microcomputer 11. Specifically, the power supply of the single chip microcomputer may be connected to a power supply port of the single chip microcomputer 11, and the reset circuit 14 of the single chip microcomputer may be connected between the power supply of the single chip microcomputer and a reset port of the single chip microcomputer to reset the single chip microcomputer 11.
In this embodiment, the program burning serial port 15 may be connected to the single chip microcomputer 11, and is used for burning the program on the single chip microcomputer 11. And the program is burnt into the singlechip 11 through the program burning serial port 15, so that the program is convenient to change, and the ARM resetting time can be flexibly set.
It should be noted that, in other realizable manners, the watchdog circuit 10 based on the single chip microcomputer may not include any one or more of the voltage conversion circuit 13, the single chip microcomputer reset circuit 14, and the program burning serial port 15, so as to simplify the circuit design and save the cost.
In the following, a detailed description will be given of the watchdog circuit based on the single chip microcomputer, with reference to a specific example.
Referring to fig. 2, fig. 2 is a circuit diagram of a watchdog circuit based on a single chip microcomputer to reset an ARM.
For example, in this embodiment, an independent watchdog circuit is designed by taking a single chip microcomputer of STC8F1K08 as an example, so as to reset AK3780 (an ARM chip). The reset time of the self-contained watchdog of the AK3780 is short, so that the program burning failure is easy to occur, and the reset time of the AK3780 can be flexibly controlled by the watchdog circuit based on the STC8F1K08, so that the problem of the program burning failure is avoided as much as possible.
The watchdog circuit is designed on the basis of the STC8F1K08, and the STC8F1K08 has the characteristics of low cost, simple structure and simplicity in use, so that the design cost of the watchdog circuit based on the single-chip microcomputer can be reduced, and the cost of a product using the watchdog circuit based on the single-chip microcomputer can also be reduced.
Continuing to refer to fig. 2, in this embodiment, the watchdog circuit based on the single chip microcomputer may include the single chip microcomputer, an ARM reset circuit, a voltage conversion circuit, a single chip microcomputer reset circuit, and a program burning serial port.
The pin (PWM port) of the AK3780 can be connected with the pin 8 (P3.3/INT1/I2C _ SDA, namely a data communication port) of the STC8F1K08, so that the AK3780 can output the PWM signal to the STC8F1K 08. For example, when the AK3780 operates normally, a square wave (i.e., PWM signal) with a fixed frequency can be emitted from the pin (i.e., PWM port); when the STC8F1K08 does not receive the square wave or the received square wave has an error in frequency, it can be determined that the AK3780 has failed in operation. And the STC8F1K08 can start timing, and if the fault exists within the time set by the program (for example, 20 to 30 seconds), a pulse reset signal can be output from the pin 3 (P5.5, i.e., I/O port).
In this embodiment, in order to remove jitter (deburring) of the PWM signal, a capacitor C2 (i.e., a second capacitor) with a size of 100 picofarads may be provided, one end of the second capacitor C2 may be connected between the PWM port of AK3780 (i.e., an ARM chip) and the pin 8 (i.e., a data communication port) of STC8F1K08 (i.e., a single chip), and the other end of the second capacitor C2 is grounded. Thereby, the PWM signal can be debounced.
Illustratively, the specific structure of the reset circuit of the single chip microcomputer can be as follows: a 3.3V (volt) power supply (i.e., the power supply of the single chip microcomputer) is connected to pin 2 (VCC, i.e., the power port of the single chip microcomputer) of STC8F1K08, and the power supply of the single chip microcomputer can be connected to a resistor R5 (i.e., the fifth resistor) with a resistance of 4.7K Ω (K Ω, i.e., kilo-ohm) and then connected to pin 1 (RST, i.e., the reset port of the single chip microcomputer) of STC8F1K 08. One end of the first capacitor C1(105, i.e. the capacitor with a capacitance of 1000000 pf) may be connected between the fifth resistor R5 and the pin No. 1 of STC8F1K08, and the other end of the first capacitor C1 is grounded. Therefore, the reset of the STC8F1K08 can be realized, and the stable operation of the STC8F1K08 is ensured.
For example, the specific structure of the voltage conversion circuit may be: the pin 3 (P5.5, i.e., I/O port) of the STC8F1K08 may be connected to a resistor R1 (i.e., a first resistor) with a resistance of 10K Ω, and then connected to the B port (i.e., the base) of the transistor 9014, and the E port (i.e., the emitter) of the transistor 9014 is grounded. And another resistor R2 (i.e., a second resistor) with a resistance of 10K Ω has one end connected between pin 3 of STC8F1K08 and the first resistor and the other end connected to ground via the emitter (i.e., connected between the E port of 9014 and ground). The C port (i.e., the collector) of the transistor 9014 may be connected to a resistor R3 (i.e., a third resistor) having a resistance of 1K Ω. This makes it possible to convert the voltage value of the pulse reset signal output from pin 3 of STC8F1K 08.
For example, the specific structure of the ARM reset circuit may be: a 5V power supply (i.e., ARM power supply) may be connected to the S port (i.e., source) of a fet APM2301A (i.e., P-channel enhancement mode fet), and may be connected to the power supply port of AK3780(ARM chip) via the D port (i.e., drain) of APM 2301A. The G port (i.e., gate) of the APM2301A may be connected to the collector of the transistor 9014 after being connected in series with the third resistor R3. And, the ARM power supply can be connected in series with a resistor R4 (i.e. a fourth resistor) with a resistance of 10K Ω, and then connected between the G port of the APM2301A and the third resistor R3.
Therefore, the ARM power supply supplies power to the AK3780, and the ARM reset circuit can control the opening and closing of the field effect transistor APM2301A and cut off and connect the power supply of the ARM based on the pulse reset signal input after being converted by the voltage conversion circuit under the action of the pulse reset signal, so that the reset of the ARM is realized.
The reset of the ARM is realized by the mode, the reset of the ARM can be more thorough, and the reset time of the ARM can be flexibly controlled, so that the problem that program burning fails due to reset in the program burning process caused by poor control of the reset time of the traditional watchdog circuit can be avoided as much as possible.
In this embodiment, in order to facilitate program burning or adjust the reset time of the watchdog circuit based on the single chip microcomputer, the pin No. 5 (P3.0/RXD/INT4, i.e., the data receiving port of the single chip microcomputer) of the STC8F1K08 may be connected to the pin No. 3 (RXD, i.e., the data receiving port of the program burning serial port) of the program burning serial port X1; the pin 6 (P3.1/TXD, namely the data sending port of the singlechip) of the STC8F1K08 can be connected with the pin 2 (TXD, namely the data sending port of the program burning serial port) of the program burning serial port X1; the pin 1 (+3.3V, i.e., the power port of the program programming serial port) of the program programming serial port X1 may be connected to a 3.3V power supply (i.e., a serial power supply), and the pin 4 (GND, i.e., the ground port of the program programming serial port) of the program programming serial port X1 is grounded.
In the present embodiment, specific values of the capacitors C1 to C2 and the resistors R1 to R5 are not limited to the values in the present embodiment, and specific voltage values of the single chip power supply, the ARM power supply and the serial power supply, or the voltage values adopted in the above-mentioned embodiments, are not limited to actual requirements. The specific types of the elements such as the single chip microcomputer, the ARM, the triode, the program burning serial port, the field effect transistor and the like are not limited to the types adopted in the above examples, for example, the single chip microcomputer may adopt an STC51 series single chip microcomputer, and the field effect transistor may adopt an N-channel enhanced field effect transistor and the like, which should not be considered as limiting the present application.
In the embodiment of the application, an ARM-based processing circuit is further provided, and includes an ARM chip and the watchdog circuit based on the single chip machine described in the embodiment, a PWM port of the ARM chip is connected to an input terminal of the watchdog circuit, and a power port of the ARM chip is connected to an output terminal of the watchdog circuit, so as to reset the ARM chip. The processing circuit based on the ARM chip is provided with an independent watchdog circuit, the reset time of the ARM can be flexibly controlled, and the problem that the ARM fails in program burning due to reset in the program online burning process can be avoided as much as possible, so that the running stability of the ARM is improved.
To sum up, the embodiment of the application provides a watchdog circuit based on singlechip and a processing circuit based on ARM, through designing a relatively independent watchdog circuit based on singlechip for the time that the ARM resets can be controlled in a flexible way to the time that the ARM resets of ARM chip. The single chip microcomputer of the watchdog circuit is connected with the PWM port of the ARM chip, the running state of the ARM can be detected, and the ARM reset circuit of the watchdog circuit is controlled by the single chip microcomputer and can reset the ARM chip, so that the reset of the ARM chip is controlled by the single chip microcomputer. Aiming at different running states of the ARM chip, the reset time can be flexibly set, so that the problem of program online burning failure caused by resetting the ARM by a traditional reset circuit (a watchdog of the ARM) is avoided as much as possible, and the running stability of the ARM can be further improved.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (10)
1. A watchdog circuit based on a single chip microcomputer is characterized by being applied to ARM chip reset and comprising the single chip microcomputer and an ARM reset circuit,
the data communication port of the single chip microcomputer is connected with the PWM port of the ARM chip;
the I/O port of the singlechip is connected with the reset signal input end of the ARM reset circuit; and
the ARM power supply is connected with the power supply input end of the ARM reset circuit;
and the output end of the ARM reset circuit is connected with the power port of the ARM chip.
2. The watchdog circuit of claim 1, further comprising a voltage conversion circuit coupled between the single-chip microcomputer and the ARM reset circuit,
the input end of the voltage conversion circuit is connected with an I/O port of the single chip microcomputer;
and the output end of the voltage conversion circuit is connected with the reset signal input end of the ARM reset circuit.
3. The watchdog circuit of claim 2, wherein the voltage conversion circuit comprises a transistor, a first resistor, a second resistor, and a third resistor,
the first resistor is connected between an I/O port of the singlechip and the base electrode of the triode;
the emitting electrode of the triode is grounded;
one end of the second resistor is connected between the I/O port of the singlechip and the first resistor, and the other end of the second resistor is grounded through the emitter;
the third resistor is connected between the collector of the triode and the reset signal input end of the ARM reset circuit.
4. The watchdog circuit of claim 3, wherein the ARM reset circuit comprises a P-channel enhancement mode FET and a fourth resistor,
the source electrode of the P-channel enhanced field effect transistor is connected with the ARM power supply;
the drain electrode of the P-channel enhanced field effect transistor is connected with the power supply port of the ARM chip;
the grid electrode of the P-channel enhanced field effect transistor is connected with the collector electrode of the triode through the third resistor;
the fourth resistor is connected between the ARM power supply and the third resistor.
5. The watchdog circuit of claim 1, wherein a single chip power supply is connected to a power port of the single chip, the watchdog circuit further comprises a single chip reset circuit,
the single chip microcomputer reset circuit is connected between the single chip microcomputer power supply and a reset port of the single chip microcomputer.
6. The watchdog circuit of claim 5, wherein the one-chip reset circuit comprises a fifth resistor and a first capacitor,
one end of the fifth resistor is connected with the power supply of the single chip microcomputer;
the other end of the fifth resistor is connected with one end of the first capacitor;
the other end of the first capacitor is grounded;
and a reset port of the singlechip is connected between the fifth resistor and the first capacitor.
7. The watchdog circuit of claim 1, wherein the watchdog circuit further comprises a second capacitance,
one end of the second capacitor is connected between the PWM port of the ARM chip and the data communication port of the single chip microcomputer;
the other end of the second capacitor is grounded.
8. The watchdog circuit of claim 1, wherein the watchdog circuit further comprises a program burn serial port,
the power port of the program burning serial port is connected with a serial port power supply;
the data sending port of the program burning serial port is connected with the data sending port of the single chip microcomputer;
the data receiving port of the program burning serial port is connected with the data receiving port of the single chip microcomputer;
and the grounding port of the program burning serial port is grounded.
9. A watchdog circuit according to any one of claims 1 to 8, wherein the single-chip microcomputer is STC8F1K 08.
10. An ARM-based processing circuit, wherein the processing circuit comprises an ARM chip and the single-chip microcomputer-based watchdog circuit of any one of claims 1 to 9,
the PWM port of the ARM chip is connected with the input end of the watchdog circuit, and the power port of the ARM chip is connected with the output end of the watchdog circuit and used for resetting the ARM chip.
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| CN201921516941.5U CN210199737U (en) | 2019-09-11 | 2019-09-11 | Watchdog circuit based on single chip microcomputer and processing circuit based on ARM |
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| CN201921516941.5U CN210199737U (en) | 2019-09-11 | 2019-09-11 | Watchdog circuit based on single chip microcomputer and processing circuit based on ARM |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111736679A (en) * | 2020-06-24 | 2020-10-02 | 广东安居宝数码科技股份有限公司 | Chip resetting method and device and single chip microcomputer |
| CN116225771A (en) * | 2023-05-08 | 2023-06-06 | 上海励驰半导体有限公司 | System external monitoring reset circuit, chip, electronic equipment and related equipment |
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2019
- 2019-09-11 CN CN201921516941.5U patent/CN210199737U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111736679A (en) * | 2020-06-24 | 2020-10-02 | 广东安居宝数码科技股份有限公司 | Chip resetting method and device and single chip microcomputer |
| CN116225771A (en) * | 2023-05-08 | 2023-06-06 | 上海励驰半导体有限公司 | System external monitoring reset circuit, chip, electronic equipment and related equipment |
| CN116225771B (en) * | 2023-05-08 | 2023-07-25 | 上海励驰半导体有限公司 | System external monitoring reset circuit, chip, electronic equipment and related equipment |
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