CN209861244U

CN209861244U - Multi-order blind buried hole PCB structure with interlayer precision control

Info

Publication number: CN209861244U
Application number: CN201822009274.3U
Authority: CN
Inventors: 余斌; 薛元波
Original assignee: SHANGHAI JIAJIE INFORMATION TECHNOLOGY Co Ltd
Current assignee: SHANGHAI JIAJIE INFORMATION TECHNOLOGY Co Ltd
Priority date: 2018-11-30
Filing date: 2018-11-30
Publication date: 2019-12-27
Anticipated expiration: 2028-11-30

Abstract

The utility model relates to a multi-stage blind buried hole PCB structure with interlayer precision control, which comprises a circuit board body, wherein the circuit board body is provided with an external circuit layer, a first to a ninth intermediate layers and a bottom layer from top to bottom in sequence; the nine middle layers are composed of a plurality of insulating plates with printed circuit wiring, and the external circuit layer, the space between the middle layers and the bottom layer and the outer layer of the external circuit layer are provided with a first inner layer, a second inner layer and a twenty-second inner layer; the layers from L1 to L2, from L1 to L4, from L9 to L12, from L19 to L22, from L21 to L22, from L1 to L10, from L2 to L10, from L10 to L22, from L10 to L21, from L1 to L12 and from L2 to L21 are all communicated through blind holes. Compared with the prior art, the utility model has the advantages of energy saving, convenience, safety and the like. The utility model discloses a moisture in the panel can be got rid of to the roast board, and the internal stress is eliminated, improves product manufacturing process dimensional stability, reduces the harmomegathus volume.

Description

Multi-order blind buried hole PCB structure with interlayer precision control

Technical Field

The utility model belongs to the technical field of the PCB board, especially, relate to a multistage blind buried hole PCB plate structure of interlaminar accuracy control.

Background

The design and manufacture of multi-stage blind buried hole type products are usually carried out in an HDI mode, the HDI process technology in the domestic pcb industry is gradually mature, however, part of products are designed and manufactured by multi-stage blind buried hole plates at present; because the blind holes are provided with more randomness, the product contains multi-step blind buried holes, and various special structure products such as various structures of through hole multilayer boards and the like; aiming at the problems that a multi-layer asymmetric structure machine blind hole plate comprises multi-stage blind buried holes and is complex in structure, and the development of the products needs to overcome a plurality of technical difficulties for realizing good performance and good special performance of products and electric appliances.

SUMMERY OF THE UTILITY MODEL

In order to overcome the problems in the prior art, the utility model discloses a multi-stage blind buried hole PCB structure controlled by interlayer precision, which comprises a circuit board body, wherein the circuit board body is provided with an external circuit layer, a first intermediate layer, a second intermediate layer, a third intermediate layer, a fourth intermediate layer and a bottom layer in sequence from top to bottom; the nine middle layers are composed of a plurality of insulating plates with printed circuit wiring, and the external circuit layer, the middle layers and the bottom layer and the outer layer of the external circuit layer are provided with a first inner layer, a second inner layer and a twenty-second inner layer; the first blind hole for communicating the L1 layer with the L2 layer, the second blind hole for communicating the L1 layer with the L4 layer, the third blind hole for communicating the L9 layer with the L12 layer, the fourth blind hole for communicating the L19 layer with the L22 layer, the fifth blind hole for communicating the L21 layer with the L22 layer, the sixth blind hole for communicating the L1 layer with the L10 layer, the seventh blind hole for communicating the L2 layer with the L10 layer, the eighth blind hole for communicating the L10 layer with the L22 layer, the ninth blind hole for communicating the L10 layer with the L21 layer, the tenth blind hole for communicating the L1 layer with the L12 layer and the eleventh blind hole for communicating the L2 layer with the L21 layer are provided.

Preferably, the resistive layer is embedded in the L2 th layer and the L10 th layer.

Preferably, the surfaces of the L1 th layer and the L22 th layer are subjected to gold immersion through a process.

Compared with the prior art, the beneficial effects of the utility model are that: the utility model discloses a moisture in the panel can be got rid of to the roast board, and the internal stress is eliminated, improves product manufacturing process dimensional stability, reduces the harmomegathus volume. In order to realize the consistency of the copper thickness of the L1 layer and the L10 layer and prevent the problem of poor etching uniformity of the L1 and L10 circuits caused by outer layer etching, the L1 layer needs to be subjected to copper reduction treatment after cutting, and the copper reduction thickness is 5-8 mu m. The interlayer alignment precision of the multi-order blind buried hole PCB board prepared by the multi-order blind buried hole PCB board structure with the interlayer precision control is less than 3 mil.

Drawings

FIG. 1 is a multi-level buried via PCB structure with inter-level precision control.

Detailed Description

The following will describe the multi-step blind buried hole PCB structure of the interlayer accuracy control proposed by the present invention in more detail with reference to the schematic drawings, in which the preferred embodiments of the present invention are shown, it being understood that those skilled in the art can modify the present invention described herein, while still achieving the advantageous effects of the present invention. Accordingly, the following description should be construed as broadly as possible to those skilled in the art and not as limiting the invention.

As shown in fig. 1, the utility model discloses a multi-step blind buried hole PCB structure controlled by interlayer precision, which comprises a circuit board body, wherein the circuit board body (1) is provided with an external circuit layer, a first to a ninth intermediate layers and a bottom layer in sequence from top to bottom; the nine middle layers are composed of a plurality of insulating plates with printed circuit wiring, and the external circuit layer, the middle layers and the bottom layer and the outer layer of the external circuit layer are provided with a first inner layer, a second inner layer and a twenty-second inner layer; the blind hole assembly comprises a first blind hole 1 communicating an L1 th layer to an L2 th layer, a second blind hole 2 communicating an L1 th layer to an L4 th layer, a third blind hole 3 communicating an L9 th layer to an L12 th layer, a fourth blind hole 4 communicating an L9 th layer to an L22 th layer, a fifth blind hole 5 communicating an L21 th layer to an L22 th layer, a sixth blind hole 6 communicating an L1 th layer to an L10 th layer, a seventh blind hole 7 communicating an L2 th layer to an L10 th layer, an eighth blind hole 8 communicating an L10 th layer to an L22 th layer, a ninth blind hole 9 communicating an L10 th layer to an L21 th layer, a tenth blind hole 10 communicating an L1 th layer to an L12 th layer, and an eleventh blind hole 11 communicating an L2 th layer to an L21 th layer. The resistive layer is embedded in the L2 th layer and the L10 th layer. And (4) performing gold immersion on the surfaces of the L1 th layer and the L22 th layer.

The utility model discloses the concrete preparation process of multistage blind buried via hole PCB plate structure of layer precision control is as follows step:

selecting a plate material: selecting the material of the plate according to the design;

baking and stress removal: removing water in the plate by baking the plate, and eliminating the internal stress of the plate;

the preparation of the plate specifically comprises the following steps:

step 1: cutting; the outer layer comprises L1, L2, L9 and L10 layers of core boards; the inner layer comprises L3-L8 layers of core boards;

step 2: copper reduction treatment of the L1 layer;

step 2: drilling an outer layer; drilling an inner layer blind hole on the outer layer core plate according to the design drawing;

and step 3: an outer layer PTH; depositing a conductive copper layer in the blind hole by using the chemical reaction principle of oxidation and reduction;

and 4, step 4: electroplating the outer layer of the whole plate; thickening the copper layer in the blind hole in the step 3 by using an electrochemical principle;

and 5: plating a hole pattern on the inner layer; developing the original circuit diagram on the film sheet to the substrate; designing glue flowing grooves in the plate and at the plate edges;

step 6: inner layer power; thickening the blind holes on the substrate and the copper layers on the circuits by using an electrochemical principle, and plating a tin protective layer on the blind holes and the circuits;

and 7: etching the inner layer; etching the redundant copper layer by using chemical etching liquid;

and 8: optical automatic detection; checking the integrity of the circuit diagram model by using an optical principle, and rejecting defective products;

and step 9: pressing; firstly, generating a layer of browning membrane on the surface of copper by using a browning agent, drilling riveting holes for riveting at the edges of all substrates, riveting the substrates and the PP plate by using rivets, and then sending the substrates and the PP plate into a pressing machine for pressing;

step 10: removing glue from the blind holes; removing excessive glue overflowing from the blind hole after pressing;

step 11: drilling an outer layer; drilling an outer layer hole on the outer layer substrate;

step 12: removing glue and chemically depositing copper; removing impurities in the outer layer holes, and depositing a conductive copper layer in the outer layer holes by utilizing the chemical reaction principle of oxidation and reduction;

step 12: an outer plate is electrically connected; thickening the outer layer hole and the copper layer on the surface of the substrate;

step 13: an outer layer circuit; developing the original circuit diagram on the film sheet to the substrate;

step 14: an outer layer is charged; thickening blind holes on the substrate and copper layers on the circuits by using an electrochemical principle;

step 15: etching the outer layer; etching the redundant copper layer by using chemical etching liquid;

step 16: and carrying out surface treatment on the finished PCB.

The utility model provides an among the multistage blind buried hole PCB plate structure of precision control between layer, according to FR-4 material size harmomegathus characteristics when selecting the substrate, high Tg is superior to ordinary Tg.

The utility model provides an among the multistage blind buried via PCB plate structure of precision control between the layer, the condition of toasting adopts 150 ℃, and the time is 8 h.

The utility model provides an among the multistage blind buried via PCB plate structure of precision control between the layer, use LDI laser to develop original circuit diagram to the base plate on, guarantee to counterpoint the deviation within 40 um.

Compared with the prior art, the utility model discloses a moisture in the panel can be got rid of to the roast board, eliminates the internal stress, improves product manufacturing process dimensional stability, reduces the harmomegathus volume. In order to realize the consistency of the copper thickness of the L1 layer and the L10 layer and prevent the problem of poor etching uniformity of the L1 and L10 circuits caused by outer layer etching, the L1 layer needs to be subjected to copper reduction treatment after cutting, and the copper reduction thickness is 5-8 mu m.

As shown in FIG. 1, the multi-level blind buried via PCB board prepared by the multi-level blind buried via PCB board structure with interlayer accuracy control has 1-2 blind vias, 1-4 blind vias, 9-12 blind vias, 19-22 blind vias, 21-22 blind vias, 1-10 blind vias, 2-10 blind vias, 10-22 blind vias, 10-21 blind vias, 1-12 blind vias, 2-21 blind vias, L2 and L10 layers formed by buried resistors, surface technology immersion gold, and interlayer alignment accuracy of less than 3 mil. See table 1 below for specific parameters:

TABLE 1 Blind hole set parameters

The above description is only for the preferred embodiment of the present invention, and does not limit the present invention. Any technical personnel who belongs to the technical field, in the scope that does not deviate from the technical scheme of the utility model, to the technical scheme and the technical content that the utility model discloses expose do the change such as the equivalent replacement of any form or modification, all belong to the content that does not break away from the technical scheme of the utility model, still belong to within the scope of protection of the utility model.

Claims

1. A multi-stage blind buried hole PCB structure with interlayer precision control comprises a circuit board body, and is characterized in that the circuit board body is sequentially provided with an external circuit layer, first to ninth intermediate layers and a bottom layer from top to bottom; the nine middle layers are composed of a plurality of insulating plates with printed circuit wiring, and the external circuit layer, the middle layers and the bottom layer and the outer layer of the external circuit layer are provided with a first inner layer, a second inner layer and a twenty-second inner layer; the blind hole assembly comprises a first blind hole (1) communicating an L1 th layer to an L2 th layer, a second blind hole (2) communicating the L1 th layer to the L4 th layer, a third blind hole (3) communicating the L9 th layer to the L12 th layer, a fourth blind hole (4) communicating an L19 th layer to an L22 th layer, a fifth blind hole (5) communicating an L21 th layer to an L22 th layer, a sixth blind hole (6) communicating an L1 th layer to an L10 th layer, a seventh blind hole (7) communicating an L2 th layer to an L10 th layer, an eighth blind hole (8) communicating an L10 th layer to an L22 th layer, a ninth blind hole (9) communicating an L10 th layer to an L21 th layer, a tenth blind hole (10) communicating an L1 th layer to an L12 th layer, and an eleventh blind hole (11) communicating an L2 th layer to an L21 th layer.

2. The multi-stage blind buried via PCB structure of claim 1, wherein the resistive layer is buried in the L2 th layer and the L10 th layer.

3. The multi-stage blind and buried via PCB structure of claim 1, wherein the L1 th layer and the L22 th layer are gold-deposited by a process.