CN209675286U - A kind of multi-chip welding structure - Google Patents
A kind of multi-chip welding structure Download PDFInfo
- Publication number
- CN209675286U CN209675286U CN201920614453.1U CN201920614453U CN209675286U CN 209675286 U CN209675286 U CN 209675286U CN 201920614453 U CN201920614453 U CN 201920614453U CN 209675286 U CN209675286 U CN 209675286U
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- Prior art keywords
- chip
- ball
- pad
- dao
- welding structure
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Connections Effected By Soldering, Adhesion, Or Permanent Deformation (AREA)
Abstract
A kind of multi-chip welding structure, ball is planted by the way that the first plant ball set on the first chip and second with the second plant ball ontology and the first conductive connecting line set on the second chip are first added before wire bonding, the first chip and the second chip chamber bring pressure due to wire bonding are born using the first plant ball and the second plant ball, caused biggish output pressure when connecting two or more chips using wire bonding mode is avoided to be delivered directly on chip, bonding failure probability is caused to increase because of output pressure difference to solve the presence in traditional technical solution with medium, the problem of bonding quality is low and high failure rate.
Description
Technical field
The utility model belongs to technical field of integrated circuits more particularly to a kind of multi-chip welding structure.
Background technique
Currently, the bonding of ultrasonic power direct lead wire is usually used in the welding of traditional integrated circuit, that is, pass through ultrasonic function
The stable supersonic frequency ac signal of rate power supply output frequency, is changed into mechanical oscillation through ultrasonic transducer, amplitude is through ultrasonic horn
Welding chopper is passed to after amplification, two kinds of metal contact surfaces is made to generate friction, and vibration friction energy eliminates welding section oxidation film and miscellaneous
Matter makes interface that plastic deformation occur and reaches interatomic combination, and high temperature can accelerate atom to combine.But tool there are two or
When multiple chips carry out interconnection welding, same medium will lead to because output is pressed using traditional wire bonding mode directly on chip
Power is different and bonding failure probability is caused to increase, and influences bonding quality, high failure rate.
Therefore, in traditional technical solution exist with medium because output pressure difference due to cause bonding failure probability increase,
The problem of bonding quality is low and high failure rate.
Utility model content
In view of this, the utility model embodiment provides a kind of multi-chip welding structure, it is intended to solve traditional technology
Bonding failure probability is caused to increase because of output pressure difference with medium present in scheme, bonding quality is low and high failure rate
The problem of.
The utility model embodiment provides a kind of multi-chip welding structure, including carrier, is provided with the base of chip
Island region；First chip, the first surface of first chip are attached on the region Ji Dao；Second chip, described second
The first surface of chip is attached on the region Ji Dao, and first chip and second chip are spaced apart from each other with gap
Setting；First plants ball, and described first plants the second surface opposite with the first surface that ball is set on first chip；With
And second plant ball, including be set to second chip on the second surface opposite with the first surface second plant ball sheet
Body, and the first conductive connecting line connecting with the first plant ball is extended by the second plant ball ontology outward.
In one embodiment, first chip and second chip misplace phase in the chip mounting area
It is right.
In one embodiment, the first plant ball is located at the pad on the second surface of first chip；Described
Two plant ball ontologies are located at the pad on the second surface of second chip.
In one embodiment, the carrier further includes multiple pins along the setting of base island area periphery, described to draw
Foot includes pin ontology and pin ontology pin pad interconnected, and each pin pad is located at close to the base
The inside in island region, each pin pad and first chip and/or the second chip pass through independently of each other respectively
Electric conductor electrical connection.
In one embodiment, each electric conductor includes that third plants ball ontology and plants ball ontology outward by the third
Extend the second conductive connecting line, each third plants pad on the second surface of ball and first chip and/or described the
Pad solder on the second surface of two chips, each second conductive connecting line far from the third plant ball ontology one end with
Each pin pad solder.
In one embodiment, first conductive connecting line and second conductive connecting line are arc-shaped.
In one embodiment, each electric conductor connected by way of wire bonding each pin pad and
Pad on the second surface of first chip, first on the second surface of first chip plant ball, second core
Pad on the second surface of piece, at least one of described second plant ball on the second surface of second chip.
In one embodiment, multi-chip welding structure further includes fixed glue, and the fixed glue is set to the region Ji Dao
It is described solid between the first surface of first chip and the Ji Dao and between the first surface of second chip
Glue is determined first chip and second chip to be individually fixed on the region Ji Dao.
In one embodiment, the fixed glue is in conjunction with one of glue.
Above-mentioned multi-chip welding structure is planted ball and is set by being first added before wire bonding set on the first of the first chip
Plant the second of ball ontology and first conductive connecting line with second in the second chip and plant ball, using first plant ball and second plant ball come
The first chip and the second chip chamber bring pressure due to wire bonding are born, avoids and connects two using wire bonding mode
Or caused biggish output pressure is delivered directly on chip when multiple chips, to solve in traditional technical solution
There are problems that same medium causes bonding failure probability to increase because of output pressure difference, bonding quality is low and high failure rate.
Detailed description of the invention
It, below will be to embodiment or the prior art in order to illustrate more clearly of the technical scheme in the embodiment of the utility model
Attached drawing needed in description is briefly described, it should be apparent that, the accompanying drawings in the following description is only that this is practical new
Some embodiments of type for those of ordinary skill in the art without any creative labor, can be with
It obtains other drawings based on these drawings.
Fig. 1 is the welded structural schematic diagram of multi-chip provided by the embodiment of the utility model；
Fig. 2 is the welded another structural schematic diagram of multi-chip provided by the embodiment of the utility model；
Fig. 3 is the welded another structural schematic diagram of multi-chip provided by the embodiment of the utility model.
Specific embodiment
In order to make the purpose of the utility model, technical solutions and advantages more clearly understood, below in conjunction with attached drawing and implementation
Example, the present invention will be further described in detail.It should be appreciated that specific embodiment described herein is only used to explain
The utility model is not used to limit the utility model.
Referring to Fig. 1, the welded structural schematic diagram of multi-chip that the utility model first embodiment provides, in order to just
In explanation, only the parts related to this embodiment are shown, and details are as follows:
Multi-chip welding structure in the present embodiment, comprising: carrier 10, the first chip 20, the second chip 30, first plant ball
40 and second ball 50 is planted, carrier 10 is provided with the region Ji Dao 11 of chip, and the first surface of the first chip 20 is attached at
On the region Ji Dao 11, the first surface of the second chip 30 is attached on the region Ji Dao 11, and the first chip 20 and the second chip 30
Setting is spaced apart from each other with gap, first plants the second surface opposite with first surface that ball 40 is set on the first chip 20, and second
It plants ball 50 includes the second surface opposite with first surface on the second chip 30 second and plants ball ontology 51, and by the
Two plant ball ontologies 51 extend the first conductive connecting line 52 connecting with the first plant ball 40 outward.
It should be understood that carrier 10 can be the object of carrying chip, such as substrate or common pcb board etc., in the present embodiment
In, carrier 10 is made of copper frame, and in other embodiments, carrier 10 can be common pcb board.
It should be understood that the first surface of the first chip 20 and the second chip 30 is the inactive face of chip, the first chip 20 and the
The second surface of two chips 30 is the active face of chip, and first surface is opposite with second surface, the first chip in the present embodiment
20 and second chip 30 be example chip and chip chamber welding, and be not specific to a certain chip, i.e., may include in embodiment
Multiple chips, chip two-by-two between interconnect when can arbitrarily set the first chip 20 and the second chip 30.
It should be understood that the first chip 20 and the second chip 30 are spaced apart from each other setting with gap and can be with parallel interval, dislocation
Opposite or other modes Arbitrary distribution.
It should be understood that second in the present embodiment plants the second plant ball ontology 51 and the first conductive connecting line 52 in ball 50, it is first
First be implanted into the second plant ball ontology 51 on the second surface of the second chip 30 using playing skill art is planted, then from second plant ball ontology 51 to
Extend the first conductive connecting line 52 outside；It is also possible to the second plant ball ontology 51 and the first conductive connecting line 52 in other embodiments
After being respectively formed, linked together by modes such as scolding tin.
It should be understood that the first plant ball 40 and the second plant ball ontology 51 can be tin ball or other metal balls, the first conduction is even
Line 52 can be solder or other metal wires.In one embodiment, the first conductive connecting line 52 is arc-shaped, in other embodiments
In, the first conductive connecting line 52 can linearly or the shapes such as curve.
Multi-chip welding structure in this implementation is set to the first plant of the first chip 20 by being first added before wire bonding
Ball 40 and the second of ball ontology 51 and the first conductive connecting line is planted with second set on second chip 30 plant ball 50, utilize first to plant
Ball 40 and the second plant ball 50 bear between the first chip 20 and the second chip 30 bring pressure due to wire bonding, avoid and adopt
Caused biggish output pressure is delivered directly on chip when connecting two or more chips with wire bonding mode, to solve
Presence in traditional technical solution of having determined causes the increase of bonding failure probability, bonding quality because of output pressure difference with medium
The problem of low and high failure rate.
Referring to Fig. 2, in one embodiment, the first chip 20 and the second chip 30 misplace phase in chip mounting area
It is right.
In one embodiment, the first plant ball 40 is located at the pad on the second surface of the first chip 20；Second plants ball sheet
Body 51 is located at the pad on the second surface of the second chip 30.
It should be understood that pad is that can plant the place for planting ball on chip, first in the present embodiment plants ball 40 and second and plants ball
Ontology 51 ball and can be directly arranged on pad by being formed to plant after high pressure electrofusion metal wire, other in the utility model
Planting ball can be consistent with the first plant ball 40 and/or the second plant formation of ball ontology 51, wherein metal wire can be copper wire, tin
Line etc., herein with no restrictions.
Referring to Fig. 3, in one embodiment, carrier 10 further includes multiple pins along the 11 periphery setting of the region Ji Dao,
Pin includes pin ontology and pin ontology pin pad interconnected, and each pin pad is located at close to the region Ji Dao 11
Inside, each pin pad are electrically connected by mutually independent electric conductor respectively with the first chip 20 and/or the second chip 30.With
For pin 60, pin 60 include pin ontology 61 and with the pin pad 62 interconnected of pin ontology 61, pin pad 62
Positioned at the inside close to the region Ji Dao 11, pin pad 62 and the first chip 20 and/or the second chip 30 are respectively by mutually solely
Vertical electric conductor 70 is electrically connected.
It should be understood that each pin can be metal pins, each pin can pass through the modes such as plastic packaging, buckle or bonding
It is fixed on 11 periphery of the region Ji Dao.
In one embodiment, each electric conductor includes that third plants ball ontology and extends second outward by third plant ball ontology
Conductive connecting line, each third plant second of pad and/or the second chip 30 on the second surface of ball ontology and the first chip 20
Pad solder on surface, each second conductive connecting line one end and each pin pad solder far from third plant ball ontology, with
For electric conductor 70, electric conductor 70 includes that third plants ball ontology 71 and extends the second conductive connecting line outward by third plant ball ontology 71
72, third is planted on the second surface of the pad and/or the second chip 30 on the second surface of ball ontology 71 and the first chip 20
Pad solder, the second conductive connecting line 72 plants one end of ball ontology 71 far from third and pin pad 62 welds.
In one embodiment, the second conductive connecting line 62 is arc-shaped, and in other embodiments, the second conductive connecting line 62 can be with
The shapes such as linear or curve.
In one embodiment, each electric conductor connects each pin pad and the first chip by way of wire bonding
The second surface that pad on 20 second surface, first on the second surface of the first chip 20 plant ball 40, the second chip 30
On pad, the second chip 30 second surface on second plant at least one of ball 50.
In one embodiment, multi-chip welding structure further includes fixed glue, and fixed glue is set to the region Ji Dao 11 and first
Between the first surface of the chip 20 and region Ji Dao 11 and between the first surface of the second chip 30, fixed glue is to by the
One chip 20 and the second chip 30 are individually fixed on the region Ji Dao 11, and in one embodiment, fixed glue can be in conjunction with glue
One of, such as insulating cement or conducting resinl etc..It should be understood that in other embodiments, the region Ji Dao 11 and each chip chamber
It can also be bonded in other way, such as plastic packaging etc..
The above is only the preferred embodiment of the utility model only, is not intended to limit the utility model, all at this
Made any modifications, equivalent replacements, and improvements etc., should be included in the utility model within the spirit and principle of utility model
Protection scope within.
Claims (9)
1. a kind of multi-chip welding structure characterized by comprising
Carrier is provided with the region Ji Dao of chip；
First chip, the first surface of first chip are attached on the region Ji Dao；
Second chip, the first surface of second chip are attached on the region Ji Dao, and first chip and described
Second chip is spaced apart from each other setting with gap；
First plants ball, and described first plants the second surface opposite with the first surface that ball is set on first chip；With
And
Second plants ball, and second including the second surface opposite with the first surface being set on second chip plants ball sheet
Body, and the first conductive connecting line connecting with the first plant ball is extended by the second plant ball ontology outward.
2. multi-chip welding structure as described in claim 1, which is characterized in that first chip and second chip exist
It misplaces in the chip mounting area opposite.
3. multi-chip welding structure as described in claim 1, which is characterized in that the first plant ball is located at first chip
Second surface on pad；The second plant ball ontology is located at the pad on the second surface of second chip.
4. multi-chip welding structure as described in claim 1, which is characterized in that the carrier further includes multiple along the Ji Dao
The pin of area periphery setting, the pin includes pin ontology and pin ontology pin pad interconnected, each
The pin pad is located at close to the inside in the region Ji Dao, each pin pad and first chip and/
Or second chip pass through mutually independent electric conductor respectively and be electrically connected.
5. multi-chip welding structure as claimed in claim 4, which is characterized in that each electric conductor includes that third plants ball sheet
Body and ball ontology is planted by the third extend the second conductive connecting line outward, each third plants the of ball and first chip
Pad on two surfaces and/or the pad solder on the second surface of second chip, each second conductive connecting line are remote
From one end that the third plants ball ontology and each pin pad solder.
6. multi-chip welding structure as claimed in claim 5, which is characterized in that first conductive connecting line and described second is led
Electrical wiring is arc-shaped.
7. multi-chip welding structure as claimed in claim 6, which is characterized in that each electric conductor passes through wire bonding
Mode connects the second table of pad on the second surface of each pin pad and first chip, first chip
First on face plants described the on the second surface of pad on the second surface of ball, second chip, second chip
Two plant at least one of ball.
8. multi-chip welding structure as claimed in claim 4, which is characterized in that further include fixed glue, the fixed glue is set to
Between the region Ji Dao and the first surface of first chip and the Ji Dao with and second chip the first table
Between face, the fixed glue is first chip and second chip to be individually fixed on the region Ji Dao.
9. multi-chip welding structure as claimed in claim 8, which is characterized in that the fixed glue is in conjunction with one of glue.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920614453.1U CN209675286U (en) | 2019-04-29 | 2019-04-29 | A kind of multi-chip welding structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920614453.1U CN209675286U (en) | 2019-04-29 | 2019-04-29 | A kind of multi-chip welding structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209675286U true CN209675286U (en) | 2019-11-22 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201920614453.1U Active CN209675286U (en) | 2019-04-29 | 2019-04-29 | A kind of multi-chip welding structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209675286U (en) |
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2019
- 2019-04-29 CN CN201920614453.1U patent/CN209675286U/en active Active
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| CP01 | Change in the name or title of a patent holder |
Address after: 518000 1st, 5th and 6th floors of No. 1 workshop, No. 28 Qingfeng Avenue, Baolong Street, Longgang District, Shenzhen City, Guangdong Province Patentee after: Shenzhen mifitech Technology Co.,Ltd. Address before: 518000 1st, 5th and 6th floors of No. 1 workshop, No. 28 Qingfeng Avenue, Baolong Street, Longgang District, Shenzhen City, Guangdong Province Patentee before: Shenzhen Mifeitake Technology Co.,Ltd. |