CN209561394U - Power integrated circuit electroplating lead frame - Google Patents

Power integrated circuit electroplating lead frame Download PDF

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Publication number
CN209561394U
CN209561394U CN201920331306.3U CN201920331306U CN209561394U CN 209561394 U CN209561394 U CN 209561394U CN 201920331306 U CN201920331306 U CN 201920331306U CN 209561394 U CN209561394 U CN 209561394U
Authority
CN
China
Prior art keywords
cooling fin
integrated circuit
power integrated
lead frame
chip substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201920331306.3U
Other languages
Chinese (zh)
Inventor
熊志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TAIXING CITY YONGZHI ELECTRONIC DEVICE Co Ltd
Original Assignee
TAIXING CITY YONGZHI ELECTRONIC DEVICE Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TAIXING CITY YONGZHI ELECTRONIC DEVICE Co Ltd filed Critical TAIXING CITY YONGZHI ELECTRONIC DEVICE Co Ltd
Priority to CN201920331306.3U priority Critical patent/CN209561394U/en
Application granted granted Critical
Publication of CN209561394U publication Critical patent/CN209561394U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model relates to a kind of power integrated circuit electroplating lead frames, including cooling fin, chip substrate, terminal pin, the cooling fin is through connection sheet link chips substrate, a heat dissipation air holes along cooling fin towards chip substrate direction is opened up in connection sheet, cooling fin front punching press impression, the back side form heat dissipation fin by impression, the chip substrate is equipped with electroplated layer, and electroplated layer is in constant velocity spiral shape.Its structure is simple, is able to satisfy the larger heat dissipation capacity demand of high-power integrated circuit, takes into account plating, plastic packaging performance.

Description

Power integrated circuit electroplating lead frame
Technical field
The utility model designs a kind of lead frame, specifically a kind of power integrated circuit electroplating lead frame.
Background technique
With the development of electronics industry, high-power circuit is integrated using the more and more of Plastic Package form, wherein using Lead frame must adapt to the heat dissipation after plastic packaging different structure chip, conduction and the requirement for carrying high-power chip, this is just right Size, electric conductivity and the heat dissipation performance of lead frame require highest.The lead frame of traditional structure is divided into full plating or part Dotted plating, full electroplating cost is high, the dotted plating in part then cannot the completely compatible welding using different structure chip, existing makes With limitation.
Summary of the invention
It is simple that the utility model provides a kind of structure, is able to satisfy the larger heat dissipation capacity demand of high-power integrated circuit, takes into account It is electroplated, the power integrated circuit electroplating lead frame of plastic packaging performance.
The technical solution adopted in the utility model is: a kind of power integrated circuit electroplating lead frame, including cooling fin, A chip substrate, terminal pin, it is characterised in that: the cooling fin is opened up along dissipating in connection sheet through connection sheet link chips substrate For backing towards the heat dissipation air holes in chip substrate direction, cooling fin front punching press impression, the back side form heat dissipation fin by impression, described Chip substrate is equipped with electroplated layer, and electroplated layer is in constant velocity spiral shape.
The left and right pin of the middle pin link chips substrate of the terminal pin, terminal pin is equipped with welding section, welding section It is equipped with electroplated layer.
The cooling fin front punching press impression coats thermal grease layer.
The graphene coated heat-radiation coating bed of material of cooling fin backside radiator fin.
The utility model opens up heat dissipation air holes in the connection sheet of cooling fin and chip substrate transmission radiating, in lead frame Effective heat dissipation is carried out during interior heat transmission first, then when heat transmission arrives cooling fin, in conjunction with positive, the back side pressure Trace, fin radiate, double-radiation function effect, are more able to satisfy the larger heat dissipation capacity demand of high-power integrated circuit;Chip substrate Upper setting is in constant velocity spiral shape electroplated layer, is electroplated without whole face, reduces electroplating cost and is able to satisfy different shapes and sizes simultaneously The convenient stabilization of subsequent plastic packaging is taken into account in the welding of chip any position on chip substrate.
Detailed description of the invention
FIG. 1 is a schematic structural view of the utility model;
Fig. 2 is Fig. 1 right view.
In figure: cooling fin 1, thermal grease layer 3, heat dissipation fin 4, the graphene heat-radiation coating bed of material 5, connection sheet 6, dissipates impression 2 Hot wind hole 7, chip substrate 8, constant velocity spiral electroplated layer 9, middle pin 10, left pin 11, right pin 12.
Specific embodiment
Fig. 1, shown in 2: a kind of power integrated circuit electroplating lead frame includes that cooling fin 1, chip substrate 8, centre are drawn Foot 10, left pin 11, right pin 12.Cooling fin 1 is opened up along cooling fin in connection sheet 6 through 6 link chips substrate 8 of connection sheet Towards the heat dissipation air holes 7 in chip substrate direction, the punching press of cooling fin front coats the impression 2 of thermal grease layer 3, the back side by impression shape At the heat dissipation fin 3 of, the graphene coated heat-radiation coating bed of material 5, constant velocity spiral electroplated layer 9 is equipped in the middle part of chip substrate 8;Middle pin 10 link chips substrates 8, left and right pin 12,12 are equipped with welding section, and welding section is equipped with electroplated layer.

Claims (4)

1. a kind of power integrated circuit electroplating lead frame, including cooling fin, chip substrate, terminal pin, it is characterised in that: institute Cooling fin is stated through connection sheet link chips substrate, the radiation air along cooling fin towards chip substrate direction is opened up in connection sheet Hole, cooling fin front punching press impression, the back side form heat dissipation fin by impression, and the chip substrate is equipped with electroplated layer, electroplated layer In constant velocity spiral shape.
2. a kind of power integrated circuit electroplating lead frame according to claim 1, it is characterized in that: the terminal pin Middle pin link chips substrate, the left and right pin of terminal pin are equipped with welding section, and welding section is equipped with electroplated layer.
3. a kind of power integrated circuit electroplating lead frame according to claim 1, it is characterized in that: the cooling fin is just Punching press impression in face coats thermal grease layer.
4. a kind of power integrated circuit electroplating lead frame according to claim 1, it is characterized in that: the cooling fin is carried on the back Radiate the graphene coated heat-radiation coating bed of material of fin in face.
CN201920331306.3U 2019-03-15 2019-03-15 Power integrated circuit electroplating lead frame Expired - Fee Related CN209561394U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201920331306.3U CN209561394U (en) 2019-03-15 2019-03-15 Power integrated circuit electroplating lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201920331306.3U CN209561394U (en) 2019-03-15 2019-03-15 Power integrated circuit electroplating lead frame

Publications (1)

Publication Number Publication Date
CN209561394U true CN209561394U (en) 2019-10-29

Family

ID=68313067

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201920331306.3U Expired - Fee Related CN209561394U (en) 2019-03-15 2019-03-15 Power integrated circuit electroplating lead frame

Country Status (1)

Country Link
CN (1) CN209561394U (en)

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Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20191029

Termination date: 20200315