CN209515656U - Novel chip packaging body - Google Patents
Novel chip packaging body Download PDFInfo
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- CN209515656U CN209515656U CN201821699387.4U CN201821699387U CN209515656U CN 209515656 U CN209515656 U CN 209515656U CN 201821699387 U CN201821699387 U CN 201821699387U CN 209515656 U CN209515656 U CN 209515656U
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Abstract
The utility model provides novel chip packaging body.The novel chip packaging body includes base plate, contact pin and nut cap, wherein base plate includes substrate, through-hole, trap bottom, golden finger and base rank, and through-hole is divided into internal layer through-hole and outer layer through-hole.The novel chip packaging body simple production process is flexible, and compatible existing routing environment, can engineering phase rapidly, inexpensive sample preparation；Moreover, the substrate of novel chip packaging body uses specific phenoplasts, have the characteristics such as high rigidity, resistant to high temperatures, wear-resistant, anticorrosive, insulation, and be electrically connected by combining pin and chip to realize.The novel chip packaging body can directly cover cap manually, avoid being damaged by external force, and design the FA related needs for meeting engineering phase, facilitate increase peripheral components, can directly observe electric injury and carry out failure analysis.
Description
Technical field
The utility model relates to integrated antenna package technical field more particularly to novel chip packaging bodies.
Background technique
It encapsulates most important for chip, on the one hand, because the chip subtracted after drawing need to be isolated from the outside, prevent in air
Impurity causes corrosion to chip circuit and electric property is caused to decline；On the other hand, packaged chip is also convenient for testing and transport
It is defeated.As shown in Figure 1, being existing chip plastic packaging package body structure, which includes pipe leg 110 and shell 120, pipe leg
110 are communicated, and shell 120 can protect encapsulation process.Be packaged with diversified forms, DIP, QFP, PGA, BGA, SOP,
QFN etc. can use dual-inline package form (DIP envelope in product engineering stage overwhelming majority middle small scale integrated circuit
Dress) or module packing forms application evaluation work, although general ceramic cartridge is simple to manufacture, but packaging cost is high
And pin count is limited, although in addition QFP/SOP/QFN of plastic packaging etc. is compared to ceramic package with cost advantage, production cycle
It is too long, engineering demand can be seriously affected.Engineering phase is usually the demand of small lot personalization, fast, efficient, safe especially heavy
It wants.In addition in the failure analysis stage, if encountering chip cisco unity malfunction, damage etc., it is also necessary to uncap again (Decap),
It takes out chip (die), the tedious steps such as encapsulate again, whole flow process becomes complicated, seriously affects the failure analysis period.
Utility model content
In view of the above-mentioned deficiencies in the prior art, the purpose of the utility model is to provide a kind of encapsulation of novel chip
Body, the novel chip packaging body include base plate, contact pin and nut cap, which solves IC project rank
Duan Sudu is slowly and high-cost sample preparation problem realizes engineering phase low cost, quick approved sample lid while increasing number of leads
Cap, and meet and increase peripheral components and directly the FA related needs such as observation electric injury.
In order to reach above-mentioned technical purpose, the technical scheme adopted by the utility model is
A kind of novel chip packaging body, the packaging body include base plate, contact pin and nut cap, wherein base plate includes base
Plate, through-hole, trap bottom, golden finger and base rank；Substrate uses phenoplasts, and with a thickness of 1.5mm, four sides of substrate respectively have several logical
Hole, the diameter of through-hole are 0.889mm；
Through-hole is divided into internal layer through-hole and outer layer through-hole, and internal layer through-hole and outer layer through-hole are relatively arranged in parallel, internal layer through-hole and
The pitch of holes of outer layer through-hole is 1.778mm, and the linear distance between internal layer through-hole and outer layer through-hole edge is 0.889mm, internal layer
Through-hole forms metal by connecting line with outer layer through-hole and connect, and internal layer through-hole Edge Distance base rank edge minimum linear distance is
0.889mm, the minimum linear distance on outer layer through-hole Edge Distance substrate one side are 5mm；
Trap bottom is copper nickel plating gold-plated material again, and layer gold is with a thickness of 0.762um；
Golden finger is copper nickel plating gold-plated metallization material again, and layer gold is 1mm with a thickness of 0.762um, the length of golden finger,
The minimum linear distance at golden finger edge and base rank edge is 1mm, and golden finger edge and the minimum linear distance on trap bottom edge edge are
1mm；
Base rank is copper nickel plating gold-plated metallization material again, and layer gold is 12.6mm with a thickness of 0.762um, the side length of base rank,
The width of base rank is 0.8mm；
Contact pin length is 12mm, and contact pin is inserted in the inner and outer layer through-hole of internal layer through-hole by welding, and is formed with substrate
Vertical connection, internal layer through-hole stick with contact pin, and it is vacant to reserve 5 ~ 10 outer layer through-holes；
Nut cap is the square cavity of copper nickel plating gold-plated material again, and layer gold is 11mm with a thickness of 0.762um, the side length of nut cap,
The height of nut cap is 2mm, and four sides of nut cap are base edge, and the width on base edge is 0.8mm, base rank on the width and base plate on base edge
Width is equal；
Bare chip is pasted at the trap bottom of base plate, is connect by bonding wire with golden finger, realizes entire base plate electrical connection；
Substrate forms the internal layer through-hole and outer layer through-hole of parallelly distribute on as package carrier on substrate, and make golden finger,
Internal layer through-hole and the electrical connection of outer layer through-hole, entire base plate electrical connection paste bare chip in trap bottom, will be on bare chip
Gold wire bonding is carried out between each Pad and each golden finger, and by the base of nut cap along welding with the base rank on substrate, nut cap is welded
After the completion of connecing, contact pin is welded in internal layer through-hole and outer layer through-hole, internal layer through-hole sticks with contact pin, reserves 5 ~ 10 outer layer through-holes
It is vacant, and contact pin is connected with corresponding substrate holder, so that bare chip realizes electrical connection, and engineering tune is carried out to packaging body
Examination, to test the communication conditions of bare chip.
The utility model is due to using the structure of said base plate, contact pin and nut cap as packaging body, wherein base plate
Including substrate, internal layer through-hole, outer layer through-hole, trap bottom, golden finger and base rank, beneficial effect obtained is, firstly, the New-core
Piece packaging body simple production process is flexible, and compatible existing routing environment, can engineering phase rapidly, low cost system
Sample；Moreover, the substrate of novel chip packaging body uses phenoplasts, have high rigidity, resistant to high temperatures, wear-resistant, anticorrosive, insulation
Etc. characteristics, and be electrically connected by combining pin and chip to realize；Meanwhile novel chip packaging body directly covers cap manually, keeps away
From damaging to external force, and the FA related needs for meeting engineering phase are designed, facilitates increase peripheral components, can directly observe electricity
Damage carries out failure analysis.
The utility model is described further with reference to the accompanying drawings and detailed description.
Detailed description of the invention
Fig. 1 is existing chip plastic packaging package body structure figure.
Fig. 2 is the novel chip packaging body three-dimensional structure diagram of the utility model specific implementation.
Fig. 3 is base plate three-dimensional structure diagram in the novel chip packaging body of the utility model specific implementation.
Fig. 4 is nut cap three-dimensional structure diagram in the novel chip packaging body of the utility model specific implementation.
Specific embodiment
Referring to Fig. 2, the novel chip packaging body three-dimensional structure diagram of the utility model specific implementation.Novel chip encapsulation
Body, the packaging body include base plate 200, contact pin 300 and nut cap 400, wherein base plate 200 includes substrate 210, through-hole
220, trap bottom 230, golden finger 240 and base rank 250；Substrate 210 uses phenoplasts, with a thickness of 1.5mm, four sides of substrate 210
Respectively there are several through-holes 220, the diameter of through-hole is 0.889mm；Through-hole 220 divides for internal layer through-hole 220A and outer layer through-hole 220B, interior
Layer through-hole 220A and outer layer through-hole 220B is relatively arranged in parallel, and the pitch of holes of internal layer through-hole 220A and outer layer through-hole 220B are
Linear distance between 1.778mm, internal layer through-hole 220A and the edge outer layer through-hole 220B is 0.889mm, internal layer through-hole 220A with
Outer layer through-hole 220B forms metal connection, the edge minimum straight line of internal layer through-hole 220A Edge Distance base rank by connecting line 310
Distance is 0.889mm, and the minimum linear distance on outer layer through-hole 220B Edge Distance substrate one side is 5mm.
Trap bottom 230 is copper nickel plating gold-plated material again, and layer gold is with a thickness of 0.762um.
Golden finger 240 is copper nickel plating gold-plated metallization material again, and layer gold is with a thickness of 0.762um, the length of golden finger 240
For 1mm, the linear distance at 240 edge of golden finger and 250 edge of base rank is 1mm, 240 edge of golden finger and 250 edge of trap bottom
Linear distance is 1mm.
Base rank 250 is copper nickel plating gold-plated metallization material again, and layer gold is with a thickness of 0.762um, the side length of base rank 250
12.6mm, the width of base rank 250 are 0.8mm.
300 length of contact pin is 12mm, and contact pin 300 is inserted in the inner and outer layer through-hole 220B of internal layer through-hole 220A by welding
Interior and in a vertical connection with 210 shape of substrate, internal layer through-hole 220A sticks with contact pin, and it is vacant to reserve 5 ~ 10 outer layer through-hole 220B.
Nut cap 400 is the square cavity of copper nickel plating gold-plated material again, and layer gold is with a thickness of 0.762um, the side length of nut cap 400
11mm, the height of nut cap 400 are 2mm, and four sides of nut cap 400 are base along 410, and base is 0.8mm along 410 width, and base is along 410
Width is equal with the width of base rank 250 on base plate 200.
Bare chip is pasted at the trap bottom 230 of base plate 200, is connect by bonding wire with golden finger 240, realizes entire base plate electricity
Gas connection.
Substrate 210 is used as package carrier, forms the internal layer through-hole 220A and outer layer through-hole of parallelly distribute on over the substrate 210
220B, and it is electrically connected golden finger 240, internal layer through-hole 220A and outer layer through-hole 220B electrical connection, entire base plate 200,
Bare chip is pasted at trap bottom 230, gold wire bonding will be carried out between each Pad and each golden finger 240 on bare chip, and will lid
The base of cap 400 is welded along 410 with the base rank 250 on substrate 210, and after the completion of nut cap 400 is welded, contact pin 300 is welded on
In internal layer through-hole 220A and outer layer through-hole 220B, internal layer through-hole 220A sticks with contact pin, and reserved 5 ~ 10 outer layer through-hole 220B are vacant,
And contact pin 300 is connected with corresponding substrate holder 200, so that bare chip realizes electrical connection, and engineering tune is carried out to packaging body
Examination, to test the communication conditions of bare chip.
Referring to Fig. 3, base plate three-dimensional structure diagram in the novel chip packaging body of the utility model specific implementation.The specific reality
In the base plate 200 applied, including substrate 210, through-hole 220, trap bottom 230, golden finger 240 and base rank 250, it is interior that through-hole 220, which divides,
Layer through-hole 220A and outer layer through-hole 220B；Wherein, S1 0.8mm is the width of base rank；S2 is 1mm, is base rank edge and golden hand
Refer to the distance at edge；S3 is 1mm, is golden finger length；S4 is 1mm, is golden finger edge at a distance from the edge of trap bottom edge；S5 is
5mm is the side length at trap bottom；S6 is 0.889mm, is the minimum linear distance of base rank outer edge Yu internal layer through-hole edge；S7 is
0.889mm is the diameter of internal layer through-hole；S8 is 0.889mm, is internal layer through-hole edge directly corresponding outer layer through-hole side
The minimum linear distance of edge；S9 is 0.889mm, is the diameter of outer layer through-hole；S10 is 5mm, is outer layer through-hole edge and substrate side
The minimum linear distance of edge.
Referring to Fig. 4, for nut cap three-dimensional structure diagram in the novel chip packaging body of the utility model specific implementation.Nut cap 400
For the square cavity of copper nickel plating gold-plated material again, side length S12 is 11mm, and height T1 is 2mm；Four Bian Weiji of nut cap 400
Along 410, base is 0.8mm along 410 width S 11.
The utility model is not limited to embodiment discussed above, the above description to specific embodiment be intended to for
Description and explanation the utility model relates to technical solution.Obvious transformation or substitution based on the utility model enlightenment
It should also be as being considered within the protection scope of the utility model；Above specific embodiment is used to disclose the utility model most
Good implementation method, so that those skilled in the art can be using the numerous embodiments of the utility model and a variety of
Alternative reaches the purpose of this utility model.
Claims (1)
1. a kind of novel chip packaging body, which is characterized in that the packaging body includes base plate, contact pin and nut cap, wherein pedestal
Plate includes substrate, through-hole, trap bottom, golden finger and base rank；Substrate uses phenoplasts, and with a thickness of 1.5mm, four sides of substrate respectively have
Several through-holes, the diameter of through-hole are 0.889mm；
Through-hole is divided into internal layer through-hole and outer layer through-hole, and internal layer through-hole and outer layer through-hole are relatively arranged in parallel, internal layer through-hole and outer layer
The pitch of holes of through-hole is 1.778mm, and the linear distance between internal layer through-hole and outer layer through-hole edge is 0.889mm, internal layer through-hole
It forms metal by connecting line with outer layer through-hole to connect, internal layer through-hole Edge Distance base rank edge minimum linear distance is
0.889mm, the minimum linear distance on outer layer through-hole Edge Distance substrate one side are 5mm；
Trap bottom is copper nickel plating gold-plated material again, and layer gold is with a thickness of 0.762um；
Golden finger is copper nickel plating gold-plated metallization material again, and layer gold is 1mm, golden hand with a thickness of 0.762um, the length of golden finger
The minimum linear distance for referring to edge and base rank edge is 1mm, and the minimum linear distance on golden finger edge and trap bottom edge edge is 1mm；
Base rank is copper nickel plating gold-plated metallization material again, and layer gold is 12.6mm, base rank with a thickness of 0.762um, the side length of base rank
Width be 0.8mm；
Contact pin length is 12mm, and contact pin is inserted in the inner and outer layer through-hole of internal layer through-hole by welding, and is formed with substrate vertical
Connection, internal layer through-hole stick with contact pin, and it is vacant to reserve 5 ~ 10 outer layer through-holes；
Nut cap is the square cavity of copper nickel plating gold-plated material again, and layer gold is 11mm, nut cap with a thickness of 0.762um, the side length of nut cap
Height be 2mm, four sides of nut cap are base edge, and the width on base edge is 0.8mm, the width of base rank on the width and base plate on base edge
It is equal；
Bare chip is pasted at the trap bottom of base plate, is connect by bonding wire with golden finger, realizes entire base plate electrical connection；
Substrate forms the internal layer through-hole and outer layer through-hole of parallelly distribute on as package carrier on substrate, and makes golden finger, internal layer
Through-hole and the electrical connection of outer layer through-hole, entire base plate electrical connection paste bare chip in trap bottom, will be each on bare chip
Gold wire bonding is carried out between Pad and each golden finger, and by the base of nut cap along welding with the base rank on substrate, nut cap has been welded
Contact pin is welded in internal layer through-hole and outer layer through-hole by Cheng Hou, and internal layer through-hole sticks with contact pin, and it is empty to reserve 5 ~ 10 outer layer through-holes
It sets, and contact pin is connected with corresponding substrate holder, so that bare chip realizes electrical connection, and engineering debugging is carried out to packaging body,
To test the communication conditions of bare chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821699387.4U CN209515656U (en) | 2018-10-19 | 2018-10-19 | Novel chip packaging body |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821699387.4U CN209515656U (en) | 2018-10-19 | 2018-10-19 | Novel chip packaging body |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209515656U true CN209515656U (en) | 2019-10-18 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821699387.4U Active CN209515656U (en) | 2018-10-19 | 2018-10-19 | Novel chip packaging body |
Country Status (1)
| Country | Link |
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| CN (1) | CN209515656U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111856242A (en) * | 2020-06-22 | 2020-10-30 | 深圳米飞泰克科技有限公司 | Detection method and device for sealed chip and electronic equipment |
-
2018
- 2018-10-19 CN CN201821699387.4U patent/CN209515656U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111856242A (en) * | 2020-06-22 | 2020-10-30 | 深圳米飞泰克科技有限公司 | Detection method and device for sealed chip and electronic equipment |
| CN111856242B (en) * | 2020-06-22 | 2021-09-07 | 深圳米飞泰克科技有限公司 | Detection method and device for sealed chip and electronic equipment |
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