CN209329946U - One kind being used for the concatenated low inductance stack bus bar of four power semiconductors - Google Patents
One kind being used for the concatenated low inductance stack bus bar of four power semiconductors Download PDFInfo
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- CN209329946U CN209329946U CN201821891866.6U CN201821891866U CN209329946U CN 209329946 U CN209329946 U CN 209329946U CN 201821891866 U CN201821891866 U CN 201821891866U CN 209329946 U CN209329946 U CN 209329946U
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- Prior art keywords
- bus bar
- busbar
- power semiconductor
- low inductance
- power semiconductors
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 60
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 4
- 229910052802 copper Inorganic materials 0.000 claims abstract description 4
- 239000010949 copper Substances 0.000 claims abstract description 4
- 239000004020 conductor Substances 0.000 claims description 12
- 238000009413 insulation Methods 0.000 claims description 9
- 238000003475 lamination Methods 0.000 claims description 2
- 230000003071 parasitic effect Effects 0.000 abstract description 4
- 229910010271 silicon carbide Inorganic materials 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000005669 field effect Effects 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- -1 silicon carbide metal-oxide Chemical class 0.000 description 3
- 230000006872 improvement Effects 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
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- Inverter Devices (AREA)
Abstract
The utility model discloses one kind to be used for the concatenated low inductance stack bus bar of four power semiconductors, including an input busbar, an intermediate busbar, an alternating current bus bar.Wherein, the input busbar and intermediate busbar include five layer laminates, and the alternating current bus bar is exposed copper bar.The utility model is connected in series suitable for multiple power semiconductors, compact-sized, and simple to install is convenient.The utility model can effectively reduce multiple power semiconductor series connection commutation circuit parasitic inductances, reduce the overshoot voltage of power semiconductor, reduce the unbalanced degree of voltage between each device, to improve multiple power semiconductors current transformer voltage class in series and capacitance grade.
Description
Technical field
The utility model belongs to stack bus bar technical field, and in particular to one kind is for four power semiconductor series connection
Low inductance stack bus bar.
Background technique
Power semiconductor is the active component in basis in electronic power convertor, is composition power electronic equipment
Most basic element.With the continuous improvement of the voltage class of electronic power convertor, single power semiconductor is difficult to meet
Design requirement.It needs to share high voltage by more devices in series, energy serial connection technology is divided into device in direct current transportation at present
Directly series connection and more level series connection (modular multilevel MMC), wherein directly series connection has that device usage quantity is few, topological structure
Simply, the advantages that control and design protection are simple.
Multiple power semiconductors are directly connected, and are required the electric voltage equalization on each device very high.Due to power half
Conductor device switching speed is fast, and the parasitic inductance on commutation circuit can induce very big overvoltage.Mature devices in series
Wiring is carried out using copper bar, parasitic inductance is big, and the caused unbalanced degree of voltage is significantly increased when devices switch is asynchronous, pole
The voltage class of devices in series mould group and the raising of capacitance grade are limited greatly.
Utility model content
In view of above-mentioned, the utility model provides a kind of female for the concatenated low inductance lamination of four power semiconductors
Row, the stack bus bar are provided in series low inductor commutation circuit for multiple power semiconductors, greatly reduction power semiconductor
Caused voltage overshoot when device Commutation；When each power semiconductor since manufacturing process, control loop etc. cause difference
When step, low loop inductance effectively inhibits the unbalanced problem of voltage.It is in series to improve multiple power semiconductors
Current transformer voltage class and capacitance grade, meanwhile, laminated bus bar structure is compact, and simple to install is convenient.
One kind being used for the concatenated low inductance stack bus bar of four power semiconductors, including one has anode input
It holds, the input busbar of negative input, an intermediate busbar with power semiconductor mounting hole, an alternating current bus bar,
One alternating current bus bar with ac output end；Wherein, the input busbar and the intermediate busbar include five layer laminates, from
Under to it is upper successively are as follows: lower layer's insulation board, lower layer's conductor plate, intermediate insulation plate, top conductor plate, upper layer insulation board；The exchange
Busbar is exposed copper bar.
Further, the input busbar is L-shaped, including a horizontal plane and a vertical plane, wherein vertical plane includes
Positive and negative anodes input terminal, horizontal plane include two power semiconductor mounting holes.
Further, the intermediate busbar is rectangle, and respectively there is a power semiconductor mounting hole at four angles.
Further, the positive and negative anodes input terminal respectively includes two power semiconductor mounting holes.
Further, the power semiconductor mounting hole packet size and aperture correspond to the size of power semiconductor
With installation pin.
Further, the power semiconductor uses IGBT (insulated gate bipolar transistor) module or SiC
MOSFET (silicon carbide metal-oxide semiconductor field effect transistor) module.
The utility model is small using stack bus bar magnetic field coupling area, and the small feature of parasitic inductance is partly led in multiple power
Negative loop current is constructed on the commutation circuit of body devices in series, forms the effect of magnetic field cancellation, to greatly reduce circuit
Inductance.In use, power semiconductor is sequentially connected to above-mentioned power semiconductor mounting hole, series connection can be formed
Mode.Structure is simple, simple to install.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of specific embodiment of the present utility model.
Fig. 2 is the cross-sectional view that busbar, intermediate busbar are inputted in Fig. 1.
The specific embodiment that Fig. 3 (a) is Fig. 1 is applied to four concatenated connection schematic diagrams of power semiconductor.
Fig. 3 (b) is that the power semiconductor in Fig. 3 (a) is SiC MOSFET (silicon carbide metal-oxide semiconductor
Field effect transistor) module when equivalent schematic diagram.
Fig. 3 (c) is the power semiconductor in Fig. 3 (a) when being IGBT (insulated gate bipolar transistor) module etc.
Imitate schematic diagram.
Specific embodiment
In order to more specifically describe the utility model, with reference to the accompanying drawing and specific embodiment is to the utility model
Technical solution is described in detail.
It is folded as shown in Figure 1, present embodiment discloses one kind for the concatenated low inductance of four power semiconductors
Layer busbar, including input busbar 1, intermediate busbar 2, alternating current bus bar 3.Wherein, input busbar 1 is L-shaped, including horizontal plane and vertical
Face.2 surface of horizontal plane and intermediate busbar, 3 surface of alternating current bus bar is in same plane；Vertical plane include electrode input end 101,
Negative input 104, for connecting higher level's DC power supply or DC capacitor busbar.Inputting busbar 1 includes power semiconductor
Mounting hole 102,103, intermediate busbar 2 include four power semiconductor mounting hole 201-204, and alternating current bus bar includes power half
Conductor device mounting hole 301,303 is used to connect with power semiconductor input electrode.
Inputting busbar 1 and intermediate busbar 2 is the stack bus bar for including five layer laminates, as shown in Fig. 2, its sectional view is by five layers
Composition, comprising: upper layer insulation board 001, top conductor plate 002, intermediate insulation plate 003, lower layer's conductor plate 004, lower layer's insulation board
005.As shown in Figure 1, the electrode input end 101 and mounting hole 102 are located at the input busbar top conductor layer, the cathode
Input terminal 104 and mounting hole 103 are located at input busbar lower layer conductor layer；Similarly, mounting hole 201 and 202 is located at described
Intermediate 2 top conductor layer of busbar, mounting hole 203 and 204 are located at intermediate 2 lower layer's conductor layer of busbar.
When present embodiment is applied to four power semiconductor series connection, connection schematic diagram such as Fig. 3 (a) institute
Show, mounting hole 102 connects the anode of power semiconductor M1, and the cathode of power semiconductor M1 connects mounting hole 201；Class
As, mounting hole 202 connects the anode of power semiconductor M2, and the cathode of power semiconductor M2 connects mounting hole 301；
Similarly, mounting hole 303 connects the anode of power semiconductor M3, and the cathode of power semiconductor M3 connects mounting hole
203；Similarly, mounting hole 204 connects the anode of power semiconductor M4, and the cathode of power semiconductor M4 connects installation
Hole 103.
When above-mentioned power semiconductor is SiC MOSFET (silicon carbide metal-oxide semiconductor field effect transistor)
When module, the equivalent circuit of Fig. 3 (a) such as Fig. 3 (b).
When above-mentioned power semiconductor is IGBT (insulated gate bipolar transistor) module, the equivalent circuit of Fig. 3 (a)
Such as Fig. 3 (c).
The above-mentioned description to embodiment is for that can understand and apply this practical convenient for those skilled in the art
It is novel.Person skilled in the art obviously easily can make various modifications to above-described embodiment, and illustrating herein
General Principle be applied in other embodiments without having to go through creative labor.Therefore, the utility model is not limited to above-mentioned
Embodiment, those skilled in the art's announcement according to the present utility model, the improvement made for the utility model and modification are all answered
This is within the protection scope of the utility model.
Claims (6)
1. one kind is used for the concatenated low inductance stack bus bar of four power semiconductors, it is characterised in that: have including one
The input busbar of electrode input end, negative input, an intermediate busbar with power semiconductor mounting hole, a friendship
Flow busbar；Wherein, the input busbar and the intermediate busbar include five layer laminates, from top to bottom successively are as follows: lower layer's insulation
Plate, lower layer's conductor plate, intermediate insulation plate, top conductor plate, upper layer insulation board；The alternating current bus bar is exposed copper bar.
2. it is according to claim 1 a kind of for the concatenated low inductance stack bus bar of four power semiconductors, it is special
Sign is: the input busbar is L-shaped, including a horizontal plane and a vertical plane, wherein vertical plane is inputted comprising positive and negative anodes
End, horizontal plane include two power semiconductor mounting holes.
3. it is according to claim 1 a kind of for the concatenated low inductance stack bus bar of four power semiconductors, it is special
Sign is: the intermediate busbar is rectangle, and respectively there is a power semiconductor mounting hole at four angles.
4. it is according to claim 1 a kind of for the concatenated low inductance stack bus bar of four power semiconductors, it is special
Sign is: the alternating current bus bar includes two power semiconductor mounting holes and two switching mounting holes.
5. according to claim 1-4 a kind of female for the concatenated low inductance lamination of four power semiconductors
Row, it is characterised in that: the power semiconductor mounting hole packet size and aperture correspond to power semiconductor size and
Pin is installed.
6. it is according to claim 1 a kind of for the concatenated low inductance stack bus bar of four power semiconductors, it is special
Sign is that the power semiconductor uses IGBT module or SiCMOSFET module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821891866.6U CN209329946U (en) | 2018-11-16 | 2018-11-16 | One kind being used for the concatenated low inductance stack bus bar of four power semiconductors |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821891866.6U CN209329946U (en) | 2018-11-16 | 2018-11-16 | One kind being used for the concatenated low inductance stack bus bar of four power semiconductors |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209329946U true CN209329946U (en) | 2019-08-30 |
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ID=67710544
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821891866.6U Active CN209329946U (en) | 2018-11-16 | 2018-11-16 | One kind being used for the concatenated low inductance stack bus bar of four power semiconductors |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209329946U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109510438A (en) * | 2018-11-16 | 2019-03-22 | 国网江苏省电力有限公司盐城供电分公司 | One kind being used for the concatenated low inductance stack bus bar of four power semiconductors |
-
2018
- 2018-11-16 CN CN201821891866.6U patent/CN209329946U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109510438A (en) * | 2018-11-16 | 2019-03-22 | 国网江苏省电力有限公司盐城供电分公司 | One kind being used for the concatenated low inductance stack bus bar of four power semiconductors |
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