CN107546974A - Booster circuit and inverter topology with cascade diode circuit - Google Patents
Booster circuit and inverter topology with cascade diode circuit Download PDFInfo
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- CN107546974A CN107546974A CN201710486849.8A CN201710486849A CN107546974A CN 107546974 A CN107546974 A CN 107546974A CN 201710486849 A CN201710486849 A CN 201710486849A CN 107546974 A CN107546974 A CN 107546974A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
- H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/487—Neutral point clamped inverters
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
This patent disclosure relates generally to the topology for booster circuit, inverter and half-bridge circuit.PFC (PFC) booster circuit for being connected to exchange (AC) power supply includes：For being connected to the AC input node (102) of AC power supplies；For being connected to the reference potential node (104) of reference potential；And at least the first and second power transistors, differential concatenation is connected between the AC input node and the reference potential node relative to each other for it, wherein the first power transistor (T1) is connected in antiparallel to the first power diode (D5), the second power transistor (T2) and is connected in antiparallel to the second power diode (D6).First diode circuit (D1, D2) is connected between the AC input node (102) and positive output node (112), and being connected in series including the first and second diode elements with different recovery times.
Description
Technical field
This patent disclosure relates generally to electronic power switching circuit, particularly using the electricity of two or more controlled switch
Power module.More specifically, the invention provides the improved topology for booster circuit, inverter and half-bridge circuit.
Applied in field of power electronics and many for example in the inverter module in solar energy market, efficiency to become
More and more important, efficiency optimization turns into main design object.Photovoltaic solar cell plate is usually using pulse width modulation
(PWM) inverter is electric into the exchange (AC) that can be fed to power network by direct current (DC) electrical power conversion as caused by solar cell
Power.The typical other application of these inverters includes them in uninterrupted power source (UPS), fuel cell and wind turbine
In application.In addition, PWM inverter can be used for providing compensation for reactive load, for the Harmonics elimination of power supply grid, or use
Make the speed change driver of induction conductivity.The most frequently used inverter is single-phase and three-phase inverter without transformer.
The most frequently used switch element is field-effect transistor FET in inverter design, such as MOS field
Effect transistor MOSFET, bipolar transistor such as insulated gate bipolar transistor IGBT, bipolar junction transistor BJT and grid
Turn-off thyristor GTO.Traditionally, MOSFET is used for low D/C voltage or low-power inverter design.IGBT is used for middle height
Power or high-voltage inverter design.GTO is used for ultra high power inverter design.Nearest development is so-called superjunction (SJ)
MOSFET, it has low-down parasitic capacitance compared with standard MOSFET.SJ MOSFET have input and output capacitance value
Only about half of, this is that switching loss and drive loss bring benefit.
In addition, the present invention relates to PFC (PFC) booster circuit.Especially, the present invention relates to a kind of PFC boost
Circuit, it includes switchable power transistor so that circuit to be switched between flyback state and normal shock state.
Background technology
For many years, industry already has accounted for a variety of different circuit arrangement for PFC boost circuit, to attempt to subtract
Lack number of elements and improve power-efficient to greatest extent while minimizing power attenuation.Arrange Single-phase PFC booster circuit
Traditional approach by bridge-type rectifier by the rectification of AC AC supply voltages be consecutive variations DC voltage source.For example, often
Rule PFC boost circuit can include the full-wave rectifier being made up of four diode elements.Inductance element is set in a series arrangement,
And the output end in rectifier output has been arranged in parallel capacity cell.Switchable power transistor is controlled to be deposited in inductance element
Energy storage capacity and the energy of storage is sent to capacity cell.
The known neutral boost PFC circuit provided by Vincotech companies is provided in Fig. 1.According to the topology, inductance
Device is connected between AC power supplies and the first AC input node 102.First diode D10 be arranged on the first AC input node 102 with
Between first capacitor C1 the first terminal.The first AC is arranged on the second diode D14 of the first diode D10 reverse parallel connections
Between the capacitor C2 of input node 102 and second the first terminal.The Second terminal of first capacitor and the second capacitor is
It is connected to each other at two AC input nodes 104 and is connected to the ground current potential.Two igbts (IGBT) T1, T2 string
Connection is electrically connected between the first AC input node 102 and the second AC input node 104.In addition, diode D5 and D6 are placed on
IGBT T1, T2 flyback path in conducting reverse currents and compensate lacking for body diode in bipolar transistor.Two
IGBT is connected to identical drive element of the grid and identical power supply.
However, it is necessary to complete maximum rated voltage of the blocking voltage as diode D1 and D4 in the known circuit, such as
1200V.When the silicon diode of high rating electrical as use, switching frequency becomes slowly (to generally have to reach more than 4kHz very much
Switching frequency).Alternatively, expensive carborundum (SiC) Schottky-barrier diode can be used.With the PFC shown in Fig. 1
Current potential ring when the problem of circuit is relevant is an emergency off.After IGBT T1, T2 shut-off, reverse recovery current will be opposite
Direction is charged to inductor L, and the voltage at the first AC input node 102 is changed into opposite D/C voltage.
In addition, for other known power module circuitry, such as the inverter with neutral point clamper (NPC) topology,
Need the rapid pressure diode with high blocking voltage (such as 1200V).Fig. 8 to Figure 10 shows mixed-voltage NPC inversions
The conventional topology of device module, wherein diode need the half of commutation D/C voltage, but must be blocked during inactive half-wave
Whole voltages.In other words it is necessary to have the fast diode of high voltage-rated, thus custom circuit manufacturing cost is high.
Accordingly, it is desirable to provide it can be realized with less expensive element simultaneously again safe, sane, blanket improved
PFC boost circuit, NPC inverter circuit, booster circuit and three-phase inverter.
The content of the invention
The purpose solves by the theme of independent claims.The Advantageous embodiments of the present invention are dependent claims
Theme.
The present invention is based on following design：Compared with using the single diode with specific blocking voltage, using with one
Being connected in series of at least two diodes of half blocking voltage reduces QRR and therefore reduces switching loss.
According to the present invention, single diode being connected in series by the diode with different resume speeds in various power module circuits
Replaced.
According to the first Advantageous embodiments of the present invention, there is provided one kind be used to being connected to the power of exchange (AC) power supply because
Number correction (PFC) booster circuit, the PFC boost circuit include：For being connected to the AC input node of AC power supplies；For connecting
To the reference potential node of reference potential；For exporting the positive output node of positive D/C voltage and for exporting the negative defeated of negative D/C voltage
Egress；And at least the first and second power transistors, differential concatenation is connected to the AC input node relative to each other for it
Between the reference potential node.
First power transistor is connected in antiparallel to the first power diode, the second power transistor and is connected in antiparallel
To the second power diode.These first and second power diodes by first and second power transistor body diode
Formed, wherein the power transistor is, for example, MOSFET or IGBT.In the case where power transistor is based on GaN manufactures,
Wherein reverse bias (or diode) operation has slightly different mechanism, and first and second power diode can be favourable
Ground is formed by the diode separately manufactured with first and second power transistor.For example, diode can with for switching
The circuit of synchronous rectification integrate.
According to the present invention, the first diode circuit is connected between the AC input node and the positive output node, its
Described in the first diode circuit include first and second diode elements with different recovery times and being connected in series.
By using the single diode of two diode in place traditional arrangements with different recovery times, in diode
One can advantageously fast recovery diode, and another in diode is the low pressure for being optimized to reduce quiescent dissipation
Diode drops.In operation, fast diode handles commutation during switch, and low pressure drop diode is in the static blocking mode phase
Between increase blocking ability.The operator scheme is that three-phase PFC is favourable for example for typical three level AC/DC converter applications
's.During a half-wave, only inactive diode is loaded full blocking voltage.The diode just to be commutated is only in face of maximum
The half of voltage.Exemplarily, when when the D/C voltage of 1200V altogether is used together, two diodes have that 600V's is specified
Blocking voltage.
Improved switching behaviour and the efficiency of raising are presented according to the boost PFC circuit of the present invention, without using costliness
1200V applications are covered in the case of silicon carbide technology.
Advantageously, the gate terminal of semiconductor boosted switch and emitter stage (or source electrode) terminal are in identical voltage electricity
It is flat.Therefore it may only be necessary to a gate drivers and power supply.
Furthermore, it is not necessary that dynamic symmetry, because only the half of D/C voltage is switched in commutation.
It will be apparent to those skilled in the art that according to the principle of the present invention, any specific half can be used
Conductor switchs.It is for instance possible to use IGBT, mos field effect transistor (MOSFET), GaN high electron mobilities
Rate transistor (HEMT) or any other suitable technology.In the case of using FET field effect technology, with switch reverse parallel connection
Diode can be replaced by body diode and/or synchronous rectification.
Advantageously, the first diode element is connected between the second diode element and reference potential node, and including
Ultrafast semiconductor diode with the recovery time less than about 100ns.
According to illustrative embodiments, the second diode element includes the low pressure drop with the forward voltage drop less than about 1V half
Conductor diode.
It is furthermore possible to also provide it is connected in series in first between first diode circuit and the reference potential node
Output capacitor.The capacitor may, for example, be the part of the power module including the pfc circuit according to the present invention.
In order to provide symmetric circuit framework, between the AC input node and the negative output node or described negative defeated
The second diode circuit is provided between the node of egress and connection first and second power transistor.It is negative defeated when being connected to
When between the node of egress and connection first and second power transistor, second diode circuit includes having not
Two diode elements with recovery time are connected in series.Only there is arrangement of the diode as the second diode circuit
The advantages of with one diode of few needs.
Furthermore, it is possible to the second output electricity is connected in series between second diode circuit and the reference potential node
Container.
By providing two diode members for being connected to the reference potential node and being connected the first diode circuit in addition
The first symmetrization diode between the node of part, the problem of can effectively suppressing current potential ring.If desired, it can also lead to
The symmetrization for providing and leakage current being carried out with the resistor of symmetrization diodes in parallel is provided.In addition, the second symmetrization diode can be with
It is connected between the node of two diode elements of the second diode circuit of the reference potential node and connection.
Can also be advantageously together with the inverter circuit with neutral point clamper (NPC) topology according to the design of the present invention
Use.Inverter circuit includes：For the first input end of the D/C voltage that is connected to the first polarity and for being connected to and institute
State the second input terminal of the D/C voltage of the first opposite polarity polarity and the input neutral point for being connected to reference potential
Terminal.
First output node is connected to the first end of the first decoupling inductor device, and the second output node is connected to the second decoupling electricity
The first end of sensor, and it is provided with the second end and that output connection is connected to the first decoupling inductor device for output
The AC voltages at the second end of two decoupling inductor devices.Is coupled between the first input end and first output node
Semiconductor switching device, wherein being coupled with the second semiconductor between second input terminal and second output node
Switching device, first and second semiconductor switching device each include at least two semiconductor switch being connected in series.
According to the present invention, the first diode circuit be connected to the first input end and first output node it
Between, the second diode circuit is connected between second input terminal and second output node, wherein first He
Second diode circuit each includes being connected in series for the first and second diode elements with different recovery times.
Advantageously, booster diode of first diode element as the half D/C voltage that must commutate, and inactive
At half-wave, the second diode element provides required blocking voltage.According to the present invention, second diode element is without fast
The low pressure drop commutation diode of quick-recovery function.Especially, first and second diode element is specified first input end
The maximum blocking voltage of the half of the maximum D/C voltage occurred between son and the second input terminal.
Branch output topology improves the switching characteristic of NPC inverter, is especially that of avoiding cross-conduction (cross-
conduction).Provided according to the circuit of the present invention using the pressure drop of the reduction of the second commutation diode under boost mode
Raising efficiency.
In addition, according to the Advantageous embodiments of the present invention, optional clamp diode can be provided, is being inputted for improving
The symmetrization during change in polarity of voltage and during passive blocking mode.Especially, inverter circuit can also include being connected to
The first couple between the input neutral terminal and the node for the described two diode elements for connecting the first diode circuit
Titleization diode.Second symmetrization diode can be connected to the input neutral terminal with being connected the second diode circuit
Between the node of described two diode elements.
It is at least one by two symmetrical fast recovery diodes in diode element according to another advantageous embodiment
Be connected in series to form.For D/C voltage be high voltage for example higher than 1200V in the case of, the present invention is divided into two and is connected in series
Diode may be still inadequate so that need the pole of slow silicon two with sufficiently high blocking voltage (such as 1200V)
The SiC Schottky-barrier diodes of pipe or costliness.By the way that especially booster diode and neutral clamp diode are formed as
Being connected in series for two symmetrical fast recovery diodes, can overcome the problem and need only to have relatively low blocking voltage (example
Such as 600V) diode.
The invention further relates to a kind of inverter circuit with mixed-voltage neutral point clamper (NPC) topology.The inverter
Circuit includes：For the first input end for the D/C voltage for being connected to the first polarity；For being connected to and the first polarity phase
Second input terminal of the D/C voltage of anti-polarity；And for being connected to the input neutral terminal of reference potential.
First output node is connected to the first end of the first decoupling inductor device, and the second output node is connected to the second decoupling electricity
The first end of sensor, and it is provided with the second end and that output connection is connected to the first decoupling inductor device for output
The AC voltages at the second end of two decoupling inductor devices.Is coupled between the first input end and first output node
Semiconductor switching device, wherein being coupled with the second semiconductor between second input terminal and second output node
Switching device, first and second semiconductor switching device each include at least two semiconductor switch being connected in series.The
One diode circuit is connected between the first input end and first output node, and the second diode circuit is connected to
Between second input terminal and the second output section, wherein first and second diode circuit each includes having
The first and second diode elements of different recovery times are connected in series.As can be seen that the advantages of this design, is, especially
It is to switch for reactive power, it is not necessary to which there is the diode of high blocking voltage.It is thereby achieved that being manufactured into reduction
This faster switching.
According to another advantageous embodiment, there is provided a kind of booster circuit being used in power module.
Booster circuit includes the first DC input terminals that the D/C voltage of the first polarity is connected to via inductor；For connecting
To the 2nd DC input terminals with the D/C voltage of the described first opposite polarity polarity；And first lead-out terminal, the second output
Terminal and output neutral point.The first semiconductor is coupled between the described first or second input terminal and the input neutral point
Switching device, wherein be coupled with the first output capacitor between first lead-out terminal and output neutral point, and wherein the
The second output capacitor is coupled between two lead-out terminals and output neutral point.Described second or first input end with it is described
Diode circuit is coupled between input neutral point, wherein the diode circuit includes the first He with different recovery times
Second diode element is connected in series, and wherein in the neutral output terminal point with being connected the described two of diode circuit
The 3rd diode element is connected between the node of diode element.
Had the advantage that using the tool that is connected in series of the first and second diode elements with different recovery times：It is each
Diode must the specified half for having the blocking voltage needed for conventional boost circuit.
Finally, basic conception of the invention can also be now based in the three-phase inverter structure of half-bridge structure in fact.According to
The present invention, three-phase inverter circuitry include：For the first DC input terminals of the D/C voltage for being connected to the first polarity；For connecting
To the 2nd DC input terminals with the D/C voltage of the described first opposite polarity polarity；And it is connected in described first and in parallel
First, second, and third half-bridge between two input terminals, each half-bridge include being connected in series for two semiconductor switch；The
First, second and the 3rd lead-out terminal, the first lead-out terminal be connected to the described two semiconductors for connecting first half-bridge
The node of switch, second lead-out terminal be connected to the nodes of the described two semiconductor switch for connecting second half-bridge with
And the 3rd lead-out terminal is connected to the node for the described two semiconductor switch for connecting the 3rd half-bridge.According to this hair
Bright, the first to the 6th of the first and second diode elements are connected in series across on each semiconductor switch, diode
The maximum of each specified half for having a maximum voltage occurred between first input end and the second input terminal in element
Blocking voltage.
, can be without using with the expensive pole of SiC Schottky barriers two in full for determining blocking voltage using this arrangement
High switch performance is realized in the case of pipe.
In order to provide symmetrization in addition, inverter circuit can include：The series circuit of two capacitors, two of which electricity
Node between container forms input neutral point, wherein the first capacitor is parallel-connected to first resistor device, and the second electric capacity
Device is parallel-connected to second resistance device；And first to the 6th symmetrization diode, each of which are connected to the input neutral point
Between the node for two diode elements being connected in series in.In this embodiment, it is connected to the first or second input
Each diode element of terminal had than corresponding second diode element faster recovery time.During restoration, the 2nd 2
Pole pipe element receives full voltage, until reaching the difference between output voltage and neutral voltage between the capacitors.Horizontal symmetrical
Change diode and reverse recovery current is provided, and by the first diode clamp to neutral voltage.It is thereby achieved that symmetrization.
Brief description of the drawings
Accompanying drawing is integrated into this specification and forms part for specification, with some embodiment party of the explanation present invention
Formula.These accompanying drawings are used for the principle for explaining the present invention together with specification.Accompanying drawing is merely for the sake of illustrating how to realize and use
The purpose preferably with alternative exemplary of the present invention, without that should be construed as limiting the invention to the reality for only showing and describing
Apply mode.In addition, some aspects of embodiment can form the solution according to the present invention individually or with different combinations
Scheme.Therefore, embodiments described below can individually be considered or is combined with it to consider.According to below to this hair
The more specifically description of bright various embodiments, feature and advantage in addition will become obvious, as shown in drawings, attached
Identical reference represents identical element in figure, and wherein：
Fig. 1 is the circuit diagram of conventional neutral boost PFC circuit；
Fig. 2 is the circuit diagram according to the neutral boost PFC circuit of the present invention；
Fig. 3 is the circuit diagram according to another neutral boost PFC circuit of the present invention；
Fig. 4 is the circuit diagram according to another neutral boost PFC circuit of the present invention；
Fig. 5 is the circuit diagram of conventional NPC inverter；
Fig. 6 is the circuit diagram according to the NPC inverter with branch output of the present invention；
Fig. 7 is the circuit diagram according to another NPC inverter with branch output of the present invention；
Fig. 8 is the circuit diagram of conventional mixed-voltage NPC inverter；
Fig. 9 is the circuit diagram of another conventional mixed-voltage NPC inverter；
Figure 10 is the circuit diagram of another conventional mixed-voltage NPC inverter；
Figure 11 is the circuit diagram according to the mixed-voltage NPC inverter of the present invention；
Figure 12 is the circuit diagram according to the mixed-voltage NPC inverter of another embodiment of the present invention；
Figure 13 is the circuit diagram of conventional booster circuit；
Figure 14 is the circuit diagram according to the booster circuit of the present invention；
Figure 15 is the circuit diagram of conventional three-phase inverter；
Figure 16 is the circuit diagram according to the three-phase inverter of the present invention；
Figure 17 is the circuit diagram according to another three-phase inverter of the present invention.
Embodiment
The present invention is explained in greater detail now with reference to accompanying drawing.Reference picture 1, will with reference first to conventional neutral boost power because
Number correction (PFC) circuit, to more fully understand the general principle of the present invention.The first input node of neutral boost PFC circuit
102 are connected to AC power AC via inductor L.The first transistor T1 and second transistor T2 is connected in series in the first input section
Put 102 and be connected between the second input node 104 of reference potential such as.In the embodiment as shown, transistor T1
Include igbt (IGBT) with T2.Therefore, each in transistor T1, T2 is anti-with diode D5 and D6 respectively
To being connected in parallel.It will be evident to one skilled in the art, however, that can also use other semiconductor switch rather than
IGBT, such as field-effect transistor FET, such as mos field effect transistor MOSFET, bipolar junction transistor
Pipe BJT, GaN base transistor and gate turn-off thyristor GTO.When using MOSFET, diode D5 and D6 can be by crystalline substances
The body diode of body pipe replaces.On the other hand, for GaN base transistor, it can be advantageous to made using the synchronous rectification of switch
Make diode.
IGBT T1, the connection of T2 differential concatenations, the i.e. emitter stage of IGBT T1 are connected to IGBT T2 emitter stage.In the knot
In structure, two IGBT T1, T2 gate terminal are connected to public grid driver so that only need a gate drivers and
One power supply.First and second output capacitor C1, C2 are provided to be used in the first and second output nodes 112,114 and ground potential
Positive D/C voltage and negative D/C voltage are exported between 104.It is defeated that first diode D10 and the second diode D14 is arranged in the first AC
Between the output node 112,114 of ingress 102 and first and second.
However, as described above, it is necessary to full maximum of the blocking voltage as diode D10 and D14 in the known circuit
Determine blocking voltage, such as 1200V.When the silicon diode of high rating electrical as use, switching frequency becomes slowly (generally must very much
The switching frequency more than 4kHz must be reached).Alternatively, expensive carborundum (SiC) Schottky-barrier diode can be used.
Current potential ring when the problem of relevant with the pfc circuit shown in Fig. 1 is an emergency off.After IGBT T1, T2 shut-off, reversely
Restoring current will charge to inductor L in opposite direction, and the voltage at the first AC input node 102 be changed into opposite
D/C voltage.
In order to overcome these problems, the present invention proposes to replace each diode by using two being connected in series for diode
D10 and D14 changes Fig. 1 circuit.The circuit is as shown in Figure 2.According to the present invention, substitution diode D10 is specified full blocking
Voltage, between the first AC input node 102 and the first output node 112 provide with half blocking voltage diode D1 and
D2's is connected in series.In addition, specified Fig. 1 for having a full blocking voltage (such as 1200V) diode D14 specified has blocking by each
Being connected in series for diode D3 and D4 of the half (such as 600V) of voltage is replaced.Near the two of output node 112,114
Pole pipe D1 and D4 include Ultrafast recovery diode, and diode D2 and D3 and D5 and D6 is by so-called low pressure drop diode shape
Into, that is, have be optimized to reduce quiescent dissipation low forward voltage drop diode.Introduce series connection has half blocking voltage simultaneously
And with different resume speeds two diodes (otherwise referred to as " cascading " below) reduce QRR and
Loss during diode and the switching of corresponding switch element.Generally, compared with 1200V technologies, can be used in 600V technologies fast
Element much.This will cause the further reduction of switching loss.
Using the problem of cascade circuit be the diode during commutation voltage is shared and dynamic symmetry.Because two
A Reverse recovery in diode is very fast, so the diode will have to block full backward voltage.According to the present invention, avoid
Full blocking voltage during commutation so that only need full blocking voltage under static schema after commutation.
According to the present invention, symmetrization is provided by the function of specific application environment or must be by using other clamper electricity
Road provides symmetrization.In fig. 2, other clamp circuit shown by dashed lines.Especially, two poles of symmetrization two can be provided
Pipe D7 and D8.First symmetrization diode D7 is arranged in the diode element D1 of reference potential node 104 and first and the two or two pole
Between node 108 between tube elements D2.Second symmetrization diode D8 is connected to reference potential node 104 and diode element
Between node 110 between D4 and D3.
By providing these optional symmetrization diode D7, D8, it can effectively suppress current potential ring.In addition, pass through
The reverse leakage characteristic of the diode used or by providing the resistor in parallel with symmetrization diode D7, D8 (in figure not
Show) come it is preferred to ensure that blocking the symmetrization of operation.
, can be using only two of the inexpensive benefit with relatively low blocking voltage using the circuit arrangement according to the present invention
Pole pipe rather than with higher blocking voltage expensive SiC diodes while improve boost PFC circuit switching characteristic.
In the framework, two IGBT T1, T2 gate terminal are connected to public grid driver so that only need a raster data model
Device and a power supply.
Fig. 3 shows the improved neutral boost PFC circuit arrangement according to the present invention.With the embodiment phase shown in Fig. 2
Instead, Fig. 3 circuit arrangement provides cascade diode circuit only between the first AC input node 102 and the first output node 112.
Second output node 114 is connected to IGBT T1 and T2 two emitter terminals via single diode D4 at node 106.
The arrangement has the advantages of needing less diode to realize circuit.From this figure, it can be seen that transistor T1, T2 are by public grid
Driver 107 controls.Gate drivers 107 receive pulse width modulation (PWM) control signal in its input.
Fig. 4 shows the modification of the improvement circuit shown in Fig. 3.According to this, embodiment there is provided other temperature biography
Sensor 116.The circuit arrangement shown in Fig. 4 can be assembled into the modular unit individually accommodated.Shown in dotted line, module can be as
It is described above to be optionally provided with integrated output capacitor C1, C2 and symmetrization diode D7.
The design of the present invention, i.e., be divided into multiple diodes, it can be advantageous to neutral point clamper (NPC) by diode structure
Inverter structure is used together.Fig. 5 shows conventional NPC inverter module, and it can for example be used for from DC input voltages for example
Sine output voltage is produced from photovoltaic module.NPC inverter be included in two IGBT T51, T52 in the first branch and
Two IGBT T53, T54 in second branch.Each transistor is provided with diode (reference D51, D52, D53, D54).
First branch is connected to the first DC input terminals 118 of the D/C voltage that can be connected to positive polarity.Second branch is connected to can be with
It is connected to the 2nd DC input terminals 120 of the D/C voltage of negative polarity.Lead-out terminal 122 can for example be connected to inductor (in figure
It is not shown).Input neutral point NP can be connected to the ground.
In operation, transistor T52 is turned on during the positive half-wave of output signal.Transistor T53 is led during negative half-wave
It is logical.PWM is modulated by transistor T51 and T54.When transistor T51 is turned off during positive half-wave, electric current will pass through from neutral point NP
Diode D55 commutates to output 122.Negative path is in completely inactive.In negative half-wave, negative current passes through two from neutral point NP
Pole pipe D56 commutates, and wherein transistor T51 and T52 is in inactive.
Generally, NPC topologys have the advantages of switching loss reduced, because only needing to switch the half of D/C voltage；This
Halve the switching loss in transistor.In addition, NPC topologys have ripple relatively low in output current and output voltage transition
Half.Which reduce the effort for filtering and isolating in filter inductor.Finally, in NPC frameworks, D/C voltage is divided into positive electricity
Pressure and negative voltage, it supports DC capacitors to be connected in series, the problem of without leakage compensation.
These advantages are kept by the improved topology according to the present invention shown in Fig. 6.Additionally, it is provided there is branch output
OUT1, OUT2, it improves switching characteristic by avoiding cross-conduction.According to the present invention, in each input terminal and output end
The cascade circuit of two diodes with different recovery times is provided between one in son.Specifically, diode D61 and
D62 is connected between the first DC input terminals 118 and the second lead-out terminal OUT2.It is defeated that diode D63 and D64 are connected to the 2nd DC
Enter between terminal 120 and first lead-out terminal OUT1.Diode D61 and D64 works as booster diode, and must be in phase
Answer commutation half D/C voltage at inactive half-wave.Internal vertical diode D62 and D63 provide required blocking voltage.According to this
Invention, internal body diodes D62 and D63 are formed by the low pressure drop commutation diode without fast quick-recovery function.Utilize the reduction
Pressure drop, the efficiency of raising can be realized under boost mode.
It is alternatively possible to other clamp diode D65, D66 are provided as shown in phantom in Figure 6.These clamp diodes
D65, D66 improve the symmetrization during passive blocking mode.
It is furthermore possible to also provide temperature sensor 116 is used for the temperature for monitoring power model.
Fig. 7 shows the further refinement of the NPC circuits according to the present invention.According to the embodiment, shown in Fig. 6
Some in diode are replaced by two other being connected in series for diode.Preferably, booster diode D61, D64 and in
Clamp diode D67, D68 is by two symmetrical fast recovery diode D61-a, D61-b, D64-a, D64-b, D67-a, D67- for property
B, D68-a, D68-b are connected in series to form.
In addition to the advantages of circuit shown in Fig. 6, the solution has and need not use slow Si diodes or high
The advantages of D/C voltage (being more than such as 1200V) of even more high can be handled in the case of expensive SiC diodes.
Fig. 8 to Figure 10 shows conventional mixed-voltage NPC inverter.The advantages of this is topological is only to occur one when exciting
Individual forward voltage drop.However, for these known circuits, need that there is the quick of double blocking voltage for reactive power switching
Booster diode.For example, it is desired to the diode that diode rather than 600V specified 1200V is specified.Because diode must
Full voltage must be blocked during inactive half-wave, although they only need the half voltage that commutates.
In order to overcome the problem, the present invention provides a kind of mixed-voltage with advanced booster circuit as shown in figure 11
NPC circuits.According to the present invention, there is provided diode D111 and D114 be connected in series and diode D112 and D113 series connection connect
Connect, IGBT T113 and T114 be connected to between the node for being connected these diodes.Using the circuit according to Figure 11, due to
Decompression and booster diode function are partly merged, so improving the utilization rate of whole semiconductor switch.
Advantageously, the topology only needs the specified diodes of 600V, but can (this is specific certainly in up to 1000V
What value was merely exemplary) the configuration of three level lower run.
It can be seen from fig. 11 that in reduced pressure operation, diode D111 is used as the fly-wheel diode for IGBT T111
(FWD) and diode D112 is used as the FWD for IGBT T112, and in boost operations, diode D113 be used as
IGBT T113 FWD and diode D114 is used as the FWD for IGBT T114.
In the embodiment shown in Figure 11, using only IGBT as semiconductor switch.However, in order to improve switching frequency
With the ability of processing reactive power, SiC MOSFET and superjunction (SJ) MOSFET can also be used.Figure 12 shows corresponding improvement
Mixed-voltage NPC inverter circuit.
Especially, forming the transistor T111 and T112 of step-down switching includes SiC MOSFET.Form the crystalline substance of boosted switch
Body pipe T113 and T114 include SJ MOSFET.As is it well known, by using SJ MOSFET, switching speed sharply increases.
Compared with standard MOSFET, low parasitic capacitance of the behavior from SJ MOSFET.SJ MOSFET have input and output capacitance
What is be worth is only about half of, and this is that switching loss and drive loss bring benefit.Therefore, can be achieved in 200kHz work
98% efficiency, including wave filter.In addition, the inductor with low-down inductance can be used at output.Such as Figure 12 institutes
The circuit shown has 100% ability of processing reactive power, and can also provide low voltage crossing (LVRT) and failure is worn
More (FRT).The moderate cost, because only needing two expensive SiC MOSFET.
Illustrate another favourable application of the design according to the present invention now with reference to Figure 13 and Figure 14.Figure 13 depicts routine
Booster circuit, it includes：Semiconductor switch T131, Zener diode DZ and output capacitor C.The advantages of booster circuit master
Can only occur finding out in the fact that a pressure drop in afterflow and excitation.However, the shortcomings that circuit is that it is necessary to have complete
The Zener diode of specified blocking voltage (such as 1200V).Therefore, the height for that must be handled in being applied in solar electric power
Frequency is, it is necessary to the 1200V Schottky-barrier diodes of costliness.
It can be come by using the booster circuit with diode cascade and optional symmetrization diode as shown in figure 14
Overcome the problem.According to the embodiment, being connected in series for diode D142 and D143 is connected the first DC input terminals 118
(it is connected to D/C voltage via inductor L) is between DC+ lead-out terminals 112.Symmetrization diode D144 is connected to connection two
Between pole pipe D142 and D143 node 119 and output neutral point (NP) node 104.
IGBT T141 are arranged between the 2nd DC input nodes 120 and the first DC input nodes 118.According to the present invention, two
Pole pipe D142 has recovery time more faster than diode D143.Therefore, during restoration, diode D142 receives full voltage,
Until reaching the difference between output voltage and neutral voltage between electric capacity C1 and C2.Symmetrization diode 144 is aided in (by void
Line is expressed as optionally) provide reverse recovery current and by diode D143 clampers to neutral voltage.
Advantageously, the circuit arrangement shown in Figure 14 only need it is specified have maximum there is the blocking voltage of the half of D/C voltage
Diode.Three level frameworks are compatible with most of existing topologys.
In fig. 14, being connected in series for diode D142 and D143 is disposed in positive path.However, for this area skill
It is evident that alternatively, diode can also be arranged in negative path, and IGBT T141 will be disposed in for art personnel
In positive path.
It is also possible to it is advantageously applied for three-phase inverter as shown in figure 15.The custom circuit is based on three
Individual half-bridge, and the output that three AC phases are provided is inputted from DC.With the known arrangement on the contrary, the present invention, which proposes, passes through apparatus
There is being connected in series to replace each bridging in the semiconductor switch with half-bridge for two diodes of only half blocking voltage
Diode.Figure 16 shows the circuit arrangement according to the present invention.These diodes being connected in series can be quick by identical
Recovery diode is formed, and improves switching speed.Therefore, without using the expensive SiC Xiao Te with full blocking voltage
High switch performance can be realized in the case of base barrier diode.
It is alternatively possible to temperature sensor 116 is set.
Figure 17 shows another advantageous embodiment, wherein the diode with different resume speeds is used as level di- pole
Pipe.Three-phase inverter circuitry may be operative to booster.In each half-bridge branch, external diode has than internal body diodes
Faster recovery time.Therefore, during restoration, external diode receives full voltage, reaches until between electric capacity C3 and C4
Difference between output voltage and neutral voltage.Each branch also includes subsidiary level diode, and it provides reverse recovery current
And by internal body diodes clamper to neutral voltage.Advantageously, compared with Figure 16 arrangement, can solve the problems, such as symmetrization.
In a word, the present invention allows using the low-voltage diode for providing faster reverse recovery characteristic.It reduce switch to damage
Consume and improve the efficiency in HF switch application.Commercially, exist than the fast quick-recovery two with higher blocking voltage
The fast many fast recovery diodes with low voltage of pole pipe, in addition, with alternative such as twin voltage SiC diodes phase
Than cost is lower.
Circuit described above in detail may be used as the sub-circuit or standalone module of power module.In addition, the topology shown
It can be distributed on multiple modules or substrate, to provide low sensing commutation path.It is furthermore possible to also provide optional leakage current pair
Titleization circuit is simultaneously integrated into power module.
Claims (20)
1. one kind is used for PFC (PFC) booster circuit for being connected to exchange (AC) power supply, including：
For being connected to the AC input node (102) of AC power supplies；
For being connected to the reference potential node (104) of reference potential；
For exporting the positive output node (112) of positive D/C voltage and negative output node (114) for exporting negative D/C voltage；
At least the first and second power transistors (T1, T2), differential concatenation is connected to the AC input node relative to each other for it
Between the reference potential node, wherein, first power transistor (T1) is connected in antiparallel to the pole of the first power two
Manage (D5), second power transistor (T2) is connected in antiparallel to the second power diode (D6)；
Be connected between the AC input node (102) and the positive output node (112) the first diode circuit (D1,
D2)；
Wherein, first diode circuit (D1, D2) includes the first and second diode elements with different recovery times
Be connected in series.
2. PFC boost circuit according to claim 1, wherein, first diode element (D1) is connected to described
Between two diode elements (D2) and the positive output node (112), and including with the recovery time less than about 100ns
Ultrafast semiconductor diode.
3. PFC boost circuit according to claim 2, wherein, second diode element (D2) includes having and is less than
The low pressure drop semiconductor diode of about 1V forward voltage drop.
4. the PFC boost circuit described in one in preceding claims, wherein, first and second power diode
(D5, D6) is formed by the body diode of first and second power transistor (T1, T2), or first and second power
Diode (D5, D6) is formed by the diode separately manufactured with first and second power transistor (T1, T2).
5. the PFC boost circuit described in one in preceding claims, in addition to it is connected in series in the one or two pole
The first output capacitor (C1) between pipe circuit (D1, D2) and the reference potential node (104).
6. the PFC boost circuit described in one in preceding claims, wherein, the AC input node (102) with
The second diode circuit (D3, D4) is provided between the negative output node (114), wherein, second diode circuit
(D3, D4) includes being connected in series for two diode elements with different recovery times.
7. the PFC boost circuit described in one in claim 1 to 5, wherein, the negative output node (114) with
Connect and be provided with the second diode circuit (D4) between the node (106) of first and second power transistor (T1, T2).
8. the PFC boost circuit according to claim 6 or 7, in addition to it is connected in series in second diode circuit
The second output capacitor (C2) between (D3, D4) and the reference potential node (104).
9. the PFC boost circuit described in one in preceding claims, in addition to it is connected to the reference potential node
(104) first between the node (108) for the described two diode elements for being connected first diode circuit (D1, D2)
Symmetrization diode (D7).
10. according to the PFC boost circuit described in claim 7,8 and 9, in addition to it is connected to the reference potential node (104)
Second between the node (110) for the described two diode elements for being connected second diode circuit (D3, D4) is symmetrical
Change diode (D8).
11. the PFC boost circuit described in one in preceding claims, wherein, first and second power crystal
(T1, T2) is managed by public grid driver control.
12. one kind has the inverter circuit of neutral point clamper (NPC) topology, including：
For the first input end (DC+, 118) of the D/C voltage that is connected to the first polarity and for being connected to and first pole
The second input terminal (DC-, 120) of the D/C voltage of the opposite polarity of property；
For being connected to the input neutral terminal of reference potential；
It is connected to the first output node of the first end of the first decoupling inductor device, is connected to the first end of the second decoupling inductor device
Second output node and for export be connected to the second end of the first decoupling inductor device and second decoupling inductor
The output connection of the AC voltages at the second end of device；
Wherein, the first semiconductor switching device is coupled between the first input end and first output node, and
And wherein, the second semiconductor switching device is coupled between second input terminal and second output node, it is described
First and second semiconductor switching devices each include at least two semiconductor switch being connected in series；
The first diode circuit being connected between the first input end and first output node；
The second diode circuit being connected between second input terminal and second output node；
Wherein, first and second diode circuit each includes the first and second diodes member with different recovery times
Part is connected in series.
13. inverter circuit according to claim 12, wherein, first and second diode element is specified have it is described
The maximum of the half of the maximum voltage occurred between first input end (DC+) and second input terminal (DC-) blocks electricity
Pressure.
14. the inverter circuit according to claim 12 or 13, in addition to it is connected to the input neutral terminal (NP)
First between the node (108) for the described two diode elements for being connected first diode circuit (D1, D2) is symmetrical
Change diode (D7).
15. the inverter circuit described in one in claim 12 to 14, in addition to it is connected to the input neutral point
Between the node (108) of described two diode elements of the terminal (NP) with being connected second diode circuit (D1, D2)
Second symmetrization diode (D7).
16. the inverter circuit described in one in claim 12 to 15, wherein, in the diode element at least
One being connected in series to form by two symmetrical fast recovery diodes.
17. one kind has the inverter circuit of mixed-voltage neutral point clamper (NPC) topology, including：
For the first input end (DC+) of the D/C voltage that is connected to the first polarity and for being connected to and the first polarity phase
The second input terminal (DC-) of the D/C voltage of anti-polarity；
For being connected to the input neutral terminal of reference potential；
It is connected to the first output node of the first end of the first decoupling inductor device, is connected to the first end of the second decoupling inductor device
Second output node and for export be connected to the second end of the first decoupling inductor device and second decoupling inductor
The output connection of the AC voltages at the second end of device；
Wherein, the first semiconductor switching device is coupled between the first input end and first output node, and
And wherein, the second semiconductor switching device is coupled between second input terminal and second output node, it is described
First and second semiconductor switching devices each include at least two semiconductor switch being connected in series；
The first diode circuit being connected between the first input end and first output node；
The second diode circuit being connected between second input terminal and second output node；
Wherein, first and second diode circuit each includes the first and second diodes member with different recovery times
Part is connected in series.
18. a kind of booster circuit being used in power module, including：
For the first input end (118) of the D/C voltage that is connected to the first polarity and for being connected to and the first polarity phase
The second input terminal (120) of the D/C voltage of anti-polarity；
First lead-out terminal (112), the second lead-out terminal (114) and output neutral point (104)；
Wherein, the first semiconductor switching device (T141) is coupled between first and second input terminal (118,120),
Wherein, it is coupled with the first output capacitor between the first lead-out terminal (112) and the output neutral point (104)
(C1), and wherein, it is coupled with the second output between second lead-out terminal (114) and the output neutral point (104)
Capacitor (C2)；
Wherein, it is coupled with diode circuit between the first input end (118) and the first lead-out terminal (112)
(D142、D143)；
Wherein, the diode circuit includes the first and second diode elements (D142, D143) with different recovery times
Be connected in series, and wherein, in described two diodes of the output neutral point (104) with being connected the diode circuit
The 3rd diode element (D144) is connected between the node (119) of element (D142, D143).
19. a kind of three-phase inverter circuitry, including：
For the first input end (DC+) of the D/C voltage that is connected to the first polarity and for being connected to and the first polarity phase
The second input terminal (DC-) of the D/C voltage of anti-polarity；
First, second, and third half-bridge being connected in parallel between first and second input terminal, each half-bridge include two
Individual semiconductor switch is connected in series；
First, second, and third lead-out terminal, the first lead-out terminal are connected to the described two of connection first half-bridge
The node of semiconductor switch, second lead-out terminal are connected to described two semiconductor switch for connecting second half-bridge
Node and the 3rd lead-out terminal are connected to the node for the described two semiconductor switch for connecting the 3rd half-bridge；
Wherein, the first to the 6th of the first and second diode elements is connected in series across on each semiconductor switch,
In the diode element each it is specified have the first input end (DC+) and second input terminal (DC-) it
Between the maximum blocking voltage of the half of maximum voltage that occurs.
20. three-phase inverter circuitry according to claim 19, in addition to：
The series circuit of two capacitors, wherein, the node between described two capacitors forms input neutral point, wherein, institute
To state the first capacitor and be parallel-connected to first resistor device, second capacitor is parallel-connected to second resistance device, and
First to the 6th symmetrization diode, each of which are connected to the input neutral point and are connected in series described in being connected described
Between the node of two diode elements.
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| DE102016211403.4A DE102016211403B4 (en) | 2016-06-24 | 2016-06-24 | HIGH-SET CIRCUITS AND INVERTER TOPOLOGIES WITH TANDEM DIODE CIRCUIT |
| DE102016211403.4 | 2016-06-24 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109378987A (en) * | 2018-12-30 | 2019-02-22 | 上能电气股份有限公司 | A kind of three-level topology circuit, single-phase inverter and three-phase inverter |
| US11165422B2 (en) | 2020-04-01 | 2021-11-02 | Delta Electronics, Inc. | Gate driver circuit with reduced power semiconductor conduction loss |
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| WO2001047094A3 (en) * | 1999-12-22 | 2001-12-13 | E E S Sist S De En Ltda | Method and control circuitry for a three-phase three-level boost-type rectifier |
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| US8582331B2 (en) * | 2009-07-20 | 2013-11-12 | Vincotech Holdings S.à.r.l. | Inverter topologies usable with reactive power |
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| JP4594477B2 (en) * | 2000-02-29 | 2010-12-08 | 三菱電機株式会社 | Power semiconductor module |
| US6740902B2 (en) * | 2002-09-04 | 2004-05-25 | International Rectifier Corporation | Semiconductor package for series-connected diodes |
| JP4980126B2 (en) * | 2007-04-20 | 2012-07-18 | 株式会社日立製作所 | Circuit device having freewheeling diode |
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|---|---|---|---|---|
| WO2001047094A3 (en) * | 1999-12-22 | 2001-12-13 | E E S Sist S De En Ltda | Method and control circuitry for a three-phase three-level boost-type rectifier |
| CN101853847A (en) * | 2009-03-31 | 2010-10-06 | 富士电机系统株式会社 | The electric power transducer of combined semiconductor rectifying device and this combined semiconductor rectifying device of use |
| US8582331B2 (en) * | 2009-07-20 | 2013-11-12 | Vincotech Holdings S.à.r.l. | Inverter topologies usable with reactive power |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109378987A (en) * | 2018-12-30 | 2019-02-22 | 上能电气股份有限公司 | A kind of three-level topology circuit, single-phase inverter and three-phase inverter |
| US11165422B2 (en) | 2020-04-01 | 2021-11-02 | Delta Electronics, Inc. | Gate driver circuit with reduced power semiconductor conduction loss |
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| Publication number | Publication date |
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| DE102016211403B4 (en) | 2018-03-29 |
| CN107546974B (en) | 2020-06-05 |
| DE102016211403A1 (en) | 2017-12-28 |
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