CN203562425U - Power module - Google Patents
Power module Download PDFInfo
- Publication number
- CN203562425U CN203562425U CN201320692494.5U CN201320692494U CN203562425U CN 203562425 U CN203562425 U CN 203562425U CN 201320692494 U CN201320692494 U CN 201320692494U CN 203562425 U CN203562425 U CN 203562425U
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- Prior art keywords
- brachium pontis
- insulated substrate
- power
- electrode
- current conduction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Abstract
The utility model discloses a power module. The power module comprises a base plate, a first electrode, a second electrode, an output electrode, an upper leg insulation substrate, an upper leg insulation substrate control conductive layer, an upper leg insulation substrate passing current conductive layer, a lower leg insulation substrate, a lower leg insulation substrate control conductive layer, two lower leg insulation substrate passing current conductive layers, multiple parallel upper leg power chip units, and multiple parallel lower leg power chip units. Compared with the prior art, the power module is effectively reduced in switch loss and improved in reliability.
Description
Technical field
The utility model relates to field of power electronics, is specifically related to a kind of power model
Background technology
Power model is that power electronic electrical device is as metal-oxide semiconductor (MOS) (power MOS pipe), insulated-gate type field effect transistor (IGBT), the power switch module that fast recovery diode (FRD) is combined and packaged into by certain function, it is mainly used in electric automobile, wind power generation, the power transfer under the various occasions such as industrial frequency conversion.
The motor-drive circuit of electric automobile generally includes three groups of power models respectively with upper and lower bridge arm, Fig. 1 is the circuit diagram of existing a kind of power model, shown in it is one group of circuit diagram with the power model of upper and lower bridge arm, it comprises: as the insulated-gate type field effect transistor Z1 of upper brachium pontis, and with the fast recovery diode D1 of its reverse parallel connection, insulated-gate type field effect transistor Z2 as lower brachium pontis, and with the fast recovery diode D2 of its reverse parallel connection, wherein the collector electrode of insulated-gate type field effect transistor Z1 connects the anodal p+ of power model, its emitter connects the collector electrode of edge grid type field-effect transistor Z2, the emitter of edge grid type field-effect transistor Z2 connects the negative pole p-of power model, the emitter of insulated-gate type field effect transistor Z1 and the collector electrode of Z2 are connected the lead-out terminal of power model jointly.In actual applications, conventionally with three groups of these power models, provide three-phase alternating current for motor; At this, only with the circuit diagram of one group of power model, its operation principle is described: when insulated-gate type field effect transistor Z1 connects, electric current successively through the anodal p+ of power model, the collector electrode of insulated-gate type field effect transistor Z1, emitter, power model lead-out terminal OUTPUT export motor to; When insulated-gate type field effect transistor Z1 turn-offs, because motor is inductive load, for guaranteeing that current direction is constant, freewheel current need export motor to through negative pole p-, diode D2, the power model lead-out terminal OUTPUT of this power model through the power model of other group.
Under the application of some smaller power, electronic device in power model also can adopt power MOS pipe, Fig. 2 is the circuit diagram of another kind of power MOS pipe module, it comprises: as the power MOS pipe M1 of upper brachium pontis, power MOS pipe M2 as lower brachium pontis, wherein the drain electrode of power MOS pipe M1 connects the anodal p+ of power model, the source electrode of power MOS pipe M1 connects the drain electrode of power MOS pipe M2, the source electrode of power MOS pipe M2 connects the negative pole p-of power model, the drain electrode of the source electrode of power MOS pipe M1 and power MOS pipe M2 is connected the lead-out terminal that connects power model jointly, the module class of its operation principle and employing insulated-gate type field effect transistor seemingly, its difference between the two is mainly the built-in backward diode of power MOS pipe, therefore do not need backward diode in parallel.In addition, against leading type IGBT, have identical 26S Proteasome Structure and Function with MOS, due to diode-built-in, do not need reverse parallel connection diode, modular design and structure are similar to MOS, do not repeat them here.
In actual applications, for the conveyance capacity of increasing power module, its upper and lower bridge arm adopts the form of a plurality of electrical device parallel connections conventionally, and Fig. 3 is the structure chart of existing a kind of power model; It comprises base plate 1, upper brachium pontis insulated substrate 2 and lower brachium pontis insulated substrate 3, upper brachium pontis chipset 4, lower brachium pontis chipset 5, positive electrode 6, negative electrode 7, output electrode 8, wherein insulated substrate 2 and 3 upper surfaces are equipped with conductive layer, wherein go up brachium pontis chipset 4 and comprise four power MOS pipes, all be arranged on the conductive layer of brachium pontis insulated substrate 2, and the drain electrode of four power MOS pipes of upper brachium pontis is connected with conductive layer respectively, conductive layer is connected with positive electrode 6 by conduction nation line, and source electrode is connected with output electrode 8 by conduction nation line respectively; Lower brachium pontis chipset 5 also comprises four power MOS pipes, all be arranged on the conductive layer of lower brachium pontis insulated substrate, and the drain electrode of four power MOS pipes of lower brachium pontis is connected with the conductive layer of lower brachium pontis insulated substrate respectively, source electrode is connected with negative electrode 7 by conduction nation line respectively, and the conductive layer of lower brachium pontis insulated substrate connects respectively the source electrode of four power MOS pipes of upper brachium pontis by conduction nation line.During work: the power MOS pipe grid of upper brachium pontis is accepted control signal and connected, electric current I 1 from positive pole through positive electrode 6, drain electrode, source electrode and the conduction nation line of brachium pontis insulated substrate by current conduction layer, upper brachium pontis power MOS pipe transfer to output electrode 8; During afterflow, electric current I 2 through the positive pole of power MOS tube parallel diode of negative electrode 7, conduction nation line, lower brachium pontis, the negative pole of the power MOS tube parallel diode of lower brachium pontis, lower brachium pontis insulated substrate transfer to output electrode 8 by source electrode, the conduction nation line of current conduction layer, conduction nation line, upper brachium pontis power MOS pipe.This scheme has a few block semiconductor switch in parallel, and the switching loss of module is large, and reliability is low.
Utility model content
The utility model is for solving problems of the prior art, a kind of power model is provided, comprises: base plate, the first electrode, the second electrode, output electrode, upper brachium pontis insulated substrate, upper brachium pontis insulated substrate are controlled conductive layer, upper brachium pontis insulated substrate is controlled conductive layer, two lower brachium pontis insulated substrates by the lower brachium pontis power chip group of current conduction layer, the upper brachium pontis power chip group of a plurality of parallel connections, a plurality of parallel connections by current conduction layer, lower brachium pontis insulated substrate, lower brachium pontis insulated substrate, wherein, described output electrode is arranged at the first end on base plate, the first electrode is arranged at the second end relative with output electrode on base plate with the second electrode, upper brachium pontis insulated substrate is located on base plate, upper brachium pontis insulated substrate is controlled conductive layer, upper brachium pontis insulated substrate is located on upper brachium pontis insulated substrate by current conduction layer, and the upper brachium pontis power chip of a plurality of parallel connections is mounted on brachium pontis insulated substrate by current conduction layer, lower brachium pontis insulated substrate is located on base plate, lower brachium pontis insulated substrate is controlled conductive layer, two lower brachium pontis insulated substrates are located on lower brachium pontis insulated substrate by current conduction layer, and the lower brachium pontis power chip component of a plurality of parallel connections is opened in two lower brachium pontis insulated substrates by current conduction layer, described upper brachium pontis power chip group comprises the first power switch and the first diode, the input of described the first power switch is connected by current conduction layer with upper brachium pontis insulated substrate, upper brachium pontis insulated substrate is connected with the first electrode by current conduction layer, the output of described the first power switch is connected with output electrode, the control end of described the first power switch is controlled conductive layer with upper brachium pontis insulated substrate and is connected, the positive pole of the first diode is connected with the output of the first power switch, and the negative pole of the first diode is connected by current conduction layer with upper brachium pontis insulated substrate, described lower brachium pontis chipset comprises the second power switch and the second diode, the input of the second power switch is connected by current conduction layer with the lower brachium pontis insulated substrate at its place, the output of the second power switch is connected with the second electrode, the control end of the second power switch is controlled conductive layer with lower brachium pontis insulated substrate and is connected, described two lower brachium pontis insulated substrates connect respectively the output of the first power switch corresponding thereto by current conduction layer, the positive pole of the second diode is connected with the output of the second power switch, the negative pole of the second diode is connected by current conduction layer with the lower brachium pontis insulated substrate at its place.
Further, the first electrode comprises from upwardly extending the first lead division in base plate top, and the first connecting portion extending to output electrode direction near one end of base plate from the first lead division; The second electrode comprises from upwardly extending the second lead division in base plate top, and the second connecting portion extending to output electrode direction near one end of base plate from the second lead division; Wherein, the first lead division and the second lead division are being parallel to stacked setting in the direction of base plate, the stacked setting in the direction perpendicular to base plate of the first connecting portion and the second connecting portion.
Further, described upper brachium pontis insulated substrate comprises is located at two lower brachium pontis insulated substrates by the extension insulated substrate between current conduction layer, described upper brachium pontis insulated substrate is comprised and is located at two lower brachium pontis insulated substrates by the extension insulated substrate conductive layer between current conduction layer by current conduction layer, extend insulated substrate conductive layer and be located on extension insulated substrate, extend insulated substrate conductive layer and be connected with the first electrode.
Further, described the first power switch is power MOS pipe, and the first diode and power MOS pipe are integrated in same chip; Described the second power switch is power MOS pipe, and the second diode and power MOS pipe are integrated in same chip.
Further, described the first power switch is IGBT, and the first diode and IGBT are integrated in same chip; Described the second power switch is IGBT, and the second diode and power IGBT are integrated in same chip.
Further, described upper brachium pontis insulated substrate and described lower brachium pontis insulated substrate be common forms an integral insulation substrate, this integral insulation substrate comprises the first side that is parallel to each other and second side, be located at base plate near the 3rd vertical side of the Qie Yu first side, one end of output electrode, be located at base plate near one end of the first electrode and four side, first hypotenuse, second hypotenuse, three hypotenuse, four hypotenuse parallel with the 3rd side; The first hypotenuse and the 4th hypotenuse are oppositely arranged, and the second hypotenuse and the 3rd hypotenuse are oppositely arranged; One end of first side is connected with the 3rd side by the first hypotenuse, and the first hypotenuse is obtuse angle with the angle of first side and the 3rd side respectively, one end of second side is connected with the 3rd side by the second hypotenuse, and the second hypotenuse is obtuse angle with the angle of second side and the 3rd side respectively; The other end of first side is connected with four side by the 3rd hypotenuse, and the 3rd hypotenuse is obtuse angle with the angle of first side and four side respectively, the other end of second side is connected with four side by the 4th hypotenuse, and the 4th hypotenuse is obtuse angle with the angle of first side and four side respectively; This integral insulation substrate is provided with metal level near the surface of base plate, and the shape of described metal level is identical with described integral insulation substrate, and the marginal point of described metal level is all equal to the beeline of described integral insulation substrate edges.
Further, described upper brachium pontis insulated substrate comprises with output electrode and pointed to the crossing first side of the direction of the first electrode by current conduction layer, and this side has the first kink; Described lower brachium pontis insulated substrate comprises with output electrode and pointed to the crossing second side of the direction of the first electrode by current conduction layer, and this side has the second kink.
Further, the first power switch and the first diode are a plurality of, described upper brachium pontis insulated substrate is controlled conductive layer and is provided with the resistance identical with the first power switch pipe number, and a plurality of the first power switchs are controlled conductive layer by resistance and upper brachium pontis insulated substrate and are connected.
Further, described lower brachium pontis insulated substrate is controlled conductive layer and is provided with the resistance identical with the second power switch pipe number, and the second power switch is controlled conductive layer by resistance and upper brachium pontis insulated substrate and is connected.
Further, described two lower brachium pontis insulated substrates are by also comprising between current conduction layer in order to two lower brachium pontis insulated substrates described in balance by the balance conductive layer of current conduction layer current potential.
A kind of power model that the utility model provides, comprising: base plate, the first electrode, the second electrode, output electrode, upper brachium pontis insulated substrate, upper brachium pontis insulated substrate are controlled conductive layer, upper brachium pontis insulated substrate is controlled conductive layer, two lower brachium pontis insulated substrates by the lower brachium pontis power chip group of current conduction layer, the upper brachium pontis power chip group of a plurality of parallel connections, a plurality of parallel connections by current conduction layer, lower brachium pontis insulated substrate, lower brachium pontis insulated substrate; The lower brachium pontis power chip component of a plurality of parallel connections is opened in two lower brachium pontis insulated substrates by current conduction layer.Compared with prior art can effectively reduce the switching loss of power model, improve its reliability.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of existing a kind of power model;
Fig. 2 is the circuit diagram of existing another kind of power model;
Fig. 3 is the structure chart of existing a kind of power model;
Fig. 4 is the structure chart of a kind of power model of the utility model embodiment;
Fig. 5 is the three-dimensional structure diagram of a kind of power model of the utility model embodiment;
Fig. 6 is the local structural graph of a kind of power model of the utility model embodiment.
Embodiment
Below in conjunction with accompanying drawing, the utility model embodiment is elaborated, should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.
Fig. 4 is the structure chart of a kind of power model of the utility model embodiment, a kind of power model as shown in Figure 4, comprising: base plate 10, the first electrode 11, the second electrode 12, output electrode 13, upper brachium pontis insulated substrate 21, upper brachium pontis insulated substrate are controlled conductive layer 22, upper brachium pontis insulated substrate and controlled conductive layer 32, two lower brachium pontis insulated substrates by the lower brachium pontis power chip group 34 of current conduction layer 33a, 33b, the upper brachium pontis power chip group 24 of a plurality of parallel connections, a plurality of parallel connections by current conduction layer 23, lower brachium pontis insulated substrate 31, lower brachium pontis insulated substrate, wherein, described output electrode is arranged at the first end on base plate, the first electrode is arranged at the second end relative with output electrode on base plate with the second electrode, upper brachium pontis insulated substrate is located on base plate, upper brachium pontis insulated substrate is controlled conductive layer, upper brachium pontis insulated substrate is located on upper brachium pontis insulated substrate by current conduction layer, and the upper brachium pontis power chip of a plurality of parallel connections is mounted on brachium pontis insulated substrate by current conduction layer, lower brachium pontis insulated substrate is located on base plate, lower brachium pontis insulated substrate is controlled conductive layer, two lower brachium pontis insulated substrates are located on lower brachium pontis insulated substrate by current conduction layer, and the lower brachium pontis power chip component of a plurality of parallel connections is opened in two lower brachium pontis insulated substrates by current conduction layer, described upper brachium pontis power chip group comprises the first power switch 241 and the first diode, the input of described the first power switch is connected by current conduction layer with upper brachium pontis insulated substrate, upper brachium pontis insulated substrate is connected with the first electrode by current conduction layer, the output of described the first power switch is connected with output electrode, the control end of described the first power switch is controlled conductive layer with upper brachium pontis insulated substrate and is connected, the positive pole of the first diode is connected with the output of the first power switch, and the negative pole of the first diode is connected by current conduction layer with upper brachium pontis insulated substrate, described lower brachium pontis chipset comprises the second power switch 341 and the second diode, the input of the second power switch is connected by current conduction layer with the lower brachium pontis insulated substrate at its place, the output of the second power switch is connected with the second electrode, the control end of the second power switch is controlled conductive layer with lower brachium pontis insulated substrate and is connected, described two lower brachium pontis insulated substrates connect respectively the output of the first power switch corresponding thereto by current conduction layer, the positive pole of the second diode is connected with the output of the second power switch, the negative pole of the second diode is connected by current conduction layer with the lower brachium pontis insulated substrate at its place.
Fig. 5 is the three-dimensional structure diagram of a kind of power model of the utility model embodiment; As shown in Figure 5, as the further improvement of technique scheme, the first electrode 11 comprises from upwardly extending the first lead division 111 in base plate top, and the first connecting portion 112 extending to output electrode direction near one end of base plate from the first lead division; The second electrode 12 comprises from upwardly extending the second lead division 121 in base plate top, and the second connecting portion 122 extending to output electrode direction near one end of base plate from the second lead division; Wherein, the first lead division and the second lead division are being parallel to stacked setting in the direction of base plate, the stacked setting in the direction perpendicular to base plate of the first connecting portion and the second connecting portion, the first and second electrodes adopt stacked structure, can effectively reduce the stray inductance of module.
Further improvement as technique scheme, as shown in Figure 5, described upper brachium pontis insulated substrate comprises is located at two lower brachium pontis insulated substrates by the extension insulated substrate (not shown) between current conduction layer, described upper brachium pontis insulated substrate is comprised and is located at two lower brachium pontis insulated substrates by the extension insulated substrate conductive layer 231 between current conduction layer by current conduction layer, extending insulated substrate conductive layer is located on extension insulated substrate, extending insulated substrate conductive layer is connected with the first electrode, to make full use of the area of insulated substrate, the compactedness of guaranteed output module, and be convenient to produce.
Particularly, in certain embodiments, described the first power switch is power MOS pipe, and the first diode and power MOS pipe are integrated in same chip; Described the second power switch is power MOS pipe, and the second diode and power MOS pipe are integrated in same chip; Certainly, technical staff also can, according to actual conditions, adopt discrete metal-oxide-semiconductor and diode.
Particularly, in certain embodiments, described the first power switch is IGBT, and the first diode and IGBT are integrated in same chip; Described the second power switch is IGBT, and the second diode and power IGBT are integrated in same chip.Certainly, technical staff also can, according to actual conditions, adopt discrete IGBT and diode.
Fig. 6 is the local structural graph of a kind of power model of the utility model embodiment, as shown in Figure 6, further improvement as technique scheme, the common formation of described upper brachium pontis insulated substrate and described lower brachium pontis insulated substrate one integral insulation substrate, this integral insulation substrate comprises the 501He second side, first side 502 being parallel to each other, be located at base plate near the 3rd vertical side 503 of the Qie Yu first side, one end of output electrode, be located at base plate near one end of the first electrode and the four side 504 parallel with the 3rd side, the first hypotenuse 505, the second hypotenuse 506, the 3rd hypotenuse 507, the 4th hypotenuse 508, the first hypotenuse and the 4th hypotenuse are oppositely arranged, and the second hypotenuse and the 3rd hypotenuse are oppositely arranged, one end of first side is connected with the 3rd side by the first hypotenuse, and the first hypotenuse is obtuse angle with the angle of first side and the 3rd side respectively, one end of second side is connected with the 3rd side by the second hypotenuse, and the second hypotenuse is obtuse angle with the angle of second side and the 3rd side respectively, the other end of first side is connected with four side by the 3rd hypotenuse, and the 3rd hypotenuse is obtuse angle with the angle of first side and four side respectively, the other end of second side is connected with four side by the 4th hypotenuse, and the 4th hypotenuse is obtuse angle with the angle of first side and four side respectively, this integral insulation substrate is provided with metal level (not shown) near the surface of base plate, and the shape of described metal level is identical with described integral insulation substrate, and the marginal point of described metal level is all equal to the beeline of described integral insulation substrate edges, adopt this structure can effectively shorten the diagonal of integral insulation substrate, reduce its swelling stress.
As shown in Figure 6, as the further improvement of technique scheme, described upper brachium pontis insulated substrate comprises with output electrode and pointed to the crossing first side of the direction of the first electrode by current conduction layer, and this side has the first kink 231; Described two lower brachium pontis insulated substrates comprise with output electrode and are pointed to the crossing second side of the direction of the first electrode by current conduction layer, and this side has the second kink 331.Adopt this structure can effectively prevent brachium pontis insulated substrate and lower brachium pontis insulated substrate sliver.
As shown in Figure 6, further improvement as technique scheme, the first power switch and the first diode are a plurality of, described upper brachium pontis insulated substrate is controlled conductive layer and is provided with the resistance 601 identical with the first power switch pipe number, a plurality of the first power switchs are controlled conductive layer by resistance and upper brachium pontis insulated substrate and are connected, to improve a plurality of the first power switch open-interval consistency.
As shown in Figure 6, further improvement as technique scheme, described lower brachium pontis insulated substrate is controlled conductive layer and is provided with the resistance 701 identical with the second power switch pipe number, the second power switch is controlled conductive layer by resistance and upper brachium pontis insulated substrate and is connected, to improve a plurality of the first power switch open-interval consistency.
As shown in Figure 6, as the further improvement of technique scheme,, described two lower brachium pontis insulated substrates are by also comprising between current conduction layer in order to two lower brachium pontis insulated substrates described in balance by the balance conductive layer 801 of current conduction layer current potential.
The foregoing is only preferred embodiment of the present utility model; not thereby limit the scope of the claims of the present utility model; every equivalent structure or conversion of equivalent flow process that utilizes the utility model specification and accompanying drawing content to do; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present utility model.
Claims (10)
1. a power model, it is characterized in that, comprising: base plate, the first electrode, the second electrode, output electrode, upper brachium pontis insulated substrate, upper brachium pontis insulated substrate are controlled conductive layer, upper brachium pontis insulated substrate is controlled conductive layer, two lower brachium pontis insulated substrates by the lower brachium pontis power chip group of current conduction layer, the upper brachium pontis power chip group of a plurality of parallel connections, a plurality of parallel connections by current conduction layer, lower brachium pontis insulated substrate, lower brachium pontis insulated substrate, wherein, described output electrode is arranged at the first end on base plate, the first electrode is arranged at the second end relative with output electrode on base plate with the second electrode, upper brachium pontis insulated substrate is located on base plate, upper brachium pontis insulated substrate is controlled conductive layer, upper brachium pontis insulated substrate is located on upper brachium pontis insulated substrate by current conduction layer, and the upper brachium pontis power chip of a plurality of parallel connections is mounted on brachium pontis insulated substrate by current conduction layer, lower brachium pontis insulated substrate is located on base plate, lower brachium pontis insulated substrate is controlled conductive layer, two lower brachium pontis insulated substrates are located on lower brachium pontis insulated substrate by current conduction layer, and the lower brachium pontis power chip component of a plurality of parallel connections is opened in two lower brachium pontis insulated substrates by current conduction layer, described upper brachium pontis power chip group comprises the first power switch and the first diode, the input of described the first power switch is connected by current conduction layer with upper brachium pontis insulated substrate, upper brachium pontis insulated substrate is connected with the first electrode by current conduction layer, the output of described the first power switch is connected with output electrode, the control end of described the first power switch is controlled conductive layer with upper brachium pontis insulated substrate and is connected, the positive pole of the first diode is connected with the output of the first power switch, and the negative pole of the first diode is connected by current conduction layer with upper brachium pontis insulated substrate, described lower brachium pontis chipset comprises the second power switch and the second diode, the input of the second power switch is connected by current conduction layer with the lower brachium pontis insulated substrate at its place, the output of the second power switch is connected with the second electrode, the control end of the second power switch is controlled conductive layer with lower brachium pontis insulated substrate and is connected, described two lower brachium pontis insulated substrates connect respectively the output of the first power switch corresponding thereto by current conduction layer, the positive pole of the second diode is connected with the output of the second power switch, the negative pole of the second diode is connected by current conduction layer with the lower brachium pontis insulated substrate at its place.
2. a kind of power model according to claim 1, is characterized in that, the first electrode comprises from upwardly extending the first lead division in base plate top, and the first connecting portion extending to output electrode direction near one end of base plate from the first lead division; The second electrode comprises from upwardly extending the second lead division in base plate top, and the second connecting portion extending to output electrode direction near one end of base plate from the second lead division; Wherein, the first lead division and the second lead division are being parallel to stacked setting in the direction of base plate, the stacked setting in the direction perpendicular to base plate of the first connecting portion and the second connecting portion.
3. a kind of power model according to claim 1, it is characterized in that, described upper brachium pontis insulated substrate comprises is located at two lower brachium pontis insulated substrates by the extension insulated substrate between current conduction layer, described upper brachium pontis insulated substrate is comprised and is located at two lower brachium pontis insulated substrates by the extension insulated substrate conductive layer between current conduction layer by current conduction layer, extend insulated substrate conductive layer and be located on extension insulated substrate, extend insulated substrate conductive layer and be connected with the first electrode.
4. a kind of power model according to claim 1, is characterized in that, described the first power switch is power MOS pipe, and the first diode and power MOS pipe are integrated in same chip; Described the second power switch is power MOS pipe, and the second diode and power MOS pipe are integrated in same chip.
5. a kind of power model according to claim 1, is characterized in that, described the first power switch is IGBT, and the first diode and IGBT are integrated in same chip; Described the second power switch is IGBT, and the second diode and power IGBT are integrated in same chip.
6. a kind of power model according to claim 1, it is characterized in that, described upper brachium pontis insulated substrate and described lower brachium pontis insulated substrate be common forms an integral insulation substrate, this integral insulation substrate comprises the first side that is parallel to each other and second side, be located at base plate near the 3rd vertical side of the Qie Yu first side, one end of output electrode, be located at base plate near one end of the first electrode and four side, first hypotenuse, second hypotenuse, three hypotenuse, four hypotenuse parallel with the 3rd side; The first hypotenuse and the 4th hypotenuse are oppositely arranged, and the second hypotenuse and the 3rd hypotenuse are oppositely arranged; One end of first side is connected with the 3rd side by the first hypotenuse, and the first hypotenuse is obtuse angle with the angle of first side and the 3rd side respectively, one end of second side is connected with the 3rd side by the second hypotenuse, and the second hypotenuse is obtuse angle with the angle of second side and the 3rd side respectively; The other end of first side is connected with four side by the 3rd hypotenuse, and the 3rd hypotenuse is obtuse angle with the angle of first side and four side respectively, the other end of second side is connected with four side by the 4th hypotenuse, and the 4th hypotenuse is obtuse angle with the angle of first side and four side respectively; This integral insulation substrate is provided with metal level near the surface of base plate, and the shape of described metal level is identical with described integral insulation substrate, and the marginal point of described metal level is all equal to the beeline of described integral insulation substrate edges.
7. a kind of power model according to claim 1, is characterized in that, described upper brachium pontis insulated substrate comprises with output electrode and pointed to the crossing first side of the direction of the first electrode by current conduction layer, and this side has the first kink; Described lower brachium pontis insulated substrate comprises with output electrode and pointed to the crossing second side of the direction of the first electrode by current conduction layer, and this side has the second kink.
8. a kind of power model according to claim 1, it is characterized in that, the first power switch and the first diode are a plurality of, described upper brachium pontis insulated substrate is controlled conductive layer and is provided with the resistance identical with the first power switch pipe number, and a plurality of the first power switchs are controlled conductive layer by resistance and upper brachium pontis insulated substrate and are connected.
9. a kind of power model according to claim 1, it is characterized in that, described lower brachium pontis insulated substrate is controlled conductive layer and is provided with the resistance identical with the second power switch pipe number, and the second power switch is controlled conductive layer by resistance and upper brachium pontis insulated substrate and is connected.
10. a kind of power model according to claim 1, is characterized in that, described two lower brachium pontis insulated substrates also comprise in order to two lower brachium pontis insulated substrates described in balance by the balance conductive layer of current conduction layer current potential by current conduction layer.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201320692494.5U CN203562425U (en) | 2013-11-01 | 2013-11-01 | Power module |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201320692494.5U CN203562425U (en) | 2013-11-01 | 2013-11-01 | Power module |
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| CN203562425U true CN203562425U (en) | 2014-04-23 |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103545305A (en) * | 2013-11-01 | 2014-01-29 | 徐员娉 | Power module |
| CN104112718B (en) * | 2014-07-25 | 2016-12-07 | 西安交通大学 | A kind of low stray inductance GaN power integration module of two-sided layout |
| CN107251221A (en) * | 2015-02-26 | 2017-10-13 | 罗姆股份有限公司 | Semiconductor device |
| CN109768694A (en) * | 2018-10-14 | 2019-05-17 | 深圳市慧成功率电子有限公司 | A kind of power module with fuse |
| TWI716238B (en) * | 2019-12-26 | 2021-01-11 | 財團法人工業技術研究院 | High power module |
| CN116130467A (en) * | 2023-02-16 | 2023-05-16 | 华中科技大学 | Symmetrical layout half-bridge power module |
-
2013
- 2013-11-01 CN CN201320692494.5U patent/CN203562425U/en not_active Withdrawn - After Issue
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103545305A (en) * | 2013-11-01 | 2014-01-29 | 徐员娉 | Power module |
| CN103545305B (en) * | 2013-11-01 | 2016-04-27 | 徐员娉 | A kind of power model |
| CN104112718B (en) * | 2014-07-25 | 2016-12-07 | 西安交通大学 | A kind of low stray inductance GaN power integration module of two-sided layout |
| CN107251221A (en) * | 2015-02-26 | 2017-10-13 | 罗姆股份有限公司 | Semiconductor device |
| US10490494B2 (en) | 2015-02-26 | 2019-11-26 | Rohm Co., Ltd. | Semiconductor device |
| US10892218B2 (en) | 2015-02-26 | 2021-01-12 | Rohm Co., Ltd. | Semiconductor device |
| CN107251221B (en) * | 2015-02-26 | 2021-09-24 | 罗姆股份有限公司 | Semiconductor device with a plurality of semiconductor chips |
| CN109768694A (en) * | 2018-10-14 | 2019-05-17 | 深圳市慧成功率电子有限公司 | A kind of power module with fuse |
| TWI716238B (en) * | 2019-12-26 | 2021-01-11 | 財團法人工業技術研究院 | High power module |
| CN116130467A (en) * | 2023-02-16 | 2023-05-16 | 华中科技大学 | Symmetrical layout half-bridge power module |
| CN116130467B (en) * | 2023-02-16 | 2023-11-10 | 华中科技大学 | Symmetrical layout half-bridge power module |
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