CN208971481U - Overheating protection circuit for GaN power integration module - Google Patents
Overheating protection circuit for GaN power integration module Download PDFInfo
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- CN208971481U CN208971481U CN201821964246.0U CN201821964246U CN208971481U CN 208971481 U CN208971481 U CN 208971481U CN 201821964246 U CN201821964246 U CN 201821964246U CN 208971481 U CN208971481 U CN 208971481U
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Abstract
The utility model discloses a kind of overheating protection circuit for GaN power integration module, including 2 temperature detection resistances, 3 biasing resistors, 1 voltage clamping diode, 1 filter capacitor C1,4 NMOS tubes and 9 PMOS tube；The overheating protection circuit can detect temperature of power module height automatically; GaN FETs device is automatically shut down when the temperature is excessively high; and the interference of the spike burr signal occurred on high side and low side power voltage can be filtered out, guarantees that the working characteristics of GaN FETs is in safety zone.
Description
Technical field
The invention belongs to electronic circuit design fields, are applied to HEMT device in GaN power module more particularly, to one kind
The overheating protection circuit of part gate driving and protection.
Background technique
Conventional electric power electronic power components based on silicon materials its theoretical limit of Step wise approximation, it is difficult to meet electric power
The growth requirement of electronic technology high frequency and high power density.Compared with traditional Si device, GaN device present its
Advantage in conducting resistance and gate charge can make power converter realize smaller volume, higher frequency and higher efficiency, from
And it has broad application prospects in the fields such as automobile, communication, industry.The raising of switching frequency can not only effectively reduce
The size of capacitor, inductance and transformer in circuit system, but also interference can be inhibited, reduce ripple, improve power-supply system list
Position gain bandwidth is to improve its dynamic response performance.And the gate driving circuit of high speed is used to drive GaN power device, so that
Entire power converter reaches high efficiency and reduces circuit area, saves cost.
Fig. 1 shows most common typical case's GaN half-bridge drive circuit block diagram in power module.As shown in Figure 1, typical
GaN half-bridge drive circuit is divided into high-end and low side two paths, by the way of Bootstrap, two-way low pressure input channel.?
During low side power GaN device is connected, switching node (SW) is pulled down to ground, and VDD gives bootstrapping electricity by bootstrap diode at this time
Capacity charge makes bootstrap capacitor voltage difference of the two ends close to VDD.Instantly when end pipe is closed, high-end input signal opens high-end tubes,
Node voltage rises to VIN, i.e. VSW rises to VIN.Since bootstrap capacitor both end voltage is constant, therefore bootstrap voltage mode rail HB
VSW+VDD is arrived by bootstrapping.High side circuitry remains VHB-VSW ≈ VDD.And HB is by bootstrap capacitor when being booted, bootstrap diode
Cathode voltage be high potential, be higher than anode voltage VDD, therefore the reverse-biased cut-off of bootstrap diode.
It is widely used for GaN FETs at present in GaN power device, mainly there is following spy compared with Si MOSFET
Point: small in same resistance to pressure conducting resistance and device volume；Switching speed is fast；Current density is big, and power density is high.GaN
These features of FETs ensure that GaN FETs has boundless prospect and market in the following power electronics applications field.But
Be that there is also some factors paid particular attention to: threshold voltage is low；Gate source voltage upper limit VGS (MAX) is low；It can reverse-conducting.
It is above-mentioned need to special consideration should be given to factor can bring some problems when driving GaN device, cause to be traditionally used for MOS power device at present
The driving circuit of part is not particularly suited for GaN power device.Since the working frequency of GaN FETs is often in MHz rank, GaN
The frequency converter of FETs will become abnormal important, wherein the excessively high bring integrity problem of temperature be one it is important it is limited because
Element, therefore it is necessary to provide a kind of novel superheating protection circuit, the working characteristics of guarantee GaN FETs is in safety zone.
Summary of the invention
The purpose of this utility model is temperature excessively high bring integrity problem when existing GaN power device uses, specifically
It is related to a kind of thermal-shutdown circuit applied to HEMT device in GaN power module.
The purpose of this utility model can be achieved through the following technical solutions:
A kind of overheating protection circuit for GaN power integration module, it is characterized in that: including 2 temperature detection resistances, 3
A biasing resistor, 1 voltage clamping diode, 1 filter capacitor C1,4 NMOS pipes and 9 PMOS tube；
The connection relationship of the overheating protection circuit for GaN power integration module are as follows: the first temperature detection resistance Rtd
Upper end be connected to the lower end of second temperature detection resistance Rd, be also connected to the grid end of the first PMOS pipe M1；First temperature detection
The lower end of resistance Rtd, which is connected to, is also connected to ground level；The upper end of second temperature detection resistance Rd is connected to supply voltage；First
The drain terminal of PMOS tube M1 is connected to the drain terminal and grid end of the 3rd NMOS pipe M3, is also connected to the grid end of the 4th NMOS tube M4；First
The source of PMOS tube M1 is connected to the source of the second PMOS tube M2 and the drain terminal of the 5th PMOS tube M5；The grid of second PMOS tube M2
The upper end of the second biasing resistor R2 of end connection and the lower end of the first biasing resistor R1；The lower end of second biasing resistor R2 is connected to ground
Level；The upper end of first biasing resistor R1 connects the drain terminal of the 6th PMOS tube M6 and the anode of voltage clamping diode Z1；Voltage
The negative terminal of clamp diode Z1 is connected to ground level；The grid end of 5th PMOS tube M5 connects the grid end of the 6th PMOS tube M6, also connects
The grid end, the grid end of the 11st PMOS tube M11 and the grid end of the 8th PMOS tube M8 for meeting the 7th PMOS tube M7, are also connected with the 8th
The drain terminal of PMOS pipe M8；The drain terminal of 4th NMOS tube M4 connects the drain terminal of the second PMOS tube M2, is also connected to the 11st PMOS tube
The grid end of the drain terminal of M11 and the 9th NMOS tube M9；The drain terminal of 9th NMOS tube M9 connects the drain terminal and the tenth of the 7th PMOS tube M7
The grid end of PMOS tube M10 is also connected to the upper end of filter capacitor C1；It is also connected to the 13rd NMOS tube M13 and the 12nd PMOS
The grid end of pipe M12；The source of 11st PMOS tube M11 is connected to the drain terminal of the tenth PMOS tube M10；The lower end of filter capacitor C1
Earth level；13rd NMOS tube M13's is connected with the 12nd PMOS tube M12 drain terminal, and exports and differentiate signal OC；Except first
The source of remaining PMOS tube other than PMOS tube M1, the second PMOS tube M2 and the 11st PMOS tube M11 connects supply voltage；Institute
There is the substrate of PMOS tube to connect supply voltage, the source and the equal earth level of substrate of all NMOS pipes.
The overheating protection circuit for GaN power integration module, it is characterized in that the temperature detection resistance Rtd is
Thermistor.
The utility model has the advantages that: automatic detection temperature of power module height automatically shuts down GaN when the temperature is excessively high
FETs device, and the interference of the spike burr signal occurred on high side and low side power voltage can be filtered out, guarantee GaN
The working characteristics of FETs is in safety zone.
Detailed description of the invention
Fig. 1 shows typical GaN half-bridge drive circuit block diagram according to prior art；
Fig. 2 is schematic diagram of the utility model for the overheating protection circuit of GaN power integration module；
Fig. 3 is the Transient figure of the utility model overheating protection circuit.
Specific embodiment
The utility model is described in more detail with example with reference to the accompanying drawing.
As shown in Fig. 2, a kind of overheating protection circuit for GaN power integration module, including 2 temperature detection resistances, 3
A biasing resistor, 1 voltage clamping diode, 1 filter capacitor C1,4 NMOS pipes and 9 PMOS tube.
The connection relationship of circuit shown in Fig. 2 are as follows: the upper end of the first temperature detection resistance Rtd is connected to second temperature detection electricity
The lower end for hindering Rd, is also connected to the grid end of the first PMOS tube M1；The lower end of first temperature detection resistance Rtd, which is connected to, to be also connected to
Ground level；The upper end of second temperature detection resistance Rd is connected to supply voltage；The drain terminal of first PMOS tube M1 is connected to third
The drain terminal and grid end of NMOS tube M3, is also connected to the grid end of the 4th NMOS tube M4；The source of first PMOS tube M1 is connected to second
The drain terminal of the source of PMOS tube M2 and the 5th PMOS tube M5；The grid end of second PMOS tube M2 connects the upper of the second biasing resistor R2
The lower end at end and the first biasing resistor R1；The lower end of second biasing resistor R2 is connected to ground level；First biasing resistor R1's is upper
The drain terminal of the 6th PMOS tube M6 of end connection and the anode of voltage clamping diode Z1；The negative terminal of voltage clamping diode Z1 is connected to
Ground level；The grid end of 5th PMOS tube M5 connects the grid end of the 6th PMOS tube M6, be also connected with the 7th PMOS tube M7 grid end, the tenth
The grid end of one PMOS tube M11 and the grid end of the 8th PMOS tube M8, are also connected with the drain terminal of the 8th PMOS tube M8；4th NMOS pipe M4
Drain terminal connect the second PMOS tube M2 drain terminal, be also connected to the drain terminal of the 11st PMOS tube M11 and the grid of the 9th NMOS tube M9
End；The drain terminal of 9th NMOS tube M9 connects the drain terminal of the 7th PMOS tube M7 and the grid end of the tenth PMOS tube M10, is also connected to filtering
The upper end of capacitor C1；It is also connected to the grid end of the 13rd NMOS tube M13 and the 12nd PMOS tube M12；11st PMOS tube M11's
Source is connected to the drain terminal of the tenth PMOS tube M10；The lower end earth level of filter capacitor C1；13rd NMOS tube M13's and the
12 PMOS tube M12 drain terminals are connected, and export and differentiate signal OC；Except the first PMOS tube M1, the second PMOS tube M2 and the 11st
The source of remaining PMOS tube other than PMOS tube M11 connects supply voltage；The substrate of all PMOS tube connects supply voltage, owns
The equal earth level of source and substrate of NMOS tube.
It is made of in figure R1, R2, R3, Z1, C1, M1, M2, M3, M4, M5, M6, M7, M8, M9, M10, M11, M12 and M13
Circuit be a hysteresis voltage comparator.Temperature detection resistance Rtd is thermistor, for detecting temperature level.Temperature inspection
It surveys by obtaining detection voltage SD after resistance Rd and Rtd partial pressure detection.The negative terminal of comparator is detection voltage SD；The anode of comparator
For reference voltage REF.
Fig. 3 is the simulation result of current foldback circuit, triangular signal analog sampling voltage SD, as can be seen that working as in figure
After SD is greater than 2.4V, circuit output high level, after SD is less than 1.7V, circuit output low level realizes the hysteresis of 0.7V.Fig. 4
Temperature simulation curve, as can be seen from the figure when temperature by it is low change to high when and thermal-shutdown circuit difference when changing from high to low
It is respectively 115.64 DEG C and 107.97 DEG C there are two threshold value, sluggish temperature is 7.67 DEG C.Circuit meets functional requirement.
It will be appreciated by those skilled in the art that attached drawing is the schematic diagram of a preferred embodiment, above-mentioned the utility model is real
It is for illustration only to apply a serial number, does not represent the advantages or disadvantages of the embodiments.
The above is only the preferred embodiment of the present invention, is not intended to limit the utility model, all practical at this
Within novel spirit and principle, any modification, equivalent replacement, improvement and so on should be included in the guarantor of the utility model
Within the scope of shield.
Claims (2)
1. a kind of overheating protection circuit for GaN power integration module, it is characterized in that: including 2 temperature detection resistances, 3
Biasing resistor, 1 voltage clamping diode, 1 filter capacitor C1,4 NMOS tubes and 9 PMOS tube；
The connection relationship of the overheating protection circuit for GaN power integration module are as follows: the first temperature detection resistance Rtd's is upper
End is connected to the lower end of second temperature detection resistance Rd, is also connected to the grid end of the first PMOS tube M1；First temperature detection resistance
The lower end of Rtd, which is connected to, is also connected to ground level；The upper end of second temperature detection resistance Rd is connected to supply voltage；First PMOS
The drain terminal of pipe M1 is connected to the drain terminal and grid end of third NMOS tube M3, is also connected to the grid end of the 4th NMOS tube M4；First PMOS
The source of pipe M1 is connected to the source of the second PMOS tube M2 and the drain terminal of the 5th PMOS tube M5；The grid end of second PMOS tube M2 connects
The lower end of the upper end of second biasing resistor R2 and the first biasing resistor R1；The lower end of second biasing resistor R2 is connected to ground level；
The upper end of first biasing resistor R1 connects the drain terminal of the 6th PMOS tube M6 and the anode of voltage clamping diode Z1；Voltage clamping two
The negative terminal of pole pipe Z1 is connected to ground level；The grid end of 5th PMOS tube M5 connects the grid end of the 6th PMOS tube M6, is also connected with the 7th
The grid end of the grid end of PMOS tube M7, the grid end of the 11st PMOS tube M11 and the 8th PMOS tube M8 is also connected with the 8th PMOS tube M8's
Drain terminal；The drain terminal of 4th NMOS tube M4 connects the drain terminal of the second PMOS tube M2, be also connected to the 11st PMOS tube M11 drain terminal and
The grid end of 9th NMOS tube M9；The drain terminal of 9th NMOS tube M9 connects the drain terminal and the tenth PMOS tube M10 of the 7th PMOS tube M7
Grid end is also connected to the upper end of filter capacitor C1；It is also connected to the grid end of the 13rd NMOS tube M13 and the 12nd PMOS tube M12；
The source of 11st PMOS tube M11 is connected to the drain terminal of the tenth PMOS tube M10；The lower end earth level of filter capacitor C1；Tenth
Three NMOS tube M13's is connected with the 12nd PMOS tube M12 drain terminal, and exports and differentiate signal OC；Except the first PMOS tube M1, second
The source of remaining PMOS tube other than PMOS tube M2 and the 11st PMOS tube M11 connects supply voltage；The substrate of all PMOS tube
Connect supply voltage, the equal earth level of source and substrate of all NMOS tubes.
2. the overheating protection circuit according to claim 1 for GaN power integration module, it is characterized in that: the temperature
Detection resistance Rtd is thermistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821964246.0U CN208971481U (en) | 2018-11-27 | 2018-11-27 | Overheating protection circuit for GaN power integration module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821964246.0U CN208971481U (en) | 2018-11-27 | 2018-11-27 | Overheating protection circuit for GaN power integration module |
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| Publication Number | Publication Date |
|---|---|
| CN208971481U true CN208971481U (en) | 2019-06-11 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201821964246.0U Active CN208971481U (en) | 2018-11-27 | 2018-11-27 | Overheating protection circuit for GaN power integration module |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113472185A (en) * | 2021-07-05 | 2021-10-01 | 电子科技大学 | Level shift circuit suitable for high-voltage GaN half-bridge gate drive system |
| CN114625198A (en) * | 2020-12-10 | 2022-06-14 | 圣邦微电子（北京）股份有限公司 | Over-temperature protection threshold value measuring device and measuring method thereof |
-
2018
- 2018-11-27 CN CN201821964246.0U patent/CN208971481U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114625198A (en) * | 2020-12-10 | 2022-06-14 | 圣邦微电子（北京）股份有限公司 | Over-temperature protection threshold value measuring device and measuring method thereof |
| CN113472185A (en) * | 2021-07-05 | 2021-10-01 | 电子科技大学 | Level shift circuit suitable for high-voltage GaN half-bridge gate drive system |
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