CN203014698U - Constant current control circuit with high power factor - Google Patents

Abstract

The utility model belongs to the field of constant current control, and provides a constant current control circuit with a high power factor. The constant current control circuit carries out zero-crossing comparison on voltage of a first end of a sampling resistor R1 through a zero-crossing comparison start module, and outputs a comparative level correspondingly so as to drive a pulse signal generating module to control turn-on of a switching tube; an error amplifying module carries out error amplification on the voltage of the first end of the sampling resistor R1, and outputs error amplification voltage correspondingly; and a breakover time control module outputs a breakover control level signal according to the error amplification voltage and a feedback level signal outputted by the pulse signal generating module so as to drive the pulse signal generating module to control turn-off of the switching tube, thereby improving the power factor and the voltage conversion efficiency while realizing circuit simplification, and realizing high power factor and constant current output within a wide input voltage range.

Description

A kind of high power factor constant current control circuit

Technical field

The utility model belongs to the constant current control field, relates in particular to a kind of high power factor constant current control circuit.

Background technology

At present, all advocating the theory of energy-conserving and environment-protective in global range to reduce the pollution to environment, is also like this for the load equipment control field.Many load equipments all need its control circuit can provide stable and reliable power supply for giving to guarantee carrying out in order of its normal operation, particularly for the load equipment that needs constant current to supply with, need its control circuit can possess constant current and control function.

In addition, if the power factor of the load equipment of incoming transport electrical network is on the low side, can cause electric pollution to a certain degree to utility network.In order to alleviate the extent of injury of electric pollution, many countries have formulated corresponding power factor standard one after another.For example, for LED, the accurate regulation of the asterisk of american energy: the power factor that power is greater than the LED bulb of 5W should be not less than 0.7; European standard regulation: power is greater than the power factor of the LED bulb of 25W should be higher than 0.9.

Carry out constant current control and need possess the requirement of High Power Factor for load equipment for above-mentioned, prior art provides two kinds of implementations, a kind of is by increasing the requirement that corresponding passive power factor correcting circuit meets constant current control and High Power Factor on the basis of the power-switching circuit traditional, but, because passive power factor correcting circuit need to adopt high-voltage electrolytic capacitor, institute is so that cost increases and the lost of life.Another kind of be to realize Active Power Factor Correction and constant current output by the sample voltage of introduced electric main of sample circuit.Due to the special circuit sampling line voltage of needs, institute is so that the circuit structure complexity, be unfavorable for improving the integrated level of circuit, and output current can change with the variation of input voltage, thereby cause it to realize constant current output in wider input voltage range.

In sum, there is the circuit structure complexity in prior art, cost is high and can't in wider input voltage range, realize the problem of High Power Factor and constant current output.

The utility model content

The purpose of this utility model is to provide a kind of high power factor constant current control circuit, is intended to solve that the existing circuit structure of prior art is complicated, cost is high and can't in wider input voltage range, realize the problem of High Power Factor and constant current output.

The utility model is to realize like this, a kind of high power factor constant current control circuit, with AC power, with load, be connected, comprise rectifier bridge, sampling resistor R1, capacitor C 2, diode D1 and output stage filtration module, described rectifier bridge is connected with described AC power, the negative electrode of the described diode D1 of the first termination of described sampling resistor R1, the second end of described sampling resistor R1 and the first end of described capacitor C 2 are connected to the input of described output stage filtration module altogether, the input of the described load of output termination of described output stage filtration module, the anode of the earth terminal of described rectifier bridge and described diode D1, the loop end of described output stage filtration module and the output of described load are connected to ground altogether, described high power factor constant current control circuit also comprises:

Switching tube, mistake zero balancing opening module, error amplification module, ON time control module and pulse signal generation module;

The input of described switching tube connects the output of described rectifier bridge, the input of the output of described switching tube and described zero balancing opening module excessively and the input of described error amplification module are connected to the first end of described sampling resistor R1 altogether, the described first input end of crossing the described pulse signal generation module of output termination of zero balancing opening module, the output of described error amplification module connects the first input end of described ON time control module and the second end of described capacitor C 2 simultaneously, the second input of described ON time control module and output are connected respectively signal feedback end and second input of described pulse signal generation module, the described earth terminal of zero balancing opening module and the earth terminal of described error amplification module crossed, the earth terminal of the earth terminal of described ON time control module and described pulse signal generation module is connected to the first end of described capacitor C 2 altogether, the described power end of zero balancing opening module and the power end of described error amplification module crossed, the power end of the power end of described ON time control module and described pulse signal generation module is connected to described DC power supply altogether, the output of described pulse signal generation module connects the control end of described switching tube.

In the utility model, comprise described switching tube by employing, the described zero balancing opening module of crossing, described error amplification module, the high power factor constant current control circuit of described ON time control module and described pulse signal generation module, voltage by described zero balancing opening module excessively to the first end of described sampling resistor R1 carried out correspondingly exporting the unlatching that the described pulse signal generation module of a comparative level signal driver is controlled described switching tube after zero balancing, described error amplification module carries out correspondingly exporting an error amplification voltage to described ON time control module after the error amplification to the voltage of the first end of described sampling resistor R1, then amplify according to described error the shutoff that the described pulse signal generation module of feedback level signal output conducting control level signal driver that voltage and described pulse signal generation module export is controlled described switching tube by described ON time control module, thereby when realizing circuit reduction and miniaturization, power factor and voltage transitions efficiency have been improved, and do not need high-voltage electrolytic capacitor, in wider input voltage range, realized the constant current of load is controlled, solved the existing circuit structure complexity of prior art, cost is high and can't in wider input voltage range, realize the problem of High Power Factor and constant current output.

The accompanying drawing explanation

Fig. 1 is the structure chart of the high power factor constant current control circuit that provides of the utility model embodiment;

Fig. 2 is the exemplary circuit structure chart of the high power factor constant current control circuit that provides of the utility model embodiment;

Fig. 3 is the structural representation of the related high power factor constant current control chip of the utility model embodiment;

Fig. 4 is high power factor constant current control circuit that the utility model embodiment provides related electric current and the oscillogram of voltage parameter while realizing High Power Factor;

Fig. 5 is the oscillogram that high power factor constant current control circuit that the utility model embodiment provides is realized electric current and voltage parameter related in the constant current output process.

Embodiment

In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.

In the utility model embodiment, the high power factor constant current control circuit that comprises switching tube, mistake zero balancing opening module, error amplification module, ON time control module and pulse signal generation module by employing, carried out the unlatching of after zero balancing, correspondingly exporting comparative level signal driver pulse signal generation module control switch pipe by crossing the voltage of zero balancing opening module to sampling resistor R1 first end, the error amplification module carries out after the error amplification correspondingly output error to the voltage of sampling resistor R1 first end and amplifies voltage to the ON time control module, then amplified the shutoff of the feedback level signal output conducting control level signal driver pulse signal generation module control switch pipe that voltage and pulse signal generation module export according to this error by the ON time control module, thereby when realizing circuit reduction, power factor and voltage transitions efficiency have been improved, and do not need high-voltage electrolytic capacitor, in wider input voltage range, realized the constant current of load is controlled.

As shown in Figure 1, for convenience of explanation, Fig. 1 only shows the part relevant to the utility model embodiment to the structure of the high power factor constant current control circuit that the utility model embodiment provides, and details are as follows:

High power factor constant current control circuit 100 is connected with load 300 with AC power 200, comprise rectifier bridge BD, sampling resistor R1, capacitor C 2, diode D1 and output stage filtration module 101, rectifier bridge BD is connected with AC power 200, the negative electrode of the first terminating diode D1 of sampling resistor R1, the second end of sampling resistor R1 and the first end of capacitor C 2 are connected to the input of output stage filtration module 101 altogether, the input of the output termination load 300 of output stage filtration module 101, the anode of the earth terminal of rectifier bridge BD and diode D1, the loop end of output stage filtration module 101 and the output of load 300 are connected to ground altogether.

High power factor constant current control circuit 100 also comprises:

Switching tube 102, mistake zero balancing opening module 103, error amplification module 104, ON time control module 105 and pulse signal generation module 106.

The input of switching tube 102 connects the output of rectifier bridge BD, the input of the output of switching tube 102 and mistake zero balancing opening module 103 and the input of error amplification module 104 are connected to the first end of sampling resistor R1 altogether, cross the first input end of the output termination pulse signal generation module 106 of zero balancing opening module 103, the output of error amplification module 104 connects the first input end of ON time control module 105 and the second end of capacitor C 2 simultaneously, the second input of ON time control module 105 and output are connected respectively signal feedback end and second input of pulse signal generation module 106, cross the earth terminal of zero balancing opening module 103 and the earth terminal of error amplification module 104, the earth terminal of the earth terminal of ON time control module 105 and pulse signal generation module 106 is connected to the first end of capacitor C 2 altogether, cross the power end of zero balancing opening module 103 and the power end of error amplification module 104, the power end of the power end of ON time control module 105 and pulse signal generation module 106 is connected to DC power supply VCC altogether, the control end of pulse signal generation module 106 output connecting valve pipes 101.

In the utility model embodiment, the first input end 1 of rectifier bridge BD and the second input 2 connect respectively the positive half cycle signal output part of AC power 200+and negative half-cycle signal output-, rectifier bridge BD is for being converted to the half-sinusoid direct current by alternating current; Output stage filtration module 101 obtains drive current for the output from switching tube 102, and this drive current is carried out exporting load 300 to after filtering.

The voltage of crossing the first end of 103 couples of sampling resistor R1 of zero balancing opening module carried out correspondingly exporting comparative level signal driver pulse signal generation module 106 control switch pipes 102 unlatchings after zero balancing, the voltage of the first end of 104 couples of sampling resistor R1 of error amplification module carries out correspondingly exporting an error amplification voltage to ON time control module 105 after the error amplification, the shutoff of the feedback level signal output conducting control level signal driver pulse signal generation module 106 control switch pipes 102 that the error amplification voltage that ON time control module 105 is exported according to error amplification module 104 and pulse signal generation module 106 are exported.

Fig. 2 shows the exemplary circuit structure of the high power factor constant current control circuit that the utility model embodiment provides, and for convenience of explanation, only shows the part relevant to the utility model embodiment, and details are as follows:

As the utility model one preferred embodiment, switching tube 102 is NMOS pipe Q1, and grid, drain electrode and the source electrode of NMOS pipe Q1 are respectively control end, input and the output of switching tube 102.In other embodiment of the utility model, switching tube 102 can also possess the semiconductor switch device of switching characteristic for PMOS pipe, triode, field effect transistor or other.

As the utility model one preferred embodiment, cross zero balancing opening module 103 and comprise the first comparator U1 and the first reference voltage source 1031, the in-phase input end of the first comparator U1, output, positive power source terminal and negative power end were respectively input, output, power end and the earth terminal of zero balancing opening module 103, the output of anti-phase input termination the first reference voltage source 1031 of the first comparator U1.Wherein, the first reference voltage source 1031 is reference voltage generating circuit commonly used.

As the utility model one preferred embodiment, error amplification module 104 comprises error amplifier U2 and the second reference voltage source 1041, the in-phase input end of error amplifier U2 connects the output of the second reference voltage source 1041, and the inverting input of error amplifier U2, output, positive power source terminal and negative power end are respectively input, output, power end and the earth terminal of error amplification module 104.Wherein, the second reference voltage source 1041 is reference voltage generating circuits commonly used.

As the utility model one preferred embodiment, ON time control module 105 comprises:

Current source I1, PMOS pipe Q2, NMOS pipe Q3, the first inverter U3, capacitor C 3 and the second comparator U4;

The power end that the input of current source I1 is ON time control module 105, the output of current source I1 connects the source electrode of PMOS pipe Q2, the drain electrode of the drain electrode of PMOS pipe Q2 and NMOS pipe Q3 and the first end of capacitor C 3 are connected to the inverting input of the second comparator U4 altogether, the grid of the grid of PMOS pipe Q2 and NMOS pipe Q3 is connected to the output of the first inverter U3 altogether, the input of the positive supply termination current source I1 of the second comparator U4, the in-phase input end of the second comparator U4, output and negative power end are respectively the first input end of ON time control module 105, output and earth terminal, the second input that the input of the first inverter U3 is ON time control module 105, the positive power source terminal of the first inverter U3 connects the input of current source I1, the earth terminal that the common contact of the source electrode of the second end of capacitor C 3 and NMOS pipe Q3 and the negative power end of the first inverter U3 is ON time control module 105.

As the utility model one preferred embodiment, pulse signal generation module 106 comprises:

The second inverter U5, rest-set flip-flop RS1, the 3rd inverter U6, NMOS pipe Q4 and NMOS pipe Q5;

The first input end that the input of the second inverter U5 is pulse signal generation module 106, the output of the second inverter U5 connects the first input end S of rest-set flip-flop RS1, the second input R of rest-set flip-flop RS1 and the first output Q are respectively the second input and the signal feedback end of pulse signal generation module 106, the second output of rest-set flip-flop RS1 sky connects, the grid of the input of the 3rd inverter U6 and NMOS pipe Q4 is connected to the first output Q of rest-set flip-flop RS1 altogether, the power end that the common contact of the drain electrode of the positive power source terminal of the positive power source terminal of the second inverter U5 and the 3rd inverter U6 and NMOS pipe Q4 is pulse signal generation module 106, the output that the common contact of the drain electrode of the source electrode of NMOS pipe Q4 and NMOS pipe Q5 is pulse signal generation module 106, the grid of NMOS pipe Q5 connects the output of the 3rd inverter U6, the earth terminal that the common contact of the source electrode of the negative power end of the negative power end of the second inverter U5 and the 3rd inverter U6 and NMOS pipe Q5 is pulse signal generation module 106.

In the utility model embodiment, output filtering module 101 comprises inductance L 1 and capacitor C 4, the first end of inductance L 1 and the second end are respectively input and the output of output filtering module 101, the first end of capacitor C 4 connects the second end of inductance L 1, the loop end that the second end of capacitor C 4 is output filtering module 101.

In actual application, in order to improve the integrated level of circuit, as shown in Figure 3, switching tube 102, cross zero balancing opening module 103, error amplification module 104, ON time control module 105 and pulse signal generation module 106 can be integrated into a high power factor constant current control chip, the input of switching tube 102, the output of the output of switching tube 102 and error amplification module 104 is respectively the input D of high power factor constant current control chip, output CS and comparison signal output COMP, and cross the power end of zero balancing opening module 103 and the power end of error amplification module 104, the power end of the power end of ON time control module 105 and pulse signal generation module 106 meets the power end VDD of rear formation high power factor constant current control chip altogether, cross the earth terminal of zero balancing opening module 103 and the earth terminal of error amplification module 104, the earth terminal of the earth terminal of ON time control module 105 and pulse signal generation module 106 meets the signal ground end GND of rear formation high power factor constant current control chip altogether, in addition, the output voltage of DC power supply VCC can be 15V or 20V in actual applications.

Below in conjunction with Fig. 2, the operation principle of above-mentioned high power factor constant current control circuit 100 is described further:

For improving the power factor part, details are as follows:

Half-sinusoid direct current Vin(its voltage U in that rectifier bridge BD exports and the waveform of input current Im are as shown in Figure 4, input current is the absolute value of the input current of high power factor constant current control circuit 100, its output current with rectifier bridge BD equates, the input current of mentioning in this specification is all above-mentioned indication) enter by NMOS pipe Q1, sampling resistor R1, capacitor C 2, diode D1, cross zero balancing opening module 103, error amplification module 104, ON time control module 105, the Buck conversion circuit that pulse signal generation module 106 and inductance L 1 form, the voltage V to the first end of sampling resistor R1 by error amplifier U2 _cScarry out after the error amplification correspondingly output error and amplify voltage V _cOMP, because the capacitance of the building-out capacitor (being capacitor C 2) of error amplifier U2 is larger, the bandwidth of error amplifier U2 is very low, so error is amplified voltage V _cOMP(error is amplified voltage V to be approximately a fixed value when system stability _cOMPtransient state can be along with V _cSvariation and minor variations occurs, but from macroscopic perspective, V _cOMPmean value a half-sinusoid in the cycle, be stablize constant), when NMOS pipe Q1 conducting, (now the output control signal Vg of pulse signal generation module 106 is high level, outputing to 105 feedback signal is also high level), the voltage of capacitor C 3 starts to rise from 0V, when the voltage of this capacitor C 3 reaches V _cOMPthe time, the output of the second comparator U4 (being conducting control level signal) by the high level saltus step to low level, thereby make its waveform of pulse signal Vg(Ug that pulse signal generation module 106 exports as shown in Figure 4) reduce to low level and turn-off to control NMOS pipe Q1.

Wherein, the output current i of current source I1 ₁oN time T with NMOS pipe Q1 _oN, capacitor C 3 capacitance C ₃and error is amplified voltage V _cOMPrelation be shown below:

i ₁·Ton=C ₃·V _COMP （1）

Capacitance C due to capacitor C 3 ₃output current i with current source I1 ₁be fixed value, while stablizing, error is amplified voltage V _cOMPmean value also fix, therefore, the ON time T of NMOS pipe Q1 _oNfix, then known, the ON time T of NMOS pipe Q1 _oNin the situation that same input voltage and the same load of control will remain unchanged.

When NMOS pipe Q1 closes, the voltage V of the first end of sampling resistor R1 _cSstart to reduce, and at V _cSwhile reducing to 0V, cross zero balancing opening module 103 can output low levels (being the comparative level signal) to rest-set flip-flop RS1 with start pulse signal generation module 106 output high level, and then driving N metal-oxide-semiconductor Q1 conducting.NMOS pipe Q1 turn-on and turn-off so repeatedly, form a critical conduction mode.When NMOS pipe Q1 conducting, the electric current I L that flows through inductance L 1 is from 0 peak that rises to corresponding switch periods, then during NMOS pipe Q1 cut-off, the electric current I L that flows through inductance L 1 again from the peak of corresponding switch periods be reduced to 0(inductance L 1 electric current I L waveform as shown in Figure 4).Input current Im equals the On current of NMOS pipe Q1, the waveform of Im as shown in Figure 4, the waveform of the average current Imavg that the dotted line waveform of the Im waveform in Fig. 4 is input current Im.The relation of the input average current Imavg (t) of each switch periods and NMOS pipe Q1 peak current Ip (t) during conducting in each switch periods can be expressed as:

$\mathrm{Imavg}\left(t\right)=\frac{1}{2}\·\mathrm{Ip}\left(t\right)\·\frac{\mathrm{Ton}}{T}---\left(2\right)$

Wherein, the switch periods that T is NMOS pipe Q1, in critical conduction mode, T=Ton+T _oFF, T _oFFfor the turn-off time of NMOS pipe Q1.Because its transient voltage of Uin(is expressed as Uin (t)) and Vout, T _oN, the inductance value L of inductance L 1 and the NMOS pipe Q1 peak current Ip (t) during conducting in each switch periods relation be shown below:

(Uin(t)-Vout)·T _ON=L·Ip(t)=Vout·(T-T _ON) （3）

Marriage relation formula (2) and (3) known Imavg (t) are shown below with the relation of Uin (t):

$\mathrm{Imavg}\left(t\right)=\frac{1}{2}\·(\mathrm{Uin}\left(t\right)-\mathrm{Vout})\frac{T_{\mathrm{ON}}^2}{L\·T}---\left(4\right)$

From relational expression (3) and (4), can obtain:

$\mathrm{Imavg}\left(t\right)=\frac{1}{2}\·T_{\mathrm{ON}}[\frac{\mathrm{Vout}}{L}-\frac{{\mathrm{Vout}}^2}{L\·\mathrm{Uin}\left(t\right)}]---\left(5\right)$

The inductance value L of inductance L 1 is constant, and marriage relation formula (3), (4) and Fig. 4 are known, under same input voltage, same output voltage (being same Vout), and the ON time T of NMOS pipe Q1 _oNfixing, so Ip (t) and Uin (t) are the linear change of forward, and the waveform that makes the input average current Imavg (t) in each switch periods is followed (comprising phase place and amplitude) variation of transient voltage Uin (t) of direct current Vin and same phase change always, that is: when Uin (t) amplitude becomes large, Imavg (t) amplitude also can increase, and vice versa.Realize thus High Power Factor.

For the output constant current control section, details are as follows:

As shown in Figure 5, the voltage U in of the direct current Vin of rectifier bridge BD output is half-sinusoid, output current Iout(also claims to export average current) size be to be determined by the electric current I L that flows through inductance L 1, in order to reach the purpose of controlling output current Iout, need the electric current I L to flowing through inductance L 1 to be controlled.

Operation principle according to Buck conversion circuit and critical conduction mode, in n the on-off period of nmos switch pipe Q1, the peak current I of the mean value Ioutavg (n) of the output current in n switch periods of the second end of inductance L 1 and n switch periods of inductance L 1 _lP(n) relation is shown below:

$\mathrm{Ioutavg}\left(n\right)=\frac{1}{2}\·I_{\mathrm{LP}}\left(n\right)---\left(6\right)$

The output current Iout that flows through inductance L 1 at each input half-sinusoid in cycle is:

$\mathrm{Iout}=\frac{\mathrm{Ioutavg}\left(1\right)\·T\left(1\right)+\mathrm{Ioutavg}\left(2\right)\·T\left(2\right)+...+\mathrm{Ioutavg}\left(n\right)\·T\left(n\right)}{\mathrm{Tac}}---\left(7\right)$

Wherein, T (1), T (2) and T (n) mean respectively first switch periods time, second switch periods time and n switch periods time, Tac means an input half-sinusoid cycle, wherein:

Tac=T(1)+T(2)+...+T(n) （8）

Output average current in output average current in output average current in the output average current of the second end that Ioutavg (1), Ioutavg (2), Ioutavg (3) and Ioutavg (n) mean respectively inductance L 1 in first switch periods, second switch periods, the 3rd switch periods and n switch periods.

Marriage relation formula (6), (7) and (8) can obtain:

$\mathrm{Iout}=\frac{I_{\mathrm{LP}}\left(1\right)\·T\left(1\right)+I_{\mathrm{LP}}\left(2\right)\·T\left(2\right)+...+I_{\mathrm{LP}}\left(n\right)\·T\left(n\right)}{2\·\mathrm{Tac}}---\left(9\right)$

Again because inductance L 1 in each switch periods peak current I _lP(n) be,

$I_{\mathrm{LP}}\left(n\right)=\frac{\mathrm{Vcs}\left(n\right)}{R1}---\left(10\right)$

V wherein _cS(n) mean the crest voltage of sampling resistor R1 when n switch periods.

Marriage relation formula (9) and (10) can obtain:

$\mathrm{Iout}=\frac{1}{2\&CenterDot;\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA00002426005800032.png,HDA00002426005800041.png"\; state="\{\{state\}\}">R</figure-callout>}1}\&CenterDot;\frac{\mathrm{Vcs}\left(1\right)\&CenterDot;T\left(1\right)+\mathrm{Vcs}\left(2\right)\&CenterDot;T\left(2\right)+...+\mathrm{Vcs}\left(n\right)\&CenterDot;T\left(n\right)}{\mathrm{Tac}}---\left(11\right)$

Wherein, V _cS(1), V _cSand V (2) _cS(n) mean respectively the crest voltage of resistance R 1 two ends in first switch periods, second switch periods, the 3rd switch periods and n switch periods.Constant for the average current that the second end that guarantees inductance L 1 is exported, only need to guarantee constant the getting final product of mean value at the crest voltage at input half-sinusoid sampling resistor R1 two ends in the cycle.

In conjunction with Fig. 4 and Fig. 5, sampling resistor R1 is sampled to obtain corresponding sampled voltage (being the voltage of the first end of sampling resistor R1) to the electric current I L that flows through inductance L 1, this sampled voltage carries out the error amplification by error amplifier U2, if sampled voltage is greater than the reference voltage V REF that the second reference voltage source 1041 is exported, the error that error amplifier U2 exports is amplified voltage V _cOMPreduce, so ON time control module 105 also makes pulse signal generation module 106 reduce the high level time of pulse signal Vg thereupon, NMOS manages the ON time of Q1 shortens, and then reach the purpose of the electric current that reduces to flow through sampling resistor R1, otherwise, if sampled voltage is less than the reference voltage V REF that the second reference voltage source 1041 is exported, make pulse signal generation module 106 increase the high level time of pulse signal Vg so that the ON time of NMOS pipe Q1 is elongated, and then reach the purpose that increases the electric current flow through sampling resistor R1, after the above-mentioned modulation repeatedly to NMOS pipe Q1 break-make, the characteristic of error amplifier has guaranteed that sampling resistor R1 equates with reference voltage V REF at the mean value of the crest voltage of each switch periods, that is:

$\mathrm{VREF}=\frac{\mathrm{Vcs}\left(1\right)\&CenterDot;T\left(1\right)+\mathrm{Vcs}\left(2\right)\&CenterDot;T\left(2\right)+...+\mathrm{Vcs}\left(n\right)\&CenterDot;T\left(n\right)}{2\&CenterDot;\mathrm{Tac}}---\left(12\right)$

Because VREF is fixing reference voltage, so sampling resistor R1 fixes at the mean value of the crest voltage of each switch periods, thereby reached the purpose of constant current control load 300.

In the utility model embodiment, comprise switching tube by employing, cross the zero balancing opening module, the error amplification module, the high power factor constant current control circuit of ON time control module and pulse signal generation module, carried out the unlatching of after zero balancing, correspondingly exporting comparative level signal driver pulse signal generation module control switch pipe by crossing the voltage of zero balancing opening module to sampling resistor R1 first end, the error amplification module carries out after the error amplification correspondingly output error to the voltage of sampling resistor R1 first end and amplifies voltage to the ON time control module, then amplified the shutoff of the feedback level signal output conducting control level signal driver pulse signal generation module control switch pipe that voltage and pulse signal generation module export according to this error by the ON time control module, thereby when realizing circuit reduction, power factor and voltage transitions efficiency have been improved, and do not need high-voltage electrolytic capacitor, in wider input voltage range, realized the constant current of load is controlled, solved the existing circuit structure complexity of prior art, cost is high and can't in wider input voltage range, realize the problem of High Power Factor and constant current output.

The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all any modifications of doing within spirit of the present utility model and principle, be equal to and replace and improvement etc., within all should being included in protection range of the present utility model.

Claims (6)

1. a high power factor constant current control circuit, with AC power, with load, be connected, comprise rectifier bridge, sampling resistor R1, capacitor C 2, diode D1 and output stage filtration module, described rectifier bridge is connected with described AC power, the negative electrode of the described diode D1 of the first termination of described sampling resistor R1, the second end of described sampling resistor R1 and the first end of described capacitor C 2 are connected to the input of described output stage filtration module altogether, the input of the described load of output termination of described output stage filtration module, the anode of the earth terminal of described rectifier bridge and described diode D1, the loop end of described output stage filtration module and the output of described load are connected to ground altogether, it is characterized in that, described high power factor constant current control circuit also comprises:

Switching tube, mistake zero balancing opening module, error amplification module, ON time control module and pulse signal generation module;

The input of described switching tube connects the output of described rectifier bridge, the input of the output of described switching tube and described zero balancing opening module excessively and the input of described error amplification module are connected to the first end of described sampling resistor R1 altogether, the described first input end of crossing the described pulse signal generation module of output termination of zero balancing opening module, the output of described error amplification module connects the first input end of described ON time control module and the second end of described capacitor C 2 simultaneously, the second input of described ON time control module and output are connected respectively signal feedback end and second input of described pulse signal generation module, the described earth terminal of zero balancing opening module and the earth terminal of described error amplification module crossed, the earth terminal of the earth terminal of described ON time control module and described pulse signal generation module is connected to the first end of described capacitor C 2 altogether, the described power end of zero balancing opening module and the power end of described error amplification module crossed, the power end of the power end of described ON time control module and described pulse signal generation module is connected to DC power supply altogether, the output of described pulse signal generation module connects the control end of described switching tube.

2. high power factor constant current control circuit as claimed in claim 1, is characterized in that, described switching tube is NMOS pipe Q1, and grid, drain electrode and the source electrode of described NMOS pipe Q1 are respectively control end, input and the output of described switching tube.

3. high power factor constant current control circuit as claimed in claim 1, it is characterized in that, the described zero balancing opening module of crossing comprises the first comparator and the first reference voltage source, the in-phase input end of described the first comparator, output, positive power source terminal and negative power end are respectively described input, output, power end and the earth terminal of crossing the zero balancing opening module, the output of described first reference voltage source of anti-phase input termination of described the first comparator.

4. high power factor constant current control circuit as claimed in claim 1, it is characterized in that, described error amplification module comprises error amplifier and the second reference voltage source, the in-phase input end of described error amplifier connects the output of described the second reference voltage source, and the inverting input of described error amplifier, output, positive power source terminal and negative power end are respectively input, output, power end and the earth terminal of described error amplification module.

5. high power factor constant current control circuit as claimed in claim 1, is characterized in that, described ON time control module comprises:

Current source, PMOS pipe Q2, NMOS pipe Q3, the first inverter, capacitor C 3 and the second comparator;

The power end that the input of described current source is described ON time control module, the output of described current source connects the source electrode of described PMOS pipe Q2, the drain electrode of the drain electrode of described PMOS pipe Q2 and described NMOS pipe Q3 and the first end of described capacitor C 3 are connected to the inverting input of described the second comparator altogether, the grid of the grid of described PMOS pipe Q2 and described NMOS pipe Q3 is connected to the output of described the first inverter altogether, the input of the described current source of positive supply termination of described the second comparator, the in-phase input end of described the second comparator, output and negative power end are respectively the first input end of described ON time control module, output and earth terminal, the second input that the input of described the first inverter is described ON time control module, the positive power source terminal of described the first inverter connects the input of described current source, the earth terminal that the common contact of the source electrode of the second end of described capacitor C 3 and described NMOS pipe Q3 and the negative power end of described the first inverter is described ON time control module.

6. high power factor constant current control circuit as claimed in claim 1, is characterized in that, described pulse signal generation module comprises:

The second inverter, rest-set flip-flop, the 3rd inverter, NMOS pipe Q4 and NMOS pipe Q5;

The first input end that the input of described the second inverter is described pulse signal generation module, the output of described the second inverter connects the first input end of described rest-set flip-flop, the second input of described rest-set flip-flop and the first output are respectively the second input and the signal feedback end of described pulse signal generation module, the second output sky of described rest-set flip-flop connects, the grid of the input of described the 3rd inverter and described NMOS pipe Q4 is connected to the first output of described rest-set flip-flop altogether, the power end that the common contact of the drain electrode of the positive power source terminal of the positive power source terminal of described the second inverter and described the 3rd inverter and described NMOS pipe Q4 is described pulse signal generation module, the output that the common contact of the drain electrode of the source electrode of described NMOS pipe Q4 and described NMOS pipe Q5 is described pulse signal generation module, the grid of described NMOS pipe Q5 connects the output of described the 3rd inverter, the earth terminal that the common contact of the source electrode of the negative power end of the negative power end of described the second inverter and described the 3rd inverter and described NMOS pipe Q5 is described pulse signal generation module.

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