CN208820464U - Overvoltage crowbar, integrated high voltage circuit and integrated low-voltage circuit - Google Patents
Overvoltage crowbar, integrated high voltage circuit and integrated low-voltage circuit Download PDFInfo
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- CN208820464U CN208820464U CN201821169113.4U CN201821169113U CN208820464U CN 208820464 U CN208820464 U CN 208820464U CN 201821169113 U CN201821169113 U CN 201821169113U CN 208820464 U CN208820464 U CN 208820464U
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Abstract
A kind of overvoltage crowbar, integrated high voltage circuit and integrated low-voltage circuit; the overvoltage crowbar includes: pwm signal generation module, electric resistance partial pressure module, powers on dump block, switch control module, comparator module and logic processing module; wherein: the pwm signal generation module, output end are coupled with the electric resistance partial pressure module and the dump block that powers on respectively；The electric resistance partial pressure module is coupled with the switch control module；It is described to power on dump block, it is coupled with the switch control module；The switch control module is coupled with the first input end of the comparator module；The comparator module, the second input terminal are suitable for input reference voltage signal；The logic processing module is coupled with the output end of the comparator module, and the overvoltage protection signal for exporting to the comparator module carries out logical process.Using above-mentioned overvoltage crowbar, power consumption and resistor area can be reduced.
Description
Technical field
The utility model relates to integrated circuit fields more particularly to a kind of overvoltage crowbars, integrated high voltage circuit and collection
At low-voltage circuit.
Background technique
With the rapid development of the applications such as electric car, electric bicycle, the application of integrated circuit becomes more and more extensive.
In Analogous Integrated Electronic Circuits, particularly with high-voltage power circuit, when chip input voltage fluctuates excessive, such as input voltage exceeds
When preset value, it is be easy to cause the damage of chip interior device, then damages chip.Therefore need to introduce overvoltage crowbar, it avoids
Wafer damage problem caused by input voltage fluctuation is excessive.
Existing overvoltage crowbar directly uses electric resistance partial pressure, and partial pressure branch is constantly on, and power consumption is big.For low
Voltage source, resistance is done greatly, i.e., resistor area, which is done, can suitably reduce greatly power consumption.For high voltage power supply (such as 40V or
Higher supply voltage), in order to guarantee lower circuit power consumption, such as the circuit power consumption of microampere (μ A) rank, need very big
Resistor area, cause the chip of normal area to be difficult to realize.Therefore existing overvoltage crowbar power consumption is larger or resistance face
Product is larger.
Utility model content
The technical issues of the utility model solves is how to reduce the power consumption and resistor area of overvoltage crowbar.
In order to solve the above technical problems, the utility model embodiment provides a kind of overvoltage crowbar, including pwm signal
Generation module, powers on dump block, switch control module, comparator module and logic processing module at electric resistance partial pressure module,
In: the pwm signal generation module, output end are coupled with the electric resistance partial pressure module and the dump block that powers on respectively；Institute
Electric resistance partial pressure module is stated, is coupled with the switch control module, for receiving the PWM letter of the pwm signal generation module output
Number, and generate sampled voltage signal and export to the switch control module；It is described to power on dump block, with the switch control mould
Block coupling, for generating high level reset signal and exporting to the switch control module, so that the sampled voltage signal drops
It is low；The switch control module is coupled with the first input end of the comparator module, for receiving the sampled voltage signal
With the reset signal, generates switching signal and export to the first input end of the comparator module；The comparator module,
Second input terminal is suitable for input reference voltage signal, for generating overvoltage protection signal；The logic processing module, with the ratio
Output end compared with device module couples, and the overvoltage protection signal for exporting to the comparator module carries out logical process.
Optionally, the electric resistance partial pressure module includes any of the following circuit: the first bleeder circuit and the second partial pressure electricity
Road, in which: first bleeder circuit includes: the first NMOS tube, first resistor, second resistance and 3rd resistor, in which: described
First NMOS tube, the grid of first NMOS tube and the pwm signal generation module couple, and access the pwm signal, institute
The source electrode ground connection of the first NMOS tube is stated, the drain electrode of first NMOS tube is coupled with the second port of the first resistor；It is described
The second port of first resistor, the first port of the first resistor and the second resistance, the switch control module couple；
The second port of the second resistance, the first port of the second resistance and the 3rd resistor couples；The 3rd resistor,
The first port of the 3rd resistor connects supply voltage；Second bleeder circuit includes: the 9th PMOS tube, the 5th resistance and
Six resistance, in which: the 9th PMOS pipe, the grid and the pwm signal generation module of the 9th PMOS tube are coupled, connect
Enter the PWM signal, the source electrode of the 9th PMOS tube accesses supply voltage, the drain electrode of the 9th PMOS tube and described the
The first port of six resistance couples；6th resistance, the second port of the 6th resistance and the first of the 5th resistance
Port, switch control module coupling；5th resistance, the second port ground connection of the 5th resistance.
Optionally, the switch control module includes: the second NMOS tube, third NMOS tube, the 4th NMOS tube, the 5th
NMOS tube, the 4th resistance, in which: second NMOS tube, the grid of second NMOS tube and the dump block that powers on
Output end coupling accesses the reset signal, the source electrode ground connection of second NMOS tube, the drain electrode of second NMOS tube and institute
State the second port coupling of the 4th resistance；4th resistance, the first port of the 4th resistance and the 3rd NMOS are managed
Drain electrode, the electric resistance partial pressure module couples；The third NMOS tube, the grid and the pwm signal of the third NMOS tube
Generation module coupling, accesses the pwm signal, and the source electrode of the 3rd NMOS pipe and the drain electrode of the 4th NMOS tube couple；
4th NMOS tube, the grid of the 4th NMOS tube and the first port for powering on dump block couple, and the described 4th
The drain electrode of the source electrode of NMOS tube and the 5th NMOS tube, the first input end of the comparator module couple；Described 5th
NMOS tube, the grid of the 5th NMOS tube and the second port for powering on dump block couple, the 5th NMOS tube
Source electrode ground connection.
Optionally, the dump block that powers on includes: the first phase inverter, the second phase inverter, third phase inverter, the 4th reverse phase
Device, the 5th phase inverter, NAND gate and the first metal-oxide-semiconductor, in which: first phase inverter, the input terminal of first phase inverter with
The first input end of the NAND gate, pwm signal generation module coupling, the output end of first phase inverter and described the
The input terminal of two phase inverters couples；Second phase inverter, the output end of second phase inverter and the third phase inverter
The grid coupling of input terminal, the first metal-oxide-semiconductor；First metal-oxide-semiconductor, the source electrode of first metal-oxide-semiconductor and first metal-oxide-semiconductor
Grounded drain；The third phase inverter, the output end of the third phase inverter are the second port for powering on clear circuit,
It is coupled with the input terminal of the 4th phase inverter, the second input terminal of the NAND gate, the switch control module；Described 4th
Phase inverter, the output end of the 4th phase inverter is the first port for powering on clear circuit, with the switch control module
Coupling；The input terminal of the NAND gate, the output end of the NAND gate and the 5th phase inverter couples；5th reverse phase
Device, the output end of the 5th phase inverter are the output end for powering on clear circuit, are coupled with the switch control module.
Optionally, the comparator module includes: the first PMOS tube, the second PMOS tube, the 3rd PMOS pipe, the 4th PMOS
Pipe, the 5th PMOS tube, the 6th PMOS tube, the 7th PMOS tube, the 8th PMOS tube, the 6th NMOS tube, the 7th NMOS tube, the 8th
NMOS tube, the 9th NMOS tube, the tenth NMOS tube, the 11st NMOS tube, the 12nd NMOS tube, the 13rd NMOS tube, the 14th
NMOS tube, in which: first PMOS tube, the source electrode of the source electrode of first PMOS tube and second PMOS tube, described the
The source electrode of three PMOS tube, the source electrode of the 4th PMOS tube, the source electrode of the 5th PMOS tube, the 6th PMOS tube source
The source electrode coupling of pole, the source electrode of the 7th PMOS tube, the 8th PMOS tube, connects supply voltage, first PMOS tube
Grid and the drain electrode of first PMOS tube, the drain electrode, described of the grid of second PMOS tube, the 11st NMOS pipe
The drain electrode of third PMOS tube couples；Second PMOS tube, the drain electrode of the 2nd PMOS pipe and the grid of the 4th PMOS tube
Pole, the drain electrode of the 4th PMOS tube, the grid of the third PMOS tube, the drain electrode of the 12nd NMOS tube, the described 8th
The drain electrode of PMOS tube, the grid coupling of the 5th PMOS tube；5th PMOS tube, the drain electrode of the 5th PMOS tube and institute
State the drain electrode of the 8th NMOS tube, the grid of the 6th PMOS tube, the 9th NMOS pipe grid, the 14th NMOS
The drain electrode of pipe couples；6th PMOS tube, it is the drain electrode of the 6th PMOS tube and the drain electrode of the 9th NMOS tube, described
The grid coupling of the grid of 7th PMOS tube, the tenth NMOS tube；7th PMOS tube, the drain electrode of the 7th PMOS tube
Drain electrode with the tenth NMOS tube couples, and is the output end of the comparator module；6th NMOS tube, the described 6th
The drain electrode of NMOS tube accesses bias current, the source electrode of the source electrode of the 6th NMOS tube and the 7th NMOS tube, the described 8th
The source electrode of NMOS tube, the source electrode of the 9th NMOS pipe, the source electrode of the tenth NMOS tube, the 13rd NMOS tube source
The source electrode coupling of pole, the 14th NMOS tube, ground connection, grid and the 13rd NMOS tube of the 6th NMOS tube
Drain electrode, the grid coupling of the grid of the 7th NMOS tube, the 8th NMOS tube；7th NMOS tube, the described 7th
The drain electrode of NMOS tube is coupled with the source electrode of the 11st NMOS tube, the source electrode of the 12nd NMOS tube；Described 11st
NMOS tube, the grid of the 11st NMOS tube is the first input end of the comparator module, with the switch control module
Coupling；12nd NMOS tube, the grid of the 12nd NMOS tube are the second input terminal of the comparator module, access
Reference signal；13rd NMOS tube, the grid and the switch control module, the described 14th of the 13rd NMOS tube
The grid of NMOS tube couples；The 8th PMOS pipe, the grid and the pwm signal generation module coupling of the 8th PMOS tube
It connects, accesses the PWM signal.
Optionally, the overvoltage crowbar further include: be set to the pwm signal generation module and the electric resistance partial pressure
Voltage transformation module between module；The voltage transformation module, for will the PWM signal generator module output described in
The amplitude of pwm signal is converted to preset range.
The utility model embodiment provides a kind of integrated high voltage circuit, including overvoltage protection described in any of the above embodiments electricity
Road.
The utility model embodiment provides a kind of integrated low-voltage circuit, including overvoltage protection described in any of the above embodiments electricity
Road.
Compared with prior art, the technical solution of the utility model embodiment has the advantages that
Overvoltage crowbar provided by the embodiment of the utility model, the pwm signal generated by pwm signal generation module
Electric resistance partial pressure module is controlled, when pwm signal is high level, the conducting of electric resistance partial pressure module branch；When pwm signal is low level
When, electric resistance partial pressure module branch is not turned on, power consumption is not consumed, thus it is electric in overvoltage crowbar provided by the embodiment of the utility model
The resistor area of resistance division module can be made small and keep overall power lower simultaneously.
Further, it is coupled by the grid of the 8th PMOS tube and pwm signal generation module, accesses PWM signal, can make
It obtaining only when pwm signal is high level, comparator module work, when pwm signal is low level, comparator module does not work,
Power consumption is not consumed, so as to further decrease the power consumption of overvoltage crowbar.
Further, PMOS tube substrate connects power supply, NMOS tube Substrate ground, and circuit realizes that simply can be promoted prevents circuit
Into the performance of latch (Latch Up).
Further, by voltage transformation module, the safety and reliability of overvoltage crowbar can be improved.
Detailed description of the invention
Fig. 1 is a kind of schematic diagram of overvoltage crowbar provided by the embodiment of the utility model；
Fig. 2 is the schematic diagram of a kind of electric resistance partial pressure module and switch control module provided by the embodiment of the utility model；
Fig. 3 is a kind of schematic diagram for powering on dump block provided by the embodiment of the utility model；
Fig. 4 is that the sequential relationship of reset signal EN_POR and pwm signal EN provided by the embodiment of the utility model a kind of is shown
It is intended to；
Fig. 5 is a kind of schematic diagram of comparator module provided by the embodiment of the utility model；
Fig. 6 is the schematic diagram of another electric resistance partial pressure module and switch control module provided by the embodiment of the utility model；
Fig. 7 is a kind of schematic diagram of the workflow of overvoltage crowbar provided by the embodiment of the utility model；
Fig. 8 is a kind of sequential relationship schematic diagram of overvoltage crowbar provided by the embodiment of the utility model.
Specific embodiment
Existing overvoltage crowbar directly uses electric resistance partial pressure, and partial pressure branch is constantly on, and power consumption is big.For low
Voltage source, resistance is done greatly, i.e., resistor area, which is done, can suitably reduce greatly power consumption.For high voltage power supply (such as 40V or
Higher supply voltage), in order to guarantee lower circuit power consumption, such as the circuit power consumption of microampere (μ A) rank, need very big
Resistor area so that existing chip needs are balanced in resistor area and power consumption, it is difficult to while realize that area is small and function
Consume low two big characteristic.
Overvoltage crowbar provided by the embodiment of the utility model, the pwm signal control generated by pwm signal generation module
Electric resistance partial pressure module processed, when pwm signal is high level, the conducting of electric resistance partial pressure module branch；When pwm signal is low level,
Electric resistance partial pressure module branch is not turned on, and does not consume power consumption, therefore resistance in overvoltage crowbar provided by the embodiment of the utility model
The resistor area of division module can be made small and keep overall power lower simultaneously.
It is understandable to enable the above-mentioned purpose, feature and beneficial effect of the utility model to become apparent, with reference to the accompanying drawing
Specific embodiment of the utility model is described in detail.
Referring to Fig. 1, the utility model embodiment provides a kind of overvoltage crowbar, comprising: pwm signal generation module
11, electric resistance partial pressure module 12, power on dump block 13, switch control module 14, comparator module 15 and logic processing module 16,
Wherein:
The pwm signal generation module 11, output end respectively with the electric resistance partial pressure module 12 and described power on clearing mould
Block 13 couples；
The electric resistance partial pressure module 12 is coupled with the switch control module 14, is generated for receiving the PWM signal
The pwm signal that module 11 exports, and generate sampled voltage signal and export to the switch control module 14；
It is described to power on dump block 13, it is coupled with the pwm signal generation module 11, inputs PWM signal；It is opened with described
It closes control module 14 to couple, for generating high level reset signal and exporting to the switch control module 14, so that described adopt
Sample voltage signal reduces；
The switch control module 14 is coupled with the first input end of the comparator module 15, for receiving described adopt
Sample voltage signal and the reset signal generate switching signal and export to the first input end of the comparator module 15；
The comparator module 15, the second input terminal is suitable for input reference voltage signal, for generating overvoltage protection signal；
The logic processing module 16 is coupled with the output end of the comparator module 15, for the comparator mould
The overvoltage protection signal that block 15 exports carries out logical process.
In specific implementation, the pwm signal generation module 11 generates pulse width and modulates (Pulse Width
Modulation, PWM) after signal, output to the electric resistance partial pressure module 12 and described power on dump block 13.In the PWM
Under the control of signal, the electric resistance partial pressure module 12 can produce sampled voltage signal and export to the switch control module
14；The dump block 13 that powers on can generate an of short duration height before the unlatching of the switch of the switch control module 14
Level reset signal makes the sampled voltage signal reduce and (drag down described using voltage signal), prevents the mistake of supply voltage
Punching or power supply high-voltage transmission to the comparator module 15 first input end.The comparator module 15 is electric by the sampling
Pressure signal and reference voltage signal compare, and generate overvoltage protection signal.
Electric resistance partial pressure module is controlled by the pwm signal that pwm signal generation module generates, can only to work as pwm signal
When for high level, electric resistance partial pressure module branch ability ON operation, when pwm signal is low level, electric resistance partial pressure module branch is not
Conducting, does not consume power consumption.Therefore the power consumption of overvoltage crowbar can be effectively reduced by pwm signal, overall power is left in 1 μ A
It is right.Meanwhile the pwm signal control generated by pwm signal generation module powers on dump block, can protect overvoltage crowbar
Normal work.
In specific implementation, by adjusting the frequency of pwm signal, different monitoring frequencies may be implemented.
In specific implementation, the electric resistance partial pressure module 22 includes any of the following circuit: the first bleeder circuit and
Two bleeder circuits, in which: first bleeder circuit is as shown in Fig. 2, the second voltage branch is as shown in Figure 6.
In specific implementation, as shown in Fig. 2, the electric resistance partial pressure module 22 may include: the first NMOS pipe TN1, first
Resistance R1, second resistance R2 and 3rd resistor R3, in which:
The grid of TN1, TN1 and the pwm signal generation module couple, and access the pwm signal EN, the source electrode of TN1 connects
Ground (GND), the drain electrode of TN1 are coupled with the second port of R1.
The first port and the second port of R2, the switch control module of R1, R1 couple.
The first port of R2, R2 and the second port of R3 couple；
The first port of R3, R3 meet supply voltage (VDD).
In specific implementation, as shown in Fig. 2, the switch control module 24 may include: the 2nd NMOS pipe TN2, third
NMOS tube TN3, the 4th NMOS tube TN4, the 5th NMOS tube TN5, the 4th resistance R4, in which:
The grid of TN2, TN2 and the output end (EN_POR) for powering on dump block couple, and access the reset signal
The source electrode of EN_POR, TN2 are grounded (GND), and the drain electrode of TN2 is coupled with the second port of R4.
The first port of R4, R4 and drain electrode, the electric resistance partial pressure module couples of TN3.
In an embodiment of the utility model, the drain electrode of the first port of R4 and TN3, the first port of R1, R2 second
Port coupling.
The grid of TN3, TN3 and the pwm signal generation module couple, and access the pwm signal EN, the source electrode of TN3 with
The drain electrode of TN4 couples.
The grid of TN4, TN4 correspond to EN1, couple with the first port (EN1) for powering on dump block；The source electrode of TN4
The first input end of drain electrode, the comparator module with TN5 couples.
The grid of TN5, TN5 correspond to EN1B, couple with the second port (EN1B) for powering on dump block, the source of TN5
Pole is grounded (GND).
In the electric resistance partial pressure module 22 shown in Fig. 2 and the switch control module 24, the grid of TN1 inputs PWM
The source electrode of signal EN, TN4 export sampled voltage signal VDD_SAMPLE.TN2 and R4 is the control device of dump block, TN2's
The reset signal EN_POR of dump block generation is powered on described in grid input.
When the rising edge of EN comes, EN_POR can generate (the similar electrification reset pulse of an of short duration high level signal
Signal), this signal is as reset signal.
When EN is high level, 22 branch of the electric resistance partial pressure module conducting obtains VDD_DIV voltage signal, when described
When switch control module 24 is opened, the source electrode that VDD_DIV voltage signal is transmitted to TN4 is exported.
TN3, TN4 and TN5 are switch control device, control EN1 signal and EN1B signal draws from the dump block that powers on
Out, the stabilization of holding circuit.Wherein EN1 signal and EN signal are the same as frequency, the delayed phase of EN1 signal；EN1B signal and EN1 letter
Number with same frequency and reversed-phase.
In specific implementation, as shown in figure 3, the dump block that powers on includes: the first phase inverter INV1, the second phase inverter
INV2, third phase inverter INV3, the 4th phase inverter INV4, the 5th phase inverter INV5, NAND gate NAND1 and the first metal-oxide-semiconductor M1,
In:
The output end coupling of the first input end, the pwm signal generation module of the input terminal and NAND1 of INV1, INV1,
The output end of INV1 and the input terminal of INV2 couple.
The grid coupling of the input terminal, M1 of the output end and INV3 of INV2, INV2.
The source electrode of M1, M1 and the grounded drain (GND) of M1.
The output end of INV3, INV3 are the second port (EN1B) for powering on dump block, with the input terminal of INV4,
The second input terminal of NAND1, switch control module coupling.
In an embodiment of the utility model, the input terminal of the output end of INV3 and INV4, NAND1 the second input terminal,
The grid of the TN5 of Fig. 2 couples.
The output end of INV4, INV4 are the first port (EN1) for powering on dump block, with the switch control module
Coupling.
In an embodiment of the utility model, the grid coupling of the TN4 of the output end and Fig. 2 of INV4.
The output end of INV5, INV5 are reset signal (EN_POR), and described for the output end for powering on dump block
Switch control module coupling.
In an embodiment of the utility model, the grid coupling of the TN2 of the output end and Fig. 2 of INV5.
Using it is shown in Fig. 3 it is described power on dump block, the reset signal timing diagram of generation is as shown in figure 4, wherein 4-1 is
The timing diagram of pwm signal EN, 4-2 are the timing diagram of reset signal EN_POR, and Td is the period of pwm signal.
As seen from Figure 4, pwm signal EN is consistent with the period of reset signal EN_POR, but duty ratio is inconsistent.
In specific implementation, when the rising edge of EN signal arrives, EN_POR is high level.When EN_POR is high level
When, the VDD_DIV in Fig. 2 can be dragged down, not detect whether overvoltage protection at this time, overshoot can be eliminated.
In specific implementation, as shown in figure 5, the comparator module may include: the first PMOS tube, the second PMOS tube,
Third PMOS tube, the 4th PMOS tube, the 5th PMOS tube, the 6th PMOS pipe, the 7th PMOS tube, the 8th PMOS tube, the 6th NMOS
Pipe, the 7th NMOS tube, the 8th NMOS tube, the 9th NMOS tube, the tenth NMOS tube, the 11st NMOS tube, the 12nd NMOS pipe, the
13 NMOS tubes, the 14th NMOS tube, in which:
The source electrode and the source electrode of TP2 of TP1, TP1, the source electrode of TP3, the source electrode of TP4, the source electrode of TP5, TP6 source electrode, TP7
Source electrode, TP8 source electrode coupling, meet supply voltage VDD, the drain electrode of grid and TP1 of TP1, the grid of TP2, TN11 drain electrode,
The drain electrode of TP3 couples.
The drain electrode and the drain electrode of grid, TP4, the grid of TP3, the drain electrode of TN12, the drain electrode of TP8, TP5 of TP4 of TP2, TP2
Grid coupling.
The drain electrode of TP5, TP5 and the drain electrode of the drain electrode of TN8, the grid of TP6, the grid of TN9, TN14 couple.
The drain electrode of TP6, TP6 and the grid of the drain electrode of TN9, the grid of TP7, TN10 couple.
The drain electrode of TP7, TP7 are coupled with the drain electrode of TN10, are the output end OVP of the comparator module.
The drain electrode of TN6, TN6 access bias current (IBIAS), source electrode and the source electrode of TN7, the source electrode of TN8, the TN9 of TN6
Source electrode, the source electrode of TN10, the source electrode of TN13, TN14 source electrode couple and be grounded, the drain electrode of the grid and TN13 of TN6, TN7
The grid coupling of grid, TN8.
The drain electrode of TN7, TN7 are coupled with the source electrode of TN11, the source electrode of TN12.
The grid of TN11, TN11 are the first input end of the comparator module, access sampled voltage signal VDD_
SAMPLE is coupled with the switch control module.
The grid of TN12, TN12 are the second input terminal of the comparator module, access reference voltage signal VREF.
The grid (ENB) of TN13, TN13 and grid (ENB), the switch control module of TN14 couple, and wherein ENB believes
Number be EN signal same frequency reverse signal.
In specific implementation, the grid of TN13, TN14 grid can pass through phase inverter and the switch control module coupling
It connects.
The grid of TP8, TP8 and the pwm signal generation module couple, and access the pwm signal EN.
Using the comparator module shown in fig. 5, input signal is sampled voltage signal VDD_SAMPLE and with reference to electricity
Press signal VREF, output over-voltage protection signal OVP.Meanwhile the enable signal of the module is produced from the pwm signal generation module
Raw pwm signal EN can make only when pwm signal is high level, the comparator module work, so as to further
Save power consumption.
In specific implementation, VDD_SAMPLE is compared by the comparator module with VREF, if VDD_SAMPLE
Value is greater than VREF value, then overvoltage protection signal is high level, and circuit answers overvoltage protection at this time, and of short duration high level signal is passed through
Subsequent processing, such as the processing of logic module obtain final overvoltage protection signal, realize over-voltage protecting function.If VDD_
SAMPLE value is less than VREF value, and circuit then continues to work normally, and waits next PWM cycle signal interim, continuing to test is
No overvoltage protection closes the signal of overvoltage protection until detecting.
In specific implementation, as shown in fig. 6, the electric resistance partial pressure module 62 can also include: the 9th PMOS pipe TP9,
Five resistance R5 and the 6th resistance R6, in which:
The grid of TP9, TP9 and the pwm signal generation module couple, and access the pwm signal EN, the source electrode of TP9 connects
Enter supply voltage (VDD), the drain electrode of TP9 is coupled with the first port of R6.
The second port and the first port of R5, the switch control module of R6, R6 couple.
In an embodiment of the utility model, the second port of R6 and the first port of R5, the first port of R4, TN2
Drain electrode coupling.
The second port of R5, R5 are grounded (GND).
The working principle of the voltage grouping module 62 may refer to retouching in the embodiment of the electric resistance partial pressure module 22
It states, details are not described herein again.
In specific implementation, the pwm signal of the pwm signal generation module output may be inconsistent with VDD current potential, when
When pwm signal and VDD current potential are inconsistent, it can be arranged between the pwm signal generation module and the electric resistance partial pressure module
Voltage transformation module (not shown).The voltage transformation module (Level Shifter), for the pwm signal to be generated mould
The amplitude of the pwm signal of block output is converted to preset range.
By voltage transformation module, the safety and reliability of overvoltage crowbar can be improved.
In specific implementation, the substrate of the PMOS tube in above-described embodiment can be connect to power supply, the substrate of NMOS pipe connects
Ground.
PMOS tube substrate connects power supply, NMOS tube Substrate ground, and circuit realizes that simply can be promoted prevents circuit from entering latch
The performance of (Latch Up).
Using above-mentioned overvoltage crowbar, electric resistance partial pressure mould is controlled by the pwm signal that pwm signal generation module generates
Block, when pwm signal is high level, the conducting of electric resistance partial pressure module branch；When PWM signal is low level, electric resistance partial pressure module
Branch is not turned on, and does not consume power consumption, thus in overvoltage crowbar provided by the embodiment of the utility model electric resistance partial pressure module electricity
Resistance area can be made small and keep overall power lower simultaneously.
To more fully understand those skilled in the art and implementing the utility model, the utility model embodiment provides one
The work flow diagram of kind overvoltage crowbar, as shown in Figure 7.
Referring to Fig. 7, the workflow of the overvoltage crowbar be may include steps of:
Step S701, voltage source rise, circuit start.
Step S702, pwm signal enable circuit.
Step S703 powers on dump block and generates reset signal.
Step S704, comparator module judge whether over-voltage, that is, judge whether sampled voltage signal is greater than reference voltage letter
Number, step S705 is executed when being judged as over-voltage, it is no to then follow the steps S702.
Step S705, logic processing module handle overvoltage protection signal.
Step S706, output over-voltage protection signal.
To more fully understand those skilled in the art and implementing the utility model, the utility model embodiment provides one
The timing diagram of kind overvoltage crowbar, as shown in Figure 8.
Referring to Fig. 8, using the overvoltage crowbar that above-described embodiment describes, when supply voltage AVDD rises to 50V from 0V
When, generate overvoltage protection signal.
In specific implementation, according to the size of AVDD, the overvoltage crowbar can be at under-voltage condition, normal voltage shape
State and overvoltage condition.
When the overvoltage crowbar is in under-voltage condition or normal voltage state, system worked well, the mistake
The comparator of voltage protection circuit exports low level signal.
When the overvoltage crowbar is in overvoltage condition, the corresponding detection of comparator output of the overvoltage crowbar
Pwm signal, that is, occur high level prompt over-voltage.
In specific implementation, VDD can be any voltage value, for example, 45V.
In specific implementation, the second input terminal VREF of the comparator can be determined by VDD and its partial pressure coefficient, i.e.,
VREF=VDDx β, wherein β is partial pressure coefficient.For example, VDD is 40V, partial pressure coefficient is 1/20, then having VREF is 2V.
The utility model embodiment provides a kind of integrated high voltage circuit, including the electricity of overvoltage protection described in any of the above-described kind
Road.
The utility model embodiment provides a kind of integrated low-voltage circuit, including the electricity of overvoltage protection described in any of the above-described kind
Road.
Although the utility model discloses as above, the utility model is not limited to this.Anyone skilled in the art,
It does not depart from the spirit and scope of the utility model, can make various changes or modifications, therefore the protection scope of the utility model
It should be defined by the scope defined by the claims..
Claims (8)
1. a kind of overvoltage crowbar characterized by comprising pwm signal generation module, powers on clearing at electric resistance partial pressure module
Module, switch control module, comparator module and logic processing module, in which:
The pwm signal generation module, output end are coupled with the electric resistance partial pressure module and the dump block that powers on respectively；
The electric resistance partial pressure module is coupled with the switch control module, for receiving the pwm signal generation module output
Pwm signal, and generate sampled voltage signal and export to the switch control module；
It is described to power on dump block, it is coupled with the switch control module, for generating high level reset signal and exporting to institute
Switch control module is stated, so that the sampled voltage signal reduces；
The switch control module is coupled with the first input end of the comparator module, for receiving the sampled voltage letter
Number and the reset signal, generate switching signal simultaneously export to the comparator module first input end；
The comparator module, the second input terminal is suitable for input reference voltage signal, for generating overvoltage protection signal；
The logic processing module is coupled with the output end of the comparator module, for what is exported to the comparator module
Overvoltage protection signal carries out logical process.
2. overvoltage crowbar according to claim 1, which is characterized in that the electric resistance partial pressure module includes following any
A kind of circuit: the first bleeder circuit and the second bleeder circuit, in which:
First bleeder circuit includes: the first NMOS tube, first resistor, second resistance and 3rd resistor, in which:
First NMOS tube, the grid of first NMOS tube and the pwm signal generation module couple, and access the PWM
Signal, the source electrode ground connection of first NMOS tube, the drain electrode of first NMOS tube and the second port coupling of the first resistor
It connects；
The first resistor, second port, the switch control of the first port of the first resistor and the second resistance
Module couples；
The second port of the second resistance, the first port of the second resistance and the 3rd resistor couples；
The first port of the 3rd resistor, the 3rd resistor connects supply voltage；
Second bleeder circuit includes:
9th PMOS tube, the 5th resistance and the 6th resistance, in which:
9th PMOS tube, the grid and the pwm signal generation module of the 9th PMOS tube couple, and access the PWM
Signal, the source electrode of the 9th PMOS tube access supply voltage, and the of the drain electrode of the 9th PMOS tube and the 6th resistance
Single port coupling；
6th resistance, the second port of the 6th resistance and first port, the switch control of the 5th resistance
Module couples；
5th resistance, the second port ground connection of the 5th resistance.
3. overvoltage crowbar according to claim 1, which is characterized in that the switch control module includes: second
NMOS tube, third NMOS tube, the 4th NMOS tube, the 5th NMOS tube, the 4th resistance, in which:
Second NMOS tube, the grid of second NMOS tube and the output end for powering on dump block couple, and access institute
State reset signal, the source electrode ground connection of second NMOS tube, the drain electrode of second NMOS tube and the second of the 4th resistance
Port coupling；
4th resistance, the drain electrode of the first port and the third NMOS tube of the 4th resistance, the electric resistance partial pressure mould
Block coupling；
The third NMOS tube, the grid of the third NMOS tube and the pwm signal generation module couple, and access the PWM
The drain electrode of signal, the source electrode of the third NMOS tube and the 4th NMOS tube couples；
4th NMOS tube, the grid of the 4th NMOS tube and the first port for powering on dump block couple, described
The drain electrode of the source electrode of 4th NMOS tube and the 5th NMOS tube, the first input end of the comparator module couple；
5th NMOS tube, the grid of the 5th NMOS tube and the second port for powering on dump block couple, described
The source electrode of 5th NMOS tube is grounded.
4. overvoltage crowbar according to claim 1, which is characterized in that the dump block that powers on includes: first anti-
Phase device, the second phase inverter, third phase inverter, the 4th phase inverter, the 5th phase inverter, NAND gate and the first metal-oxide-semiconductor, in which:
First phase inverter, the input terminal of first phase inverter and first input end, the pwm signal of the NAND gate
The input terminal of generation module coupling, the output end of first phase inverter and second phase inverter couples；
Second phase inverter, the input terminal of the output end of second phase inverter and the third phase inverter, the first metal-oxide-semiconductor
Grid coupling；
First metal-oxide-semiconductor, the grounded drain of the source electrode of first metal-oxide-semiconductor and first metal-oxide-semiconductor；
The third phase inverter, the output end of the third phase inverter are the second port for powering on clear circuit, and described
The input terminal of 4th phase inverter, the second input terminal of the NAND gate, switch control module coupling；
4th phase inverter, the output end of the 4th phase inverter are the first port for powering on clear circuit, and described
Switch control module coupling；
The input terminal of the NAND gate, the output end of the NAND gate and the 5th phase inverter couples；
5th phase inverter, the output end of the 5th phase inverter are the output end for powering on clear circuit, are opened with described
Close control module coupling.
5. overvoltage crowbar according to claim 1, which is characterized in that the comparator module includes:
First PMOS tube, the second PMOS tube, third PMOS tube, the 4th PMOS tube, the 5th PMOS tube, the 6th PMOS tube, the 7th
PMOS tube, the 8th PMOS tube, the 6th NMOS tube, the 7th NMOS tube, the 8th NMOS tube, the 9th NMOS tube, the tenth NMOS tube, the tenth
One NMOS tube, the 12nd NMOS tube, the 13rd NMOS tube, the 14th NMOS tube, in which:
The source electrode of first PMOS tube, the source electrode of first PMOS tube and second PMOS tube, the third PMOS tube
Source electrode, the source electrode of the 4th PMOS tube, the source electrode of the 5th PMOS tube, the source electrode of the 6th PMOS tube, described
The source electrode coupling of the source electrode of seven PMOS tube, the 8th PMOS tube, connects supply voltage, the grid of first PMOS tube with it is described
The drain electrode of first PMOS tube, the grid of second PMOS tube, the drain electrode of the 11st NMOS tube, the third PMOS tube
Drain electrode coupling；
Second PMOS tube, the drain electrode of second PMOS tube and grid, the 4th PMOS tube of the 4th PMOS tube
The drain electrode, grid of the third PMOS tube, the drain electrode of the 12nd NMOS tube, the drain electrode of the 8th PMOS tube, described
The grid of 5th PMOS tube couples；
5th PMOS tube, the drain electrode of the 5th PMOS tube and drain electrode, the 6th PMOS tube of the 8th NMOS tube
Grid, the grid of the 9th NMOS tube, the 14th NMOS tube drain electrode coupling；
6th PMOS tube, the drain electrode of the 6th PMOS tube and drain electrode, the 7th PMOS tube of the 9th NMOS tube
Grid, the tenth NMOS tube grid coupling；
7th PMOS tube, the drain electrode of the 7th PMOS tube are coupled with the drain electrode of the tenth NMOS tube, are the comparison
The output end of device module；
The drain electrode of 6th NMOS tube, the 6th NMOS tube accesses bias current, the source electrode of the 6th NMOS tube and institute
State the source electrode of the 7th NMOS tube, the source electrode of the 8th NMOS tube, the source electrode of the 9th NMOS tube, the tenth NMOS tube
The source electrode coupling of source electrode, the source electrode of the 13rd NMOS tube, the 14th NMOS tube, ground connection, the 6th NMOS tube
Grid and the drain electrode of the 13rd NMOS tube, the grid coupling of the grid of the 7th NMOS tube, the 8th NMOS tube；
7th NMOS tube, the 7th NMOS tube drain and the source electrode of the 11st NMOS tube, the described 12nd
The source electrode of NMOS tube couples；
11st NMOS tube, the grid of the 11st NMOS tube is the first input end of the comparator module, with institute
State switch control module coupling；
12nd NMOS tube, the grid of the 12nd NMOS tube are the second input terminal of the comparator module, access
Reference signal；
13rd NMOS tube, the grid and the switch control module, the 14th NMOS of the 13rd NMOS tube
The grid of pipe couples；
8th PMOS tube, the grid and the pwm signal generation module of the 8th PMOS tube couple, and access the PWM
Signal.
6. overvoltage crowbar according to any one of claims 1 to 5, which is characterized in that further include:
The voltage transformation module being set between the pwm signal generation module and the electric resistance partial pressure module；The voltage turns
Block is changed the mold, the amplitude of the pwm signal for exporting the pwm signal generation module is converted to preset range.
7. a kind of integrated high voltage circuit, which is characterized in that including overvoltage crowbar such as claimed in any one of claims 1 to 6.
8. a kind of integrated low-voltage circuit, which is characterized in that including overvoltage crowbar such as claimed in any one of claims 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821169113.4U CN208820464U (en) | 2018-07-20 | 2018-07-20 | Overvoltage crowbar, integrated high voltage circuit and integrated low-voltage circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821169113.4U CN208820464U (en) | 2018-07-20 | 2018-07-20 | Overvoltage crowbar, integrated high voltage circuit and integrated low-voltage circuit |
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| Publication Number | Publication Date |
|---|---|
| CN208820464U true CN208820464U (en) | 2019-05-03 |
Family
ID=66271373
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821169113.4U Active CN208820464U (en) | 2018-07-20 | 2018-07-20 | Overvoltage crowbar, integrated high voltage circuit and integrated low-voltage circuit |
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| Country | Link |
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| CN (1) | CN208820464U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106645892A (en) * | 2016-09-09 | 2017-05-10 | 广东欧珀移动通信有限公司 | Over-voltage detection circuit |
| CN115412083A (en) * | 2022-11-02 | 2022-11-29 | 江苏润石科技有限公司 | High-isolation T-type analog switch and control circuit thereof |
| CN116298481A (en) * | 2023-05-18 | 2023-06-23 | 无锡力芯微电子股份有限公司 | Ultra-low power consumption overvoltage detection circuit |
-
2018
- 2018-07-20 CN CN201821169113.4U patent/CN208820464U/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106645892A (en) * | 2016-09-09 | 2017-05-10 | 广东欧珀移动通信有限公司 | Over-voltage detection circuit |
| CN115412083A (en) * | 2022-11-02 | 2022-11-29 | 江苏润石科技有限公司 | High-isolation T-type analog switch and control circuit thereof |
| CN116298481A (en) * | 2023-05-18 | 2023-06-23 | 无锡力芯微电子股份有限公司 | Ultra-low power consumption overvoltage detection circuit |
| CN116298481B (en) * | 2023-05-18 | 2023-08-15 | 无锡力芯微电子股份有限公司 | Ultra-low power consumption overvoltage detection circuit |
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