CN208738235U - Fan-out-type antenna packages structure - Google Patents

Fan-out-type antenna packages structure Download PDF

Info

Publication number
CN208738235U
CN208738235U CN201821346487.9U CN201821346487U CN208738235U CN 208738235 U CN208738235 U CN 208738235U CN 201821346487 U CN201821346487 U CN 201821346487U CN 208738235 U CN208738235 U CN 208738235U
Authority
CN
China
Prior art keywords
layer
metal
antenna
connecting column
metal connecting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201821346487.9U
Other languages
Chinese (zh)
Inventor
陈彦亨
林正忠
吴政达
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SJ Semiconductor Jiangyin Corp
Original Assignee
SJ Semiconductor Jiangyin Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SJ Semiconductor Jiangyin Corp filed Critical SJ Semiconductor Jiangyin Corp
Priority to CN201821346487.9U priority Critical patent/CN208738235U/en
Priority to US16/267,061 priority patent/US10777516B2/en
Application granted granted Critical
Publication of CN208738235U publication Critical patent/CN208738235U/en
Priority to US16/992,016 priority patent/US11289435B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Variable-Direction Aerials And Aerial Arrays (AREA)

Abstract

The utility model provides a kind of fan-out-type antenna packages structure, and the encapsulating structure includes: re-wiring layer;The first metal connecting column on the second face of re-wiring layer;First antenna metal layer on the first metal connecting column;The semiconductor chip being electrically connected with re-wiring layer;Cover re-wiring layer, the first metal connecting column, first antenna metal layer and semiconductor chip and the first encapsulated layer for appearing first antenna metal layer and adhesive layer;The second metal connecting column on first antenna metal layer;The second antenna metal layer being electrically connected on the second metal connecting column and with the second metal connecting column;Cover the second metal connecting column and the second antenna metal layer and the second encapsulated layer for appearing the second antenna metal layer;And the metal coupling positioned at the first face of re-wiring layer.The utility model realizes the integration of stacked antenna metal layer, effectively diminution encapsulation volume, integrated level with higher and electrical stability.

Description

Fan-out-type antenna packages structure
Technical field
The utility model relates to technical field of semiconductor encapsulation, more particularly to a kind of fan-out-type antenna packages structure.
Background technique
It is more inexpensive, more reliable, faster and more highdensity circuit be integrated antenna package pursue target.In future, Integrated antenna package will improve the integration density of various electronic components by constantly reducing minimum feature size.Currently, often Packaging method includes: wafer level chip scale encapsulation (Wafer Level Chip Scale Packaging, WLCSP), Fan-out-type wafer-level packaging (Fan-Out Wafer Level Package, FOWLP), flip-chip (Flip Chip), lamination Encapsulate (Package on Package, POP) etc..Wherein, fan-out-type wafer-level packaging is due to its input/output end port (I/ O) more, integrated flexibility is preferable, it has also become one of packaging method relatively advanced at present.
With universal and people's demand the increase of high-tech electronic product, especially for the mobile need of cooperation people It asks, currently, high-tech electronic product both increases the function of wireless telecommunications mostly.
In general, existing antenna structure is usually the surface that antenna is directly made in circuit board, this practice meeting Antenna is allowed to occupy additional board area, conformability is poor.For various high-tech electronic products, biggish electricity is used Road plate indicates that high-tech electronic product occupies biggish volume, this is with people to the miniaturization of high-tech electronic product, convenient The demand of formula is disagreed, and therefore, how to reduce the area of circuit board shared by antenna, reduces the volume of antenna packages structure to improve The integration performance of antenna packages structure will be overcome the problems, such as needed for these electronic devices.
In consideration of it, it is necessary to design a kind of face that new fan-out-type antenna packages structure occupies circuit board for solving antenna The caused above-mentioned technical problem of product.
Utility model content
In view of the foregoing deficiencies of prior art, the purpose of this utility model is to provide a kind of fan-out-type antenna packages Structure, occupies the area of circuit board for solving antenna in the prior art, and caused antenna packages structural volume is big, conformability The problem of difference.
In consideration of it, the utility model provides a kind of fan-out-type antenna packages structure, comprising:
Re-wiring layer, the re-wiring layer include opposite the first face and the second face;
First metal connecting column electrically connects on the second face of the re-wiring layer, and with the re-wiring layer It connects;
First antenna metal layer is located on the first metal connecting column, and electrically connects with the first metal connecting column It connects;
Semiconductor chip is electrically connected on the second face of the re-wiring layer, and with the re-wiring layer;
First encapsulated layer covers the re-wiring layer, the first metal connecting column, first antenna metal layer and semiconductor core Piece, and first encapsulated layer appears the first antenna metal layer and is bonded in the adhesive layer of the semiconductor chip;
Second metal connecting column is located on the first antenna metal layer, and electrically connects with the first antenna metal layer It connects;
Second antenna metal layer is located on the second metal connecting column, and electrically connects with the second metal connecting column It connects;
Second encapsulated layer covers the second metal connecting column and the second antenna metal layer, and second encapsulated layer is aobvious Reveal the second antenna metal layer;And
Metal coupling, on the first face of the re-wiring layer.
Optionally, the semiconductor chip further includes the chip metal being connected with the contact pad of the semiconductor chip Portion, the chip metal portion includes one of metal column and metal ball.
Optionally, the side in the chip metal portion is coated by the re-wiring layer.
Optionally, the adhesive layer includes one of epoxy resin layer and polymer film layer.
It optionally, further include the connection of the first metal between the first metal connecting column and the first antenna metal layer Block, and the cross-sectional area of the first metal link block is greater than the first metal connecting column;The second metal connecting column with It further include the second metal link block between the second antenna metal layer, and the cross-sectional area of the second metal link block is greater than The second metal connecting column.
Optionally, first encapsulated layer includes one of epoxy resin layer, polyimide layer and layer of silica gel;Described Two encapsulated layers include one of epoxy resin layer, polyimide layer and layer of silica gel.
Optionally, the re-wiring layer includes the patterned dielectric layer and patterned metal line stacked gradually Layer.
Optionally, the dielectric layer includes epoxy resin layer, layer of silica gel, PI layers, PBO layers, bcb layer, silicon oxide layer, phosphorus silicon Glassy layer, the combination of one or more of fluorine-containing glassy layer, the metal wiring layer includes layers of copper, aluminium layer, nickel layer, gold The combination of one or more of layer, silver layer, titanium layer.
Optionally, the metal coupling includes in copper metal convex block, nickel metal coupling, tin metal convex block and silver metal convex block One kind.
The utility model also provides a kind of fan-out-type antenna packages method, comprising the following steps:
S1: a support substrate is provided, forms separating layer in Yu Suoshu support substrate;
The second antenna metal layer is formed in S2: Yu Suoshu separating layer;
The second metal connecting column is formed on S3: Yu Suoshu second antenna metal layer;
S4: encapsulating the second antenna metal layer and the second metal connecting column using the second encapsulated layer, and makes described the Two encapsulated layers appear the second metal connecting column;
First antenna metal layer, and the first antenna metal layer and described the are formed on S5: Yu Suoshu second encapsulated layer Two metal connecting columns are electrically connected;
The first metal connecting column is formed on S6: Yu Suoshu first antenna metal layer;
S7: semiconductor chip is provided, the semiconductor chip is engaged on second encapsulated layer, wherein described half Conductor chip further includes the chip metal portion being connected with the contact pad of the semiconductor chip;
S8: encapsulating the first antenna metal layer, the first metal connecting column and semiconductor chip using the first encapsulated layer, and So that first encapsulated layer appears the first metal connecting column and chip metal portion;
Re-wiring layer is formed on S9: Yu Suoshu first encapsulated layer, the re-wiring layer includes and first encapsulation The second face and the first opposite face that layer is in contact, the re-wiring layer and the first metal connecting column and chip metal portion It is electrically connected;
Metal coupling is formed on S10: Yu Suoshu re-wiring layer;And
S11: the support substrate is removed based on the separating layer.
Optionally, the support substrate includes glass substrate, metal substrate, semiconductor substrate, polymer substrate and ceramics One of substrate;The separating layer includes one of adhesive tape and polymeric layer, and the curing method of the polymeric layer includes One of ultraviolet curing method and thermal curing method.
Optionally, the method that second encapsulated layer is formed in step S4 includes compression forming, Transfer molding, fluid-tight One of molding, vacuum lamination and spin coating;The method that first encapsulated layer is formed in step S8 includes compression forming, transmitting One of molded, fluid-tight molding, vacuum lamination and spin coating.
Optionally, the second metal connecting column is formed in step S3 the following steps are included:
The second metal link block, the second metal link block and institute are formed on S3-1: Yu Suoshu second antenna metal layer State the electric connection of the second antenna metal layer;
S3-2: forming the second metal connecting column in the upper surface of the second metal link block using bonding wire craft, And the cross-sectional area of the second metal link block is greater than the second metal connecting column.
Optionally, the first metal connecting column is formed in step S6 the following steps are included:
The first metal link block, the first metal link block and institute are formed on S6-1: Yu Suoshu first antenna metal layer State the electric connection of first antenna metal layer;
S6-2: forming the first metal connecting column in the upper surface of the first metal link block using bonding wire craft, And the cross-sectional area of the first metal link block is greater than the first metal connecting column.
Optionally, form the re-wiring layer in step S9 the following steps are included:
S9-1: using physical gas-phase deposition or chemical vapor deposition process in forming medium on first encapsulated layer Layer, and the dielectric layer is performed etching to form patterned dielectric layer;
S9-2: physical gas-phase deposition, chemical vapor deposition process, evaporation process, sputtering technology, electroplating technology are used Or chemical plating process is in forming metal wiring layer on the patterned dielectric layer, and performs etching shape to the metal wiring layer At patterned metal wiring layer.
It optionally, further include that the n times circulation step formed is combined by the step S9-1 and step S9-2 in step S9, Middle N >=1.
The fan-out-type antenna packages structure of the utility model, has the advantages that
1) the utility model realizes the integration of stacked antenna metal layer using re-wiring layer and metal connecting column, mentions significantly The efficiency and performance of high antenna improve the conformability of antenna packages structure;
2) semiconductor chip is placed in encapsulated layer by the utility model, and antenna metal layer and is bonded in semiconductor chip Adhesive layer has same level, spatial volume is saved, so that the volume of encapsulating structure is smaller;Encapsulated layer is to metal connecting column And antenna metal layer realizes the encapsulation to semiconductor chip, improves the stability of semiconductor chip while be packaged, and saves Cost;
3) the utility model is initially formed metal connecting column before engaging semiconductor chip, improves metal connecting column and day The cleanliness on line metal layer joint surface improves the stability of metal connecting column;
4) the utility model directly forms re-wiring layer on encapsulated layer, while realizing to metal connecting column and semiconductor The electric connection of chip reduces process complexity;
5) the utility model antenna metal layer is respectively positioned in encapsulated layer, can further reduce the volume of encapsulating structure, and Support substrate is removed based on separating layer in final step, improves the cleanliness and electrical property stability of encapsulating structure;
6) the utility model uses fan-out package method encapsulating antenna structure, encapsulation volume can be effectively reduced, so that day Wire encapsulation construction integrated level with higher and better encapsulation performance, before field of semiconductor package has a wide range of applications Scape.
Detailed description of the invention
Fig. 1 is shown as the flow diagram of fan-out-type antenna packages method in the utility model.
Fig. 2~Figure 14 is shown as the structural schematic diagram that each step of antenna packages method is presented in the utility model, wherein Figure 14 is the structural schematic diagram of fan-out-type antenna packages structure in the utility model.
Component label instructions
101 support substrates
102 separating layers
103 re-wiring layers
113 dielectric layers
123 metal wiring layers
104 first metal connecting columns
114 first metal link blocks
105 semiconductor chips
115 chip metal portions
125 adhesive layers
106 first encapsulated layers
107 first antenna metal layers
108 second metal connecting columns
118 second metal link blocks
109 second encapsulated layers
110 second antenna metal layers
111 metal couplings
S1~S11 step
Specific embodiment
Illustrate the embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this theory Content disclosed by bright book understands other advantages and effect of the utility model easily.The utility model can also be by addition Different specific embodiments are embodied or practiced, and the various details in this specification can also be based on different viewpoints and answer With carrying out various modifications or alterations under the spirit without departing from the utility model.
Please refer to Fig. 1~Figure 14.It should be noted that diagram provided in the present embodiment only illustrates this in a schematic way The basic conception of utility model is only shown with related component in the utility model rather than when according to actual implementation in schema then Component count, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind Become, and its assembly layout kenel may also be increasingly complex.
As shown in figure 14, the utility model provides a kind of fan-out-type antenna packages structure, and the encapsulating structure includes: again Wiring layer 103, the first metal connecting column 104, semiconductor chip 105, the first encapsulated layer 106, first antenna metal layer 107, Two metal connecting columns 108, the second encapsulated layer 109, the second antenna metal layer 110 and metal coupling 111.
Specifically, the re-wiring layer 103 includes opposite the first face and the second face, the first metal connecting column 104 are located on the second face of the re-wiring layer 103, and are electrically connected with the re-wiring layer 103;The first antenna Metal layer 107 is located on the first metal connecting column 104, and is electrically connected with the first metal connecting column 104;Described half Conductor chip 105 is located on the second face of the re-wiring layer 103, and is electrically connected with the re-wiring layer 103;It is described First encapsulated layer 106 covers the re-wiring layer 103, the first metal connecting column 104, first antenna metal layer 107 and partly leads Body chip 105, and first encapsulated layer 106 appears the first antenna metal layer 107 and is bonded in the semiconductor chip 105 adhesive layer 125;The second metal connecting column 108 is located on the first antenna metal layer 107, and with described first Antenna metal layer 107 is electrically connected;The second antenna metal layer 110 is located on the second metal connecting column 108, and with institute State the electric connection of the second metal connecting column 108;Second encapsulated layer 109 covers the second metal connecting column 108 and second Antenna metal layer 110, and second encapsulated layer 109 appears the second antenna metal layer 110;The metal coupling 111, position It is electrically connected on the first face of the re-wiring layer 103, and with the re-wiring layer 103.In the present embodiment, using institute It states re-wiring layer 103, the first metal connecting column 104 and the second metal connecting column 108 and realizes the first antenna metal layer 107 And second antenna metal layer 110 integration, the efficiency of antenna and the conformability of performance and antenna packages structure can be improved;By institute It states semiconductor chip 105 to be placed in first encapsulated layer 106, and the first antenna metal layer 107 and the adhesive layer 125 With same level, spatial volume is further saved, so that the volume of encapsulating structure further reduces;The first antenna gold Belong to layer 107 and the second antenna metal layer 110 is located in first encapsulated layer 106 and the second encapsulated layer 109, it can be further The volume of encapsulating structure is reduced, the integrated level and encapsulation performance of antenna packages structure are improved.
As the further embodiment of the embodiment, the re-wiring layer 103 includes patterned Jie stacked gradually Matter layer 113 and patterned metal wiring layer 123.Further, the dielectric layer 113 includes epoxy resin layer, layer of silica gel, PI Layer, PBO layers, bcb layer, silicon oxide layer, phosphorosilicate glass layer, the combination of one or more of fluorine-containing glassy layer, the metal Wiring layer 123 is combined including one or more of layers of copper, aluminium layer, nickel layer, layer gold, silver layer, titanium layer.The rewiring The specific number of plies and type of the dielectric layer 113 and metal wiring layer 123 in layer 103, do not limit excessively herein.
As the further embodiment of the embodiment, the first metal connecting column 104 and the first antenna metal layer It further include the first metal link block 114 between 107, the preferably described first metal connecting column 104 is located at first metal company The symmetrical centre of block 114 is connect, and the cross-sectional area of the first metal link block 114 is greater than the first metal connecting column 104, To increase the contact area of the first metal link block 114 and the first antenna metal layer 107, improves and electrically stablize Property.
As shown in figure 14, the first metal connecting column 104 is located on the second face of the re-wiring layer 103, passes through The first metal link block 114 is connected with the first antenna metal layer 107.Further, the first metal connection The material of column 104 and the first metal link block 114 includes one of Au, Ag, Cu and Al or combination, is not made herein excessively Limitation.
As the further embodiment of the embodiment, the semiconductor chip 105 further includes and the semiconductor chip 105 The chip metal portion 115 that is connected of contact pad (not shown), the chip metal portion 115 includes in metal column and metal ball One kind, and realize by the chip metal portion 115 electrical property of the semiconductor chip 105 with the re-wiring layer 103 Connection.Electricity connection end of the chip metal portion 115 as the semiconductor chip 105 is convenient for technological operation, is avoided in institute State on the contact pad of semiconductor chip 105 carry out bonding wire technique, thus improve the semiconductor chip 105 stability and Yield.
As shown in figure 14, the chip metal portion 115 includes the metal column with certain altitude, the metal column Altitude range includes 25 μm~250 μm, and the material of the metal column includes one of copper, nickel, tin and silver.The semiconductor core The number and type of piece 105 are herein with no restriction.
As the further embodiment of the embodiment, the side in the chip metal portion 115 is by the re-wiring layer 103 In the dielectric layer 113 coated.Since the side in the chip metal portion 115 with certain altitude is by the dielectric layer 113 are coated, electrically steady between the semiconductor chip 105 and the re-wiring layer 103 so as to further, enhance It is qualitative.
As the further embodiment of the embodiment, the adhesive layer 125 for being bonded in the semiconductor chip 105 is revealed in institute The first encapsulated layer 106 is stated, second encapsulated layer 109 is engaged in, by the adhesive layer 125 by the semiconductor chip 105 It is fixed on second encapsulated layer 109.The adhesive layer 125 includes one of epoxy resin layer and polymer film layer, Such as metal DAF film, metallic conduction glue.
As the further embodiment of the embodiment, first encapsulated layer 106 includes epoxy resin layer, polyimide layer And one of layer of silica gel, the surface that first encapsulated layer 106 is in contact with the re-wiring layer 103 be by grinding or The flat surface of polishing, to improve the first metal connecting column 104 and the semiconductor chip 105 and the re-wiring layer 103 contact performance.The material of the first antenna metal layer 107 can be for Au, Cu etc., and the first antenna metal layer 107, according to performance requirement, can have a variety of different figures, herein with no restrictions.As shown in figure 14, the first antenna gold Belong to layer 107 to be formed in first encapsulated layer 106.
Second metal as the further embodiment of the embodiment, on the first antenna metal layer 107 It further include the second metal link block 118 between connecting column 108 and the second antenna metal layer 110, and second metal connects The cross-sectional area for connecing block 118 is greater than the second metal connecting column 108.The preferably described second metal connecting column 108 is located at institute The symmetrical centre of the second metal link block 118 is stated, to increase the second metal link block 118 and second antenna metal The contact area of layer 110 improves electrical stability.Further, the second metal connecting column 108 and second metal connect The material for connecing block 118 includes one of Au, Ag, Cu and Al or combination, is not limited excessively herein.
As the further embodiment of the embodiment, the height of the second metal connecting column 108 is less than first gold medal The height for belonging to connecting column 104, to further reduce the volume of the encapsulating structure.
Specifically, second encapsulated layer 109 includes one of epoxy resin layer, polyimide layer and layer of silica gel, institute The contact surface for stating the second encapsulated layer 109 and first encapsulated layer 106 is by grinding or the flat surface polished, to improve State the contact performance of the second metal connecting column 108 and first metal connecting layer 107.The second antenna metal layer 110 Material can be Au, Cu etc., and the second antenna metal layer 110 can have a variety of different figures according to performance requirement, Herein with no restrictions.As shown in figure 14, the second antenna metal layer 110 is formed in second encapsulated layer 109, can be into one Step reduces the volume of encapsulating structure, and the cleanliness and electric performance stablity of encapsulating structure can be improved.
As the further embodiment of the embodiment, the metal coupling 111 include copper metal convex block, nickel metal coupling, One of tin metal convex block and silver metal convex block.The metal coupling 111, which may also include, is connected to the metal coupling 111 Cylindrical metal, herein with no restriction.
As shown in figure 14, the semiconductor chip 105 passes through the re-wiring layer 103, the first metal connecting column 104 and the second metal connecting column 108 and the first antenna metal layer 107 and 110 electricity of the second antenna metal layer Property connection to realize the function of antenna according to the structure, more metal connecting columns, encapsulated layer and antenna gold can be passed through Belong to the antenna packages structure that layer realizes more numbers of plies, herein with no restriction.To further realize the whole of stacked antenna metal layer It closes, greatly improves the efficiency and performance of antenna, further increase the conformability of antenna packages structure, reduce encapsulation volume, so that Antenna packages structure integrated level with higher.
As shown in Figure 1, the present embodiment also provides a kind of fan-out-type antenna packages method, comprising the following steps:
S1: a support substrate is provided, forms separating layer in Yu Suoshu support substrate;
The second antenna metal layer is formed in S2: Yu Suoshu separating layer;
The second metal connecting column is formed on S3: Yu Suoshu second antenna metal layer;
S4: encapsulating the second antenna metal layer and the second metal connecting column using the second encapsulated layer, and makes described the Two encapsulated layers appear the second metal connecting column;
First antenna metal layer, and the first antenna metal layer and described the are formed on S5: Yu Suoshu second encapsulated layer Two metal connecting columns are electrically connected;
The first metal connecting column is formed on S6: Yu Suoshu first antenna metal layer;
S7: semiconductor chip is provided, the semiconductor chip is engaged on second encapsulated layer, wherein described half Conductor chip further includes the chip metal portion being connected with the contact pad of the semiconductor chip;
S8: encapsulating the first antenna metal layer, the first metal connecting column and semiconductor chip using the first encapsulated layer, and So that first encapsulated layer appears the first metal connecting column and chip metal portion;
Re-wiring layer is formed in S9: Yu Suoshu first encapsulation layer surface, the re-wiring layer includes and described first The second face and the first opposite face that encapsulated layer is in contact, the re-wiring layer and the first metal connecting column and chip gold Category portion is electrically connected;
Metal coupling is formed on first face of S10: Yu Suoshu re-wiring layer;And
S11: the support substrate is removed based on the separating layer.
Specifically, first encapsulated layer is to the first metal connecting column and first antenna metal in the present embodiment Layer realizes the encapsulation to the semiconductor chip while be packaged, and improves the stability of the semiconductor chip, save at This;Before engaging the semiconductor chip, be initially formed the first metal connecting column, improve the first metal connecting column with The stability of the first metal connecting column can be improved in the cleanliness on first antenna metal layer joint surface;Described first The re-wiring layer is directly formed on encapsulated layer, while realizing the electrical property to the first metal connecting column and semiconductor chip Connection reduces process complexity;The first antenna metal layer and the second antenna metal layer are located at first encapsulated layer And second in encapsulated layer, can further reduce the volume of encapsulating structure, and remove institute based on the separating layer in final step Support substrate is stated, the cleanliness and electrical property stability of encapsulating structure are improved;It, can using fan-out package method encapsulating antenna structure Encapsulation volume is effectively reduced, so that antenna packages structure integrated level with higher and better encapsulation performance.Such as Fig. 2~14 It is shown, illustrate the structural schematic diagram that each step of antenna packages method is presented in the utility model.
As shown in Fig. 2, carrying out step S1 first, a support substrate 101 is provided, is formed and is divided in Yu Suoshu support substrate 101 Absciss layer 102.
As the further embodiment of the embodiment, the support substrate 101 includes glass substrate, metal substrate, partly leads One of body substrate, polymer substrate and ceramic substrate.In the present embodiment, the support substrate 101 is preferably glass lined Bottom, cost is relatively low for the glass substrate, is easy to be formed on its surface the separating layer 102, and can reduce subsequent stripping technology Difficulty.
As the further embodiment of the embodiment, the separating layer 102 includes one of adhesive tape and polymeric layer, institute State polymeric layer uses spin coating proceeding to be coated on 101 surface of support substrate first, then uses ultra-violet curing or heat cure Technique makes its curing molding.
Specifically, the separating layer 102 selects the polymeric layer of LTHC photothermal transformation layer, so that subsequent in the present embodiment Step S11 can heat the LTHC photothermal transformation layer based on laser, so that the support substrate 101 is from the LTHC It is separated from each other at photothermal transformation layer.
As shown in figure 3, then carrying out step S2, the second antenna metal layer 110 is formed in Yu Suoshu separating layer 102.
Specifically, physical gas-phase deposition, chemical vapor deposition process, evaporation process, sputtering technology, electricity can be used first Then depositing process or chemical plating process use etching technics in forming the second antenna metal layer 110 in the separating layer 102 Patterned second antenna metal layer 110 needed for being formed.
As shown in figure 4, then carrying out step S3, the second metal connecting column is formed on the second antenna metal of Yu Suoshu layer 110 108, and the second metal connecting column 108 and the second antenna metal layer 110 are electrically connected.
As the further embodiment of the embodiment, it includes following that the second metal connecting column 108 is formed in step S3 Step:
The second metal link block 118, the second metal connection are formed on S3-1: Yu Suoshu second antenna metal layer 110 Block 118 and the second antenna metal layer 110 are electrically connected;
S3-2: second metal is formed in the upper surface of the second metal link block 118 using bonding wire craft and is connected Column 108, and the cross-sectional area of the second metal link block 118 is greater than the second metal connecting column 108, preferably described the Two metal connecting columns 108 are located at the symmetrical centre of the second metal link block 118, to increase the second metal link block 118 with the contact area of the second antenna metal layer 110, improve electrical stability.
Specifically, the bonding wire craft includes hot pressing bonding wire craft, supersonic welding Wiring technology and thermosonic bonding wire work One of skill;The material of the second metal connecting column 108 and the second metal link block 118 includes in Au, Ag, Cu, Al A kind of or combination.
As shown in Fig. 5~6, step S4 is then carried out, the second antenna metal layer is encapsulated using the second encapsulated layer 109 110 and the second metal connecting column 108, and second encapsulated layer 109 is made to appear the second metal connecting column 108.
As the further embodiment of the embodiment, the method that second encapsulated layer 109 is formed in step S4 includes pressure Shorten one of type, Transfer molding, fluid-tight molding, vacuum lamination and spin coating, the material packet of second encapsulated layer 109 into Include one of polyimides, silica gel and epoxy resin.
Specifically, after forming second encapsulated layer 109, further include acted on using the method for grinding or polishing it is described The first antenna metal being subsequently formed is improved to provide smooth second encapsulated layer 109 in the surface of second encapsulated layer 109 Electric connection between layer 107 and the second metal connecting column 108.
As shown in fig. 7, step S5 is then carried out, shape first antenna metal layer 107 on the second encapsulated layer of Yu Suoshu 109, and The first antenna metal layer 107 is electrically connected with the second metal connecting column 108.
Specifically, physical gas-phase deposition, chemical vapor deposition process, evaporation process, sputtering technology, electricity can be used first Depositing process or chemical plating process are in forming the first antenna metal layer 107 on second encapsulated layer 109, then using etching Technique forms required patterned first antenna metal layer 107.
As shown in figure 8, then carrying out step S6, the first metal connecting column is formed on Yu Suoshu first antenna metal layer 107 104, and the first metal connecting column 104 and the first antenna metal layer 107 are electrically connected.
As the further embodiment of the embodiment, it includes following that the first metal connecting column 104 is formed in step S6 Step:
The first metal link block 114, the first metal connection are formed on S6-1: Yu Suoshu first antenna metal layer 107 Block 114 and the first antenna metal layer 107 are electrically connected;
S6-2: first metal is formed in the upper surface of the first metal link block 114 using bonding wire craft and is connected Column 104, and the cross-sectional area of the first metal link block 114 is greater than the first metal connecting column 104.Preferably described One metal connecting column 104 is located at the symmetrical centre of the first metal link block 114, to increase the first metal link block 114 with the contact area of the first antenna metal layer 107, improve electrical stability.
As shown in figure 9, then carrying out step S7, semiconductor chip 105 is provided, the semiconductor chip 105 is engaged in On second encapsulated layer 109, wherein the semiconductor chip 105 further includes the contact pad with the semiconductor chip 105 The chip metal portion 115 being connected.
Specifically, the chip metal portion 115 includes having one of metal column and metal ball of certain altitude, it is described Electricity connection end of the chip metal portion 115 as the semiconductor chip 105 is convenient for technological operation, is avoided in the semiconductor The technique that bonding wire is carried out on the contact pad of chip 105, to improve the stability and yield of the semiconductor chip 105.Institute The material for stating chip metal portion 115 includes one of copper, nickel, tin and silver.In the present embodiment, the chip metal portion 115 is adopted With the metal column, and the altitude range of the metal column includes 25 μm~250 μm.The number of the semiconductor chip 105 and Type is herein with no restriction.
As the further embodiment of the embodiment, the semiconductor chip 105 is bonded in described the by adhesive layer 125 On the surface of two encapsulated layers 109, the adhesive layer 125 includes one of epoxy resin layer and polymer film layer.Such as metal DAF film, metallic conduction glue etc..
As shown in Figure 10~11, step S8 is then carried out, the first antenna metal layer is encapsulated using the first encapsulated layer 106 107, the first metal connecting column 104 and semiconductor chip 105, and first encapsulated layer 106 is made to appear first metal Connecting column 104 and chip metal portion 115.
As the further embodiment of the embodiment, the method that first encapsulated layer 106 is formed in step S8 includes pressure Shorten one of type, Transfer molding, fluid-tight molding, vacuum lamination and spin coating, the material packet of first encapsulated layer 106 into Include one of polyimides, silica gel and epoxy resin.
Specifically, after forming first encapsulated layer 106, further include acted on using the method for grinding or polishing it is described The re-wiring layer 103 being subsequently formed is improved to provide smooth first encapsulated layer 106 in the surface of first encapsulated layer 106 With the electric connection in the first metal connecting column 104 and chip metal portion 115.
As shown in figure 12, step S9 is then carried out, forms re-wiring layer 103 on 106 surface of the first encapsulated layer of Yu Suoshu, The re-wiring layer 103 includes the second face being in contact with first encapsulated layer 106 and the first opposite face, it is described again Wiring layer 103 and the first metal connecting column 104 and chip metal portion 115 are electrically connected.
As the further embodiment of the embodiment, the re-wiring layer 103 is formed in step S9 the following steps are included:
S9-1: it is formed using physical gas-phase deposition or chemical vapor deposition process on first encapsulated layer 106 Dielectric layer 113, and the dielectric layer 113 is performed etching to form patterned dielectric layer 113;
S9-2: physical gas-phase deposition, chemical vapor deposition process, evaporation process, sputtering technology, electroplating technology are used Or chemical plating process is in forming metal wiring layer 123 on the patterned dielectric layer 113, and to the metal wiring layer 123 It performs etching to form patterned metal wiring layer 123.
It further include being combined by the step S9-1 and step S9-2 as the further embodiment of the embodiment, in step S9 The n times circulation step of formation, wherein N >=1.
As the further embodiment of the embodiment, the side in the chip metal portion 115 is by the re-wiring layer 103 In the dielectric layer 113 coated.Since the side in the chip metal portion 115 with certain altitude is by the dielectric layer 113 are coated, electrically steady between the semiconductor chip 105 and the re-wiring layer 103 so as to further, enhance It is qualitative.
As shown in figure 13, step S10 is then carried out, forms metal coupling on the first face of Yu Suoshu re-wiring layer 103 111。
Specifically, it is convex to form the metal on the metal wiring layer 123 on the encapsulating structure obtained in step s 9 Block 111.The metal coupling 111 includes one of tin solder, silver solder and gold-tin eutectic solder.The metal coupling 111 It may also include the cylindrical metal for being connected to the metal coupling 111, the re-wiring layer 103 may include graphical described in multilayer Dielectric layer 113 and patterned metal wiring layer 123, herein with no restriction.
As shown in figure 14, step S11 is finally carried out, the support substrate 101 is removed based on the separating layer 102.
Specifically, being heated based on laser to the LTHC photothermal transformation layer, so that the support substrate 101 is described in It is separated from each other at LTHC photothermal transformation layer.
In conclusion the fan-out-type antenna packages structure of the utility model, has the advantages that
1) the utility model realizes the integration of stacked antenna metal layer using re-wiring layer and metal connecting column, mentions significantly The efficiency and performance of high antenna improve the conformability of antenna packages structure;
2) semiconductor chip is placed in encapsulated layer by the utility model, and the adhesive layer of antenna metal layer and semiconductor chip With same level, spatial volume is saved, so that the volume of encapsulating structure is smaller;Encapsulated layer is to metal connecting column and antenna While metal layer is packaged, realizes the encapsulation to semiconductor chip, improve stability, the save the cost of semiconductor chip;
3) the utility model is initially formed metal connecting column before engaging semiconductor chip, improves metal connecting column and day The cleanliness on line metal layer joint surface improves the stability of metal connecting column;
4) the utility model directly forms re-wiring layer on encapsulated layer, while realizing to metal connecting column and semiconductor The electric connection of chip reduces process complexity;
5) the utility model antenna metal layer is respectively positioned in encapsulated layer, can further reduce the volume of encapsulating structure, and Support substrate is removed based on separating layer in final step, improves the cleanliness and electrical property stability of encapsulating structure;
6) the utility model uses fan-out package method encapsulating antenna structure, encapsulation volume can be effectively reduced, so that day Wire encapsulation construction integrated level with higher and better encapsulation performance, before field of semiconductor package has a wide range of applications Scape.
So the utility model effectively overcomes various shortcoming in the prior art and has high industrial utilization value.On It states embodiment to be only illustrative of the principle and efficacy of the utility model, rather than limit the present invention.It is any to be familiar with The personage of this technology can all carry out modifications and changes to above-described embodiment under the spirit and scope without prejudice to the utility model. Therefore, such as those of ordinary skill in the art without departing from the utility model it is revealed spirit and technical idea Lower completed all equivalent modifications or change, should be covered by the claim of the utility model.

Claims (9)

1. a kind of fan-out-type antenna packages structure, which is characterized in that the encapsulating structure includes:
Re-wiring layer, the re-wiring layer include opposite the first face and the second face;
First metal connecting column is electrically connected on the second face of the re-wiring layer, and with the re-wiring layer;
First antenna metal layer is located on the first metal connecting column, and is electrically connected with the first metal connecting column;
Semiconductor chip is electrically connected on the second face of the re-wiring layer, and with the re-wiring layer;
First encapsulated layer covers the re-wiring layer, the first metal connecting column, first antenna metal layer and semiconductor chip, And first encapsulated layer appears the first antenna metal layer and is bonded in the adhesive layer of the semiconductor chip;
Second metal connecting column is located on the first antenna metal layer, and is electrically connected with the first antenna metal layer;
Second antenna metal layer is located on the second metal connecting column, and is electrically connected with the second metal connecting column;
Second encapsulated layer covers the second metal connecting column and the second antenna metal layer, and second encapsulated layer appears institute State the second antenna metal layer;And
Metal coupling, on the first face of the re-wiring layer.
2. fan-out-type antenna packages structure according to claim 1, it is characterised in that: the semiconductor chip further include with The chip metal portion that the contact pad of the semiconductor chip is connected, the chip metal portion include in metal column and metal ball One kind.
3. fan-out-type antenna packages structure according to claim 2, it is characterised in that: the side quilt in the chip metal portion The re-wiring layer cladding.
4. fan-out-type antenna packages structure according to claim 1, it is characterised in that: the adhesive layer includes epoxy resin One of layer and polymer film layer.
5. fan-out-type antenna packages structure according to claim 1, it is characterised in that: the first metal connecting column and institute Stating between first antenna metal layer further includes the first metal link block, and the cross-sectional area of the first metal link block is greater than institute State the first metal connecting column;It further include the connection of the second metal between the second metal connecting column and the second antenna metal layer Block, and the cross-sectional area of the second metal link block is greater than the second metal connecting column.
6. fan-out-type antenna packages structure according to claim 1, it is characterised in that: first encapsulated layer includes epoxy One of resin layer, polyimide layer and layer of silica gel;Second encapsulated layer includes epoxy resin layer, polyimide layer and silicon One of glue-line.
7. fan-out-type antenna packages structure according to claim 1, it is characterised in that: the re-wiring layer includes successively The patterned dielectric layer and patterned metal wiring layer of stacking.
8. fan-out-type antenna packages structure according to claim 7, it is characterised in that: the dielectric layer includes epoxy resin Layer, layer of silica gel, PI layers, PBO layers, bcb layer, silicon oxide layer, phosphorosilicate glass layer, one or more of fluorine-containing glassy layer group It closes, the metal wiring layer includes the combination of one or more of layers of copper, aluminium layer, nickel layer, layer gold, silver layer, titanium layer.
9. fan-out-type antenna packages structure according to claim 1, it is characterised in that: the metal coupling includes copper metal One of convex block, nickel metal coupling, tin metal convex block and silver metal convex block.
CN201821346487.9U 2018-08-20 2018-08-20 Fan-out-type antenna packages structure Active CN208738235U (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201821346487.9U CN208738235U (en) 2018-08-20 2018-08-20 Fan-out-type antenna packages structure
US16/267,061 US10777516B2 (en) 2018-08-20 2019-02-04 Fan-out antenna packaging structure and packaging method
US16/992,016 US11289435B2 (en) 2018-08-20 2020-08-12 Fan-out antenna packaging structure and packaging method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201821346487.9U CN208738235U (en) 2018-08-20 2018-08-20 Fan-out-type antenna packages structure

Publications (1)

Publication Number Publication Date
CN208738235U true CN208738235U (en) 2019-04-12

Family

ID=66030399

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201821346487.9U Active CN208738235U (en) 2018-08-20 2018-08-20 Fan-out-type antenna packages structure

Country Status (1)

Country Link
CN (1) CN208738235U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110620106A (en) * 2019-08-22 2019-12-27 上海先方半导体有限公司 Wafer-level antenna packaging structure and preparation method
CN110649002A (en) * 2019-10-08 2020-01-03 上海先方半导体有限公司 Fan-out type packaging structure of integrated antenna and manufacturing method thereof
CN113140887A (en) * 2020-01-17 2021-07-20 清华大学 Packaged antenna and method of manufacturing the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110620106A (en) * 2019-08-22 2019-12-27 上海先方半导体有限公司 Wafer-level antenna packaging structure and preparation method
CN110649002A (en) * 2019-10-08 2020-01-03 上海先方半导体有限公司 Fan-out type packaging structure of integrated antenna and manufacturing method thereof
CN113140887A (en) * 2020-01-17 2021-07-20 清华大学 Packaged antenna and method of manufacturing the same

Similar Documents

Publication Publication Date Title
CN108511400A (en) The encapsulating structure and packaging method of antenna
CN105225965B (en) A kind of fan-out package structure and preparation method thereof
CN105140213B (en) A kind of chip-packaging structure and packaging method
CN208738235U (en) Fan-out-type antenna packages structure
CN108417982A (en) The encapsulating structure and packaging method of antenna
CN108305856A (en) The encapsulating structure and packaging method of antenna
CN109742056A (en) The encapsulating structure and packaging method of antenna
CN107248509A (en) The chip-packaging structure and method for packing of EMI protection
CN108336494A (en) The encapsulating structure and packaging method of antenna
CN109768031A (en) The encapsulating structure and packaging method of antenna
CN109244046A (en) Fan-out-type antenna packages structure and packaging method
CN208806246U (en) Fan-out-type antenna packages structure
CN208637416U (en) Fan-out-type antenna packages structure
CN207938809U (en) The encapsulating structure of antenna
CN207517662U (en) Fan-out package structure
CN208336188U (en) The encapsulating structure of antenna
US11289435B2 (en) Fan-out antenna packaging structure and packaging method
CN212392240U (en) Fan-out type packaging structure
CN209328893U (en) The encapsulating structure of antenna
CN208806245U (en) Fan-out-type antenna packages structure
CN209515662U (en) Antenna packages structure
CN208835263U (en) The encapsulating structure of antenna
CN209328892U (en) The encapsulating structure of antenna
CN109841599A (en) A kind of encapsulating structure and packaging method
CN207624689U (en) A kind of fan-out-type wafer level packaging structure

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant
CP03 Change of name, title or address

Address after: No.78 Changshan Avenue, Jiangyin City, Wuxi City, Jiangsu Province (place of business: No.9 Dongsheng West Road, Jiangyin City)

Patentee after: Shenghejing micro semiconductor (Jiangyin) Co.,Ltd.

Address before: No.78 Changshan Avenue, Jiangyin City, Wuxi City, Jiangsu Province

Patentee before: SJ Semiconductor (Jiangyin) Corp.

CP03 Change of name, title or address