CN208691623U - A kind of multilayer circuit board - Google Patents
A kind of multilayer circuit board Download PDFInfo
- Publication number
- CN208691623U CN208691623U CN201820693675.2U CN201820693675U CN208691623U CN 208691623 U CN208691623 U CN 208691623U CN 201820693675 U CN201820693675 U CN 201820693675U CN 208691623 U CN208691623 U CN 208691623U
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- CN
- China
- Prior art keywords
- hole
- plate
- circuit board
- multilayer circuit
- middle plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The utility model discloses a kind of multilayer circuit boards, from bottom to up successively include: bottom plate, middle plate and top plate;It is offered on each middle plate through at least one first hole of middle plate, the both ends in the first hole are contacted with adjacent board layer respectively;At least one second hole of perforation is respectively arranged in bottom plate and/or top plate, second at least one end is contacted with middle plate.Multilayer is connected by the first hole and the second hole for multilayer circuit board provided by the utility model, it is opened up for a through hole is connected all circuit layers compared to more traditional, it is capable of the position in flexible setting the first hole and the second hole, there is wiring in the position for preventing the first hole and the second hole from opening up, it can avoid component, for whole circuit board miniaturized structure, densification provides condition.
Description
Technical field
The utility model relates to circuit board manufacturing areas, specifically, being related to a kind of multilayer circuit board.
Background technique
With the development of electronic technology, circuit structure increasingly refines, and the size of circuit board also increasingly minimizes.Mesh
More circuit structures can be set so being widely used since the number of plies is more in preceding multilayer circuit board in the market.
Multilayer circuit board during fabrication must conduct each other multilayered structure, and existing concrete mode is, in multilayer electricity
A through hole is opened up on the plate of road, which runs through all board layers, after perforation, welds in encapsulation on through hole inner wall
Tin, according to scolding tin number and depth, can be set specifically which layer conducting, entire technique is relatively easy.
But for multilayer circuit board, reserved through hole necessarily be in each layer not set component and
Otherwise the position of not set conductive line will destroy the electrical characteristic of multilayer circuit board.Such as Fig. 1, what is opened up on top plate is passed through
The position of through-hole is located at a beneath chips, which opens up position and can destroy the Electric connection characteristic of chip, for more
The complicated circuit of miniaturized fine is added not to be able to satisfy design requirement in this way in such a way that multilayered structure is connected in through hole,
Usually it cannot achieve.
Utility model content
The purpose of this utility model is to provide a kind of multilayer circuit boards, it is intended to solve using tradition through hole by the way of without
Method meets the technical issues of electrical design requires.
The utility model provides multilayer circuit board.
The multilayer circuit board successively includes: bottom plate, middle plate and top plate from bottom to up;Wherein,
Offered on each middle plate through at least one first hole of middle plate, the both ends in the first hole respectively with it is adjacent
Board layer contact;
At least one second hole of perforation is respectively arranged in bottom plate and/or top plate, second at least one end is in
Laminate contact;
Further, the first hole and the second hole miss one another setting.
Further, scolding tin is coated on the inner wall in the first hole;The first hole on middle plate connects with bottom plate and top plate
Be coated with scolding tin on the position of touching, so that bottom plate be made be connected with middle plate by the first hole, make top plate pass through the first hole and
Middle plate conducting.
Further, scolding tin is coated on the inner wall in the second hole;The position that second hole is contacted with middle plate is coated with scolding tin,
To make bottom plate and/or top plate be connected with middle plate by the second hole.
Further, middle plate has multiple, is respectively arranged with multiple first holes on multiple middle plates, on the first hole inner wall
It is coated with scolding tin, multiple first holes are not exclusively aligned.
Further, the first hole on middle layer circuit board is connected with layer circuit board in another adjacent.
Multilayer is connected by the first hole and the second hole for multilayer circuit board disclosed by the utility model, compared to more traditional
For opening up all circuit layers of through hole conducting, it is capable of the position in flexible setting the first hole and the second hole, prevents the first hole
There is wiring in the position opened up with the second hole, can avoid component, is whole circuit board miniaturized structure, and densification provides
Condition.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of multilayer circuit board in the prior art;
Fig. 2 is the layer structure schematic diagram of the utility model multilayer circuit board;
Fig. 3 is the cross-sectional view of Fig. 2.
Specific embodiment
The utility model is further elaborated and is illustrated with Figure of description combined with specific embodiments below:
Referring to FIG. 2, multilayer circuit board disclosed by the utility model, successively includes: bottom plate 110, middle layer from bottom to up
Plate 120 and top plate 130;Wherein, it is offered on each middle plate 120 through at least one first hole of middle plate 120
200, the both ends in the first hole 200 are contacted with adjacent board layer respectively;It is respectively set on bottom plate 110 and/or top plate 130
There is at least one second hole 300 of perforation, second at least one end is contacted with middle plate 120.
In the present embodiment, the first hole 200 and the second hole 300 are only the hole location for penetrating through a board layer, in list
It finds suitable vacancy point on a board layer to be relatively more easy, and can be with flexible arrangement the first hole 200 and the second hole 300
Position, be not in the electrical characteristic of circuit board can be destroyed through the through hole of all board layers in background technique, thus
It cannot achieve.Behind the position in addition finding through hole, discovery is in fact entire to be minimized, on the multilayer circuit board of densification not
There is the position for being suitble to open up through hole, it has to the design size of further expansion multilayer circuit board is needed, it is reserved to open up position,
To be unfavorable for the miniaturization of circuit board.
Wherein, the first hole 200 and the second hole 300 miss one another setting.Staggered first hole 200 makes with the second hole 300
The opening up position multiplicity of first hole 200 and the second hole 300 and it is flexible, receive wiring and the position of components of layers of multilayer circuit board
Constraint further decreases.
Wherein, scolding tin 400 is coated on the inner wall in the first hole 200 and the second hole 300;The first hole on middle plate 120
It is coated with scolding tin 400 on 200 positions contacted with bottom plate 110 and top plate 130, so that bottom plate 110 be made to pass through the first hole
200 are connected with middle plate 120, and top plate 130 is connected with middle plate 120 by the first hole 200.
The position that second hole 300 is contacted with middle plate 120 is coated with scolding tin 400, to make bottom plate 110 and/or upper layer
Plate 130 and middle plate 120 are connected by the second hole 300.
In the present embodiment, the scolding tin 400 on 300 inner wall of the first hole 200 and the second hole and the scolding tin on board layer
400 or conducting wire be conducted, thus make between multilayer circuit board be connected connection.
In the other embodiments of the utility model, middle plate 120 have it is multiple, set respectively on multiple middle plates 120
Multiple first holes 200 are equipped with, scolding tin 400, multiple not exclusively alignment of first hole 200 are coated on 200 inner wall of the first hole.Middle layer electricity
The first hole 200 on the plate of road is connected with layer circuit board in another adjacent.
In the present embodiment, the position flexible setting on each middle plate 120 in the first hole 200, can be conducive to
The number of plies for increasing circuit board, improves the closeness of multilayer circuit board.
Finally it should be noted that above embodiments are only to illustrate the technical solution of the utility model, rather than to this reality
With the limitation of novel protected range, although being explained in detail referring to preferred embodiment to the utility model, this field it is general
Lead to it will be appreciated by the skilled person that can be with the technical solution of the present invention is modified or equivalently replaced, without departing from this
The spirit and scope of utility model technical solution.
Claims (6)
1. a kind of multilayer circuit board, which is characterized in that multilayer circuit board successively include: from bottom to up bottom plate, middle plate and
Top plate;Wherein,
Offered on each middle plate through at least one first hole of middle plate, the both ends in the first hole respectively with adjacent circuit
The contact of plate layer;
It is respectively arranged at least one second hole of perforation in bottom plate and/or top plate, second at least one end and middle plate
Contact.
2. multilayer circuit board as described in claim 1, which is characterized in that the first hole and the second hole miss one another setting.
3. multilayer circuit board as claimed in claim 1 or 2, which is characterized in that be coated with scolding tin on the inner wall in the first hole;Middle layer
It is coated with scolding tin on the position that the first hole on plate is contacted with bottom plate and top plate, so that bottom plate be made to pass through the first Kong Yuzhong
Laminate conducting, is connected top plate with middle plate by the first hole.
4. multilayer circuit board as claimed in claim 1 or 2, which is characterized in that be coated with scolding tin on the inner wall in the second hole;Second
The position that hole is contacted with middle plate is coated with scolding tin, so that bottom plate and/or top plate be made to be connected with middle plate by the second hole.
5. multilayer circuit board as described in claim 1, which is characterized in that middle plate have it is multiple, on multiple middle plates respectively
Multiple first holes are provided with, scolding tin is coated on the first hole inner wall, multiple first holes are not exclusively aligned.
6. multilayer circuit board as claimed in claim 5, which is characterized in that the first hole on middle layer circuit board with it is adjacent another
A middle layer circuit board conducting.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201820693675.2U CN208691623U (en) | 2018-05-10 | 2018-05-10 | A kind of multilayer circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201820693675.2U CN208691623U (en) | 2018-05-10 | 2018-05-10 | A kind of multilayer circuit board |
Publications (1)
Publication Number | Publication Date |
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CN208691623U true CN208691623U (en) | 2019-04-02 |
Family
ID=65876991
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201820693675.2U Expired - Fee Related CN208691623U (en) | 2018-05-10 | 2018-05-10 | A kind of multilayer circuit board |
Country Status (1)
Country | Link |
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CN (1) | CN208691623U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112653818A (en) * | 2020-12-11 | 2021-04-13 | 维沃移动通信有限公司 | Bracket assembly and electronic equipment |
-
2018
- 2018-05-10 CN CN201820693675.2U patent/CN208691623U/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112653818A (en) * | 2020-12-11 | 2021-04-13 | 维沃移动通信有限公司 | Bracket assembly and electronic equipment |
WO2022121824A1 (en) * | 2020-12-11 | 2022-06-16 | 维沃移动通信有限公司 | Rack assembly and electronic device |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20190402 Termination date: 20200510 |
|
CF01 | Termination of patent right due to non-payment of annual fee |