CN208568911U - A kind of simple digital clocking signal analytical equipment - Google Patents

Abstract

The utility model discloses a kind of simple digital clocking signal analytical equipments, this hair realizes circuit shift clock and eight railway digital signals, STM32F407VGT6 single-chip microcontroller carries out signal acquisition and storage, the preset eight trigger word TW of toggle switch, do not show corresponding timing waveform from left to right overlappingly on oscillograph, triggered time position is adjustable, time tag line can manual displacement, the LED light function that shows the corresponding status word of markings, play back two shift cycle period timing waveforms.

Description

A kind of simple digital clocking signal analytical equipment

Technical field

The utility model relates to Time-Series analysis field, specifically a kind of simple digital clocking signal analytical equipment.

Background technique

Time-Series analysis is predicted future time domain is likely to be breached with the development process of analysis time sequence, direction and trend Mesh calibration method, the method are related using the data of sequential system with time series analysis principle and technology in probability statistics Property, corresponding mathematical model is established, the time sequence status of system is described, to predict future.

Its basic step is: (one) using the data of related historical summary as foundation, difference erratic variation, circulation become The kinetic potential of the different times such as dynamic, seasonal move, especially continuous long-term kinetic potential, and sort out statistical chart；(2) from system original It then sets out, composite analysis times sequence reflects all causal relations and influence once occurred, analyzes the comprehensive of motive power Cooperation is used；(3) every predicted value that time series and future tense are found out with mathematical model, such as the method for moving average, season Y-factor method Y, exponential smoothing, the sequential system that Time-Series analysis is applicable in data quantization, mainly at any time with probability statistical analysis The stochastic system of variation, in newspapering, the variation of the contribution quantity of a historical stage, the variation of space of a whole page content is subscribed to The variation of number, the visiting variation etc. of letters from reader, is all the stochastic system changed over time, using probability statistics, is arranged Past data analyze its changing rule, especially grasp continuous long-term kinetic potential, can be changed over time with expected news and journals phenomenon Following state, Time-Series analysis apparatus structure common at present is all more complicated, and the function of realization is also very limited, partial devices Have overlapping phenomenon during display waveform, at the same partial devices can not manual displacement time tag line, the triggered time can not It adjusts, displacement cycle period timing waveform can not also play back.

Therefore a kind of realization circuit shift clock and eight railway digital signals are designed, using preset eight trigger words of toggle switch TW does not show corresponding timing waveform overlappingly from left to right on oscillograph, triggered time position is adjustable, time tag line can Manual displacement, LED light show the Time-Series analysis dress of two the corresponding status word of markings, playback shift cycle period timing waveforms It sets, exactly utility model people will solve the problems, such as.

Utility model content

In view of the deficiencies of the prior art, the purpose of the utility model is to provide a kind of simple digital clocking signal analysis dresses It sets, is able to achieve with novel artistic process, melon skin is screened in advance, avoid melon skin from being mixed into subsequent handling and equipment is caused to bear Load avoids melon skin from influencing the function of production procedure.

The technical scheme adopted by the utility model to solve the technical problem is as follows: a kind of simple digital clocking signal analysis dress It sets comprising eight-digit number word signal generating circuit, STM32F407VGT6 single-chip microcontroller, oscillograph, LED are shown, eight dial-ups are opened Pass, key A, key B, knob, the STM32F407VGT6 single-chip microcontroller store mould by digital clocking signal analysis module, signal Block adjusts setup module composition and integrates, and the eight-digit number word signal generating circuit is by STM32F103RBT6 monolithic Machine, STM32F103 minimum system plate, Voltage stabilizing module, USB module, I/O port, crystal oscillator module, reseting module, power module composition, The Voltage stabilizing module, USB module, I/O port, crystal oscillator module, reseting module, power module, STM32F103RBT6 single-chip microcontroller are logical The mode for crossing welding is connected with STM32F103 minimum system plate, and the STM32F103RBT6 single-chip microcontroller is separately connected pressure stabilizing mould Block, USB module, I/O port, crystal oscillator module, reseting module, power module simultaneously constitute complete circuit, and the eight-digit number word signal occurs Circuit is connected by eight jumpers with STM32F407VGT6 single-chip microcontroller, and the STM32F407VGT6 single-chip microcontroller passes through data Transmission line is connected with oscillograph, and the STM32F407VGT6 single-chip microcontroller connection LED is shown, the STM32F407VGT6 monolithic Machine connects eight toggle switch, and the STM32F407VGT6 single-chip microcontroller connects key A, and the STM32F407VGT6 single-chip microcontroller connects Key B is met, the STM32F407VGT6 single-chip microcontroller connects knob；

Further, the signal memory module is stored using RAM.

Further, eight toggle switch are for being arranged eight single-stage trigger word TW.

Further, the key A is used to select the position in triggered time, and key B is used to control playback, and knob is used to adjust Time tag line.

Further, the display pattern of the oscillograph is X-Y mode.

The beneficial effects of the utility model are:

1. the utility model is by building peripheral circuit and programming, realizing using STM32F407VGT6 single-chip microcontroller as core Circuit shift clock and eight railway digital signals, STM32F407VGT6 single-chip microcontroller carries out signal acquisition and storage, toggle switch are preset Eight trigger word TW, in the case of meeting trigger condition, STM32F407VGT6 single-chip microcontroller carries out Time-Series analysis to signal and calculates defeated It is worth out, converts the output channel Analog control X-Y through inner high speed DA and do not show correspondence from left to right overlappingly on oscillograph Timing waveform function.

2. the utility model is by by the devices composition control panel such as key, potentiometer, toggle switch, by with single-chip microcontroller Master control composition control circuit, realize triggered time position is adjustable, time tag line can manual displacement, LED light show markings Corresponding status word, the function of playing back two shift cycle period timing waveforms.

Detailed description of the invention

Fig. 1 is Tthe utility model system block diagram.

Fig. 2 is the utility model eight-digit number word signal generating circuit schematic diagram.

Fig. 3 is the utility model STM32F407VGT6 single chip circuit figure.

Fig. 4 is the utility model programming flowchart.

Specific embodiment

The present invention will be further illustrated below in conjunction with specific embodiments, it should be appreciated that these embodiments are merely to illustrate this Utility model rather than limitation the scope of the utility model.In addition, it should also be understood that, in the content for having read the utility model instruction Later, those skilled in the art can make various changes or modifications the utility model, and such equivalent forms also fall within application The appended claims limited range.

Referring to Fig. 1 to 4 be Tthe utility model system block diagram, eight-digit number word signal generating circuit schematic diagram, STM32F407VGT6 single chip circuit figure, programming flowchart comprising eight-digit number word signal generating circuit, STM32F407VGT6 single-chip microcontroller, oscillograph, LED show, eight toggle switch, key A, key B, knob, STM32F407VGT6 single-chip microcontroller is formed and is integrated by digital clocking signal analysis module, signal memory module, adjusting setup module Together, eight-digit number word signal generating circuit is by STM32F103RBT6 single-chip microcontroller, STM32F103 minimum system plate, pressure stabilizing mould Block, USB module, I/O port, crystal oscillator module, reseting module, power module composition, Voltage stabilizing module, USB module, I/O port, crystal oscillator mould Block, reseting module, power module, STM32F103RBT6 single-chip microcontroller by welding with STM32F103 minimum system plate It is connected, STM32F103RBT6 single-chip microcontroller is separately connected Voltage stabilizing module, USB module, I/O port, crystal oscillator module, reseting module, electricity Source module simultaneously constitutes complete circuit, and eight-digit number word signal generating circuit passes through eight jumpers and STM32F407VGT6 single-chip microcontroller It is connected, STM32F407VGT6 single-chip microcontroller is connected by data line with oscillograph, and STM32F407VGT6 single-chip microcontroller connects LED is met to show, STM32F407VGT6 single-chip microcontroller connects eight toggle switch, and STM32F407VGT6 single-chip microcontroller connects key A, STM32F407VGT6 single-chip microcontroller connects key B, and STM32F407VGT6 single-chip microcontroller connects knob；

Signal memory module is stored using RAM, and eight toggle switch are for being arranged eight single-stage trigger word TW, key A use Select the position in triggered time, key B is used to control playback, knob is for regulating time markings, the display mould of oscillograph Formula is X-Y mode.

Eight-digit number word signal generating circuit generally can be described as consisting of two parts, and be that mould occurs for clock signal respectively Block, eight-digit number word signal generating module carry out following demonstration for the selection of two parts module, and the opinion of module occurs for clock signal Card and selection: scheme one builds circuit and divides the sine wave that crystal oscillator generates, and generates the clock pulses of 100 KHz, the party Case save the cost, but be not easy to realize, actual effect is bad, and stability not can guarantee；Scheme two generates clock letter using single-chip microcontroller Number, the pulse signal of required frequency is generated by programming to it, the realization of this scheme is relatively easy, and it is easy to maintain, but to single-chip microcontroller Performance there are certain requirements, and through actual test comparison, generate using scheme two and with STM32F103RBT6 single-chip microcontroller satisfactory Clock signal.

The demonstration and selection of eight-digit number word signal generating module: scheme one, it is real using STM32F103RBT6 mcu programming Show sequence signal, eight railway digital signals are exported in different I/O ports respectively by programming and register configuration simultaneously, this Scheme short, easy to maintain, high reliability with the development cycle, but higher cost；Scheme two generates eight with 74LS164 A preset number is arranged in railway digital signal, gives its clock pulses, a bit is successively moved in each pulse, defeated in input terminal Out.This scheme peripheral circuit builds that difficulty is little, and foundation structure is simple, at low cost, but stability is poor, by comparison, scheme Two need to input external clock and signal setting number, increase the structure complexity of whole device and stability is poor, scheme one Realization is easier to and easy to maintain, therefore uses scheme one.

The demonstration and selection of digital clocking signal analysis module: scheme one does signal processing and analysis, control periphery with FPGA Equipment controls output signal by adjusting setup module, and program design is convenient, but the verifying timing time is slightly longer, task time It is relatively tight, less properly；Scheme two: with STM32F407VGT6 single-chip microcontroller come collection analysis signal, peripheral equipment is controlled, tune is passed through It saves setup module and controls output signal, single-chip microcontroller is the development board of master chip, and easy to use, verifying is quick, and programming is easier to and It is skilled to grasp, by comparing, using scheme two.

The demonstration and selection of waveform display module: scheme one builds peripheral circuit with DAC0832, LM358 and realizes single-chip microcontroller The DA of output signal is converted, and generates the analog signal in the channel XY for oscilloscope display；Scheme two: topic requirements use oscillograph (X-Y mode) display waveform, needs singlechip control part to have higher refreshing frequency, and it is higher to select dominant frequency STM32F407VGT6 development board realizes the function, and the board finally select by comparing by integrated high-speed DA conversion function Scheme two.

The demonstration and selection of signal memory module: scheme one is stored with external memory.This scheme supports power down storage, Information memory capacity is big, but at high cost；Scheme two, is stored with RAM, and storage reading speed is fast, but the information content stored is few, through dividing Analysis, topic only require the signal in two periods of storage, and occupied space is few, then use scheme two, an array directly Store collected signal.

The demonstration and selection of setup module: scheme one are adjusted, eight single-stage trigger word TW are set with eight toggle switch, The position that the triggered time is selected with key is played back, adjustable resistor regulating time markings by key control；Scheme two: square is used Battle array keyboard, presses different keys, completes different work.The method integrated level is very high, but is easy to obscure, and is unfavorable for practical behaviour Make, is comprehensively compared, using scheme one.

System principle analysis and design: whole system is mainly by eight-digit number word signal generating circuit and digital clocking signal point Analysis apparatus composition uses single-chip microcontroller STMF103RB to generate frequency and follows for 100 KHz shift clock clock and the displacement of eight parallel-by-bits The Transistor-Transistor Logic level signal of ring output, eight railway digital signals connect main control singlechip STM32F407VGT6, monolithic owner by wire jumper It controls and sampling and Time-Series analysis is carried out to eight railway digital signals every the shift cycle period of 80 us, pass through toggle switch preset eight Position single-stage trigger word TW, when meeting trigger condition (i.e. D0~D7 is just preset TW), by interior after main control singlechip is sampled The portion DA conversion output channel X-Y two path control signal, does not show eight railway digitals letter overlappingly simultaneously from left to right on oscillograph Number timing waveform.

Module working principle occurs for clock and digital signal: STM32F103RBT6 single-chip microcontroller makees signal generation apparatus, configuration Eight I/O mouthfuls of D0~D7 are digital signal output end, 1 clock clock signal output terminal, internal timing interrupt cycle 10 us, Every 10 us trigger interrupt, overturn clock I/O port clock level state, generate 100 KHz clock pulse signal, every time in Disconnected D0~D7 switches in 8 kinds of different status word SW, and it is that a shift cycle can show eight tunnel timing waves simultaneously that every 8 times, which interrupt, Shape.

Digital clocking signal and main control module: digital clocking signal analytical equipment and main control module are with STM32F407VGT6 Single-chip microcontroller is core, which has the SRAM, multiple of integrated level height, 1 M byte on piece FLASH memory, 192 K bytes The advantages such as position, inside RC, PLL.In addition, the device further includes ART accelerator, 32 7 layers of ahb bus matrixes, more dma controllers Deng.

Digital clocking signal analytical equipment can accurately acquire complete timing waveform, and inner high speed arithmetic element can be real When signal is handled, due to oscillograph X-Y mode waveform show it is more demanding to frequency input signal, low frequency signal be easy Display aliasing is caused, therefore, STM32F407VGT6 single-chip microcontroller meets the dominant frequency demand of system, can be good to input Signal is acquired capture, and makes corresponding output control, and the output of inner high speed DA modulus of conversion analog quantity can ensure to input To the figure consecutive variations of oscillograph (X-Y mode) and undistorted, while entire control system being capable of stable operation.

The channel oscillograph XY displaying principle: oscillograph X passage waveform voltage determines that luminous point deviates the distance of X-axis, oscillography The channel device Y waveform voltage determines that luminous point deviates the distance of Y-axis, and X passage inputs oblique ascension wave, the input of Y channel cycle and trigger word Matched digital signal waveform all the way can export waveform all the way on oscillograph, show eight road waves simultaneously on oscillograph Shape, then X passage needs to input eight oblique ascension waves, is respectively used to the complete display of eight road waveforms, and the eight road waveforms in the channel Y will be lifted Pressure processing, otherwise aliasing can occur for luminous point, so eight road waveforms needs are arranged on different reference voltages, oscillograph time mark Will line is settable, needs X passage oblique ascension wave reference voltage adjustable.

Program description: realization accurately collects clock and digital signal, analyzes the timing of D0~D7 signal, externally Portion's state, control signal timely respond to, and stablize output analog signal by the channel oscillograph X-Y, and when showing on oscillograph Sequence figure.

Testing scheme and condition: integrated testability includes that hardware and software tests two parts, and hardware components are believed by eight-digit number word Number output end and a clock signal are connected to Time-Series analysis device, and control panel includes potentiometer, key, toggle switch, LED Lamp is connected on Time-Series analysis device, and Time-Series analysis device draws the end X, Y, GND, is separately connected the channel oscillograph X, Y.With ten thousand Hardware connecting test is carried out with instrument and equipments such as table, oscillographs, after tested, hardware connection is intact, and each module is working properly, software Part display effect on the hardware platform put up, carries out program adjustment and modification.

To ensure that hardware circuit connection is errorless, power respectively to digital signal generating device, Time-Series analysis device, opening is shown Wave device is simultaneously set as X-Y mode, passes through toggle switch preset eight effective single-stage trigger word TW.Adjust potentiometer, hand on screen Dynamic displacement time markings, LED light show that direction pair answers 8 railway digital signal condition word SW；Three kinds of triggered times are arranged in key A Position；Two periods, the eight road timing waveform and normal condition timing waveform of key B switching display playback storage.

Test result and analysis: after tested, eight railway digital signal sequences can be shown simultaneously on oscillograph, are adjustable eight tunnels Different triggering modes may be selected in the triggered time of digital clocking signal waveform, and can add on the screen can manual displacement time mark Will line can show that time graticule corresponds to the eight railway digital signal conditions at moment with eight LED, can be to the logic of eight railway digital signals The acquisition and storage of state, and the eight railway digital signals in two displacement cycle periods can be played back on oscillograph.

The utility model is by building peripheral circuit and programming, realizing electricity using STM32F407VGT6 single-chip microcontroller as core Road shift clock and eight railway digital signals, STM32F407VGT6 single-chip microcontroller carry out signal acquisition and storage, toggle switch preset eight Position trigger word TW, in the case of meeting trigger condition, STM32F407VGT6 single-chip microcontroller carries out Time-Series analysis to signal and calculates output Value is not shown overlappingly on oscillograph corresponding from left to right through the inner high speed DA conversion output channel Analog control X-Y The function of timing waveform, by by the devices composition control panel such as key, potentiometer, toggle switch, by with single-chip microcontroller master control Composition control circuit, realize triggered time position is adjustable, time tag line can manual displacement, LED light show that direction pair is answered Status word, play back two shift cycle period timing waveforms function.

Claims (5)

1. a kind of simple digital clocking signal analytical equipment, it is characterised in that: including eight-digit number word signal generating circuit, STM32F407VGT6 single-chip microcontroller, oscillograph, LED show, eight toggle switch, key A, key B, knob, described STM32F407VGT6 single-chip microcontroller is formed and is integrated by digital clocking signal analysis module, signal memory module, adjusting setup module Together, the eight-digit number word signal generating circuit is by STM32F103RBT6 single-chip microcontroller, STM32F103 minimum system plate, pressure stabilizing Module, USB module, I/O port, crystal oscillator module, reseting module, power module composition, the Voltage stabilizing module, USB module, I/O port, crystalline substance Shake module, reseting module, power module, STM32F103RBT6 single-chip microcontroller by welding with STM32F103 minimum system System plate is connected, and the STM32F103RBT6 single-chip microcontroller is separately connected Voltage stabilizing module, USB module, I/O port, crystal oscillator module, reset Module, power module simultaneously constitute complete circuit, the eight-digit number word signal generating circuit by eight jumpers with STM32F407VGT6 single-chip microcontroller is connected, and the STM32F407VGT6 single-chip microcontroller is connected by data line with oscillograph It connects, the STM32F407VGT6 single-chip microcontroller connection LED shows that the STM32F407VGT6 single-chip microcontroller connects eight dial-ups and opens It closes, the STM32F407VGT6 single-chip microcontroller connects key A, and the STM32F407VGT6 single-chip microcontroller connects key B, described STM32F407VGT6 single-chip microcontroller connects knob.

2. a kind of simple digital clocking signal analytical equipment according to claim 1, it is characterised in that: the signal storage Module is stored using RAM.

3. a kind of simple digital clocking signal analytical equipment according to claim 1, it is characterised in that: eight dial-ups Switch is for being arranged eight single-stage trigger word TW.

4. a kind of simple digital clocking signal analytical equipment according to claim 1, it is characterised in that: the key A is used Select the position in triggered time, key B is used to control playback, knob is for regulating time markings.

5. a kind of simple digital clocking signal analytical equipment according to claim 1, it is characterised in that: the oscillograph Display pattern is X-Y mode.