CN2567588Y - Testing instrument for display performance of liquid crystal display - Google Patents
Testing instrument for display performance of liquid crystal display Download PDFInfo
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- CN2567588Y CN2567588Y CN 02274823 CN02274823U CN2567588Y CN 2567588 Y CN2567588 Y CN 2567588Y CN 02274823 CN02274823 CN 02274823 CN 02274823 U CN02274823 U CN 02274823U CN 2567588 Y CN2567588 Y CN 2567588Y
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Abstract
The utility model relates to a testing instrument for the display performance of a liquid crystal display, which comprises an input and display circuit 1, a micro control circuit 2, a line drive signal generating circuit 3, a flaw detecting circuit 4, a bias voltage generating circuit 5, a clock generating circuit 6, a bus card 7, a power 8, a base board 9, a display circuit 10 for the power consumption of a device under test, a drive signal voltage display circuit 11 and a line sequence control data memory 12. A simple digital sequence circuit is utilized to realize the output of the dynamic drive wave shape which is driven by liquid crystal. The micro control circuit is utilized to control a programmable frequency division clock circuit to realize the continuous adjustable range of 5Hz-2KHz. A structure that the micro control circuit is combined with an MAXIM digital control potentiometer is utilized to make the system structure simple convenient for integration; the number of a control data line is reduced and a port line of the control system is saved, which are convenient for modularization, and the biasing voltage ratio of 1/2-1/64 can be realized. The utility model provides a testing instrument for the display performance for the liquid crystal display and is suitable for a factory to detect the LCD liquid crystal screen in batch.
Description
Technical field: the utility model relates to the checkout equipment of photoelectric display device, relates in particular to a kind of testing apparatus of liquid crystal display device display characteristic.
Background technology: the tester of at present external and domestic liquid crystal display device display characteristic generally adopts the structure of imitation lcd drive chip digital circuit, comprises as shown in Figure 1: clock circuit 1, horizontal drive circuit 2, video data latch 3, defects detection 4, column drive circuit 5, sequential control circuit 6 and bias voltage modulation circuit 7.Adopt video data latch 3 serial-shifts to deposit the mode of parallel output data.Horizontal drive circuit 2 produces the drive waveforms of out of phase.Modulate the driving square-wave voltage (as: V0--V6, the square wave of V2--V5 V3--V4) of each bias voltage earlier by circuit.Utilize the control timing circuit to the mode that these square waves utilize timesharing to export by the duty ratio modulation that is provided with then, make tester by setting dutycycle output liquid crystal drive waveform.The frequency of waveform is that the frequency by synchronous clock in the control figure circuit realizes.1) because sequential control circuit 6 is fixed with column drive circuit 5 annexations, and this scheme is the pure digi-tal pattern, it makes the output very flexible of the drive signal of tester.2) because sequential control circuit 6 is fixed with clock circuit 1 annexation, it makes the frequency adjustable scope of waveform of tester little.3) owing to sequential control circuit 6 and bias voltage modulation circuit 7 annexations are fixed, it makes tester bias voltage adjustable extent little, the needs of the liquid crystal industry of incompatibility high speed development test.
Content of the present utility model: the purpose of this utility model is to solve the output very flexible that background technology pure digi-tal pattern makes drive signal; It makes the frequency adjustable scope of waveform little; Problems such as the bias voltage adjustable extent is little, therefore, the utility model will provide a kind of testing tool of display characteristic for liquid crystal display device.
The utility model is as shown in Figure 2: it comprises input and display circuit 1, micro-control circuit 2, ranks drive signal generation circuit 3, defect detection circuit 4, bias-voltage generating circuit 5, clock generation circuit 6, bus card 7, power supply 8, base plate 9, measured device power consumption display circuit 10 and drive signal voltage display circuit 11, ranks sequential control data-carrier store 12, input links to each other with micro-control circuit 2 by the data winding displacement with display circuit 1, makes the user participate in the setting of frequency, bias voltage, dutycycle; Input end CLK, the RST of bias-voltage generating circuit 5, DQ link by bus card 7 on three lines of output terminal P1 of microcontroller data line in the micro-control circuit 2, by microcontroller the bias voltage parameter that the user is provided with is transferred to bias-voltage generating circuit 5, make the different bias voltage of bias-voltage generating circuit 5 outputs, the different bias voltage of bias-voltage generating circuit 5 outputs is connected to the reference voltage input of ranks drive signal generation circuit 3 for the 3 modulation outputs of ranks drive signal generation circuit by grid bias power supply line in the bus card 7; The control signal of clock generation circuit 6 is connected to the output terminal P0 mouth of the data line of micro-control circuit 2, by microcontroller the frequency parameter that the user is provided with is transferred to clock generation circuit 6, clock generation circuit 6 carries out frequency division according to the parameter of setting with reference clock and obtains ranks drive signal generation circuit 3 needed time clock, the detection signal output terminal of defect detection circuit 4 links to each other with the interruption inlet of microcontroller in the micro-control circuit 2, and defect detection circuit 4 is sent to micro-control circuit 2 with detected flaw indication; Micro-control circuit 2 shows the defective ranks of liquid crystal display device by input and display circuit 1, the output terminal of waveform control data storer selects signal input end to be connected with the waveform in the ranks drive signal generation circuit 3 in the micro-control circuit 2, the Waveform Control data that microprocessor will be exported in the micro-control circuit 2 deposit the Waveform Control data-carrier store in, the Waveform Control data-carrier store outputs to ranks drive signal generation circuit 3 at a high speed with drive control signal under the control of time clock, ranks drive signal generation circuit 3 produces the frequency that liquid crystal needs, bias voltage, the waveform that dutycycle is variable.
During the utility model work: behind the power supply opening, whether the micro-control circuit in the system enters self-check program and detects current each circuit and connect correctly, connect errorless, system shows master menu, parameters such as the waveform frequency that the request input test requires, bias voltage, dutycycle, cycle period.By micro-control circuit the frequency parameter that the user is provided with is transferred to clock generation circuit, the parameter that is set according to the user by clock generation circuit is carried out frequency division with reference clock and is obtained ranks drive signal generation circuits needed time clock again; Microcontroller is transferred to bias-voltage generating circuit with the bias voltage parameter that the user is provided with, and makes the different bias voltage of bias-voltage generating circuit output.Microprocessor in the micro-control circuit will deposit the Waveform Control data-carrier store in by the output waveform control data, the Waveform Control data-carrier store outputs to drive control signal at a high speed ranks drive signal generation circuit under the control of time clock, the bias voltage of the control signal modulation bias-voltage generating circuit output that ranks drive signal generation circuit produces produces the variable waveform of frequency, bias voltage, dutycycle that liquid crystal needs.Defect detection circuit is gathered the static current of lcd in the liquid crystal device, and testing circuit output look-at-me is to micro-control circuit when static current of lcd is excessive, and micro-control circuit shows defective ranks by display circuit.
The utility model advantage: because sequential control circuit of the present utility model and driving circuit adopt the syndeton of setting able to programme, thereby make the control signal of sequential control circuit output to make the waveform signal of tester output by software change by the customer requirements setting, having solved background technology adopts sequential control circuit and driving circuit to be fixedly coupled the problem of the output very flexible of the drive signal of bringing.The utility model utilizes the Wave data of the driving of RAM storage demonstration, the high byte of drive waveforms data is the character pattern data of figure, the low byte of drive waveforms data is the parameter of show state, utilizes the simple numerical sequential circuit, realizes the dynamic driving waveform output of liquid crystal drive.
The structure that the utility model adopts micro-control circuit control frequency programmable dividing clock circuit realizes that the frequency of waveform is adjustable continuously between 5HZ～2KHZ.Solved background technology sequential control circuit output parameter and determined that the back can not real time altering to the control signal of clock circuit output, then made the little discontinuous problem of frequency adjustable scope of the waveform of tester.
The structure that the utility model adopts micro-control circuit to combine with digital regulation resistance in the bias-voltage generating circuit, realized the accurate numerical control adjusting of liquid crystal bias voltage, and by the correction of software truth table, it is integrated that system architecture simply is convenient to, control data line number reduces, save the port lines of control system, be convenient to modularization, can realize 1/2～1/64 bias voltage ratio.Solved background technology because sequential control circuit and bias voltage modulation circuit annexation are fixed, made tester bias voltage adjustable extent little, the problems such as needs of the liquid crystal industry test of incompatibility high speed development.The utility model provides a kind of testing tool of novel display characteristic for liquid crystal display device.
The utility model is used for the pilot production line of LCD screen, can satisfy the usefulness of the production testing of different segment structure and lattice lcd screen.The equal scalable of peak value of this instrument output frequency, bias voltage, dutycycle, operating voltage.The utility model is simple to operate, and test quick and precisely is suitable for the batch detection LCD of factory liquid crystal display.Adopt the gate-array circuit design between micro-control circuit and each circuit, simplify circuit structure, improve operating rate.The utility model utilizes RAM storage display driver Wave data, the high byte of drive waveforms data is the character pattern data of figure, the low byte of drive waveforms data is the parameter of show state, utilize simple circuit, realized the high speed data transfer of the data-carrier store and the external unit of micro-control circuit.The dirigibility of output waveform is strong, according to test needs Display Realization demonstration entirely, contract fully, interlacing show, every detecting informations such as row demonstration, intersection, grid, English, Chinese character, figures.Detecting information imports the utility model into by Computerized Editing.
Description of drawings:
Fig. 1 is the structural representation of background technology
Fig. 2 is the utility model structural representation
Fig. 3 is the utility model physical construction synoptic diagram
Fig. 4 is a process flow diagram of the present utility model
Embodiment such as Fig. 2, Fig. 3, input and display circuit 1, micro-control circuit 2, ranks drive signal generation circuit 3, defect detection circuit 4, bias-voltage generating circuit 5, clock generation circuit 6, bus card 7, power supply 8, base plate 9, measured device power consumption display circuit 10, drive signal voltage display circuit 11 and the ranks sequential control data-carrier store 12 of comprising shown in Figure 4
Embodiment: input is made up of one 4 * 4 sixteen bit keyboard and one 128 * 64 lattice lcd module with display circuit 1.Micro-control circuit 2 (embedding the master control board of high-speed cmos microprocessor) is that 78E58 and peripheral chip thereof are formed by the high-speed microprocessor model of a WINBOND, peripheral chip comprises: the data-carrier store model is 6264, the code translator model is that 74HC138, code translator model able to programme are GAL16V8, the address latch model is 74HC573, the bus driver model is 74HC245, the extended chip model is 8255, and serial communication chip model is MAX232.Ranks drive signal generation circuit 3 comprises that the bus driver model is 74HC245, and the address latch model is 74HC573, data-carrier store 62256 and high-precision analog switch MAX333.Defects detection module 4 comprises that digital potentiometer, power consumption are provided with potentiometer DS1860, voltage comparator 741 and static current of lcd amplifier 3140.Bias-voltage generating circuit 5 is sent out device big by the DS1860 digital regulation resistance of embedded two resistance and computing and is formed.Clock generation circuit 6 is made up of 2M crystal oscillator and timer 8254.Bus card 7 adopts 72 core buses.Power supply 8 comprises+5V ,+30V ,+15V ,-15V DC voltage.Base plate 9 adopts aluminium brackets.Base plate 9 is fixedlyed connected with No. 9 casings.Measured device power consumption display circuit 10 adopts 5V pointer gauge outfit.Drive signal voltage display circuit 11 adopts 30V pointer gauge outfit.It is 74HC573 that ranks sequential control data-carrier store 12 adopts the address latch model, and data-carrier store 62256 is formed.
Claims (1)
1, the tester of liquid crystal display device display characteristic, it comprises input and display circuit 1, power supply 8, base plate 9, measured device power consumption display circuit 10 and drive signal voltage display circuit 11, ranks sequential control data-carrier store 12, it is characterized in that also comprising: micro-control circuit 2, ranks drive signal generation circuit 3, defect detection circuit 4, bias-voltage generating circuit 5, clock generation circuit 6, bus card 7, input links to each other with micro-control circuit 2 by the data winding displacement with display circuit 1, makes the user participate in the setting of frequency, bias voltage, dutycycle; Input end CLK, the RST of bias-voltage generating circuit 5, DQ link on three lines of microcontroller data line output terminal P1.3 in the micro-control circuit 2, P1.4, P1.5 by bus card 7, by microcontroller the bias voltage parameter that the user is provided with is transferred to bias-voltage generating circuit 5, makes the different bias voltage of bias-voltage generating circuit 5 outputs; The reference voltage input that is connected to ranks drive signal generation circuit 3 by the grid bias power supply line in the bus card 7 is for the 3 modulation outputs of ranks drive signal generation circuit; The control signal of clock generation circuit 6 is connected to the output terminal P0 mouth of micro-control circuit 2 data lines, by microcontroller the frequency parameter that the user is provided with is transferred to clock generation circuit 6, clock generation circuit 6 carries out frequency division according to the parameter of setting with reference clock and obtains ranks drive signal generation circuit 3 needed time clock; The interruption inlet of the microcontroller in the detection signal output terminal of defect detection circuit 4 and the micro-control circuit 2 links to each other, and defect detection circuit 4 is sent to micro-control circuit 2 with detected flaw indication; Micro-control circuit 2 shows the defective ranks of liquid crystal display device by input and display circuit 1; The output terminal of the Waveform Control data-carrier store in the micro-control circuit 2 selects the input end of control signal to be connected with the waveform in the ranks drive signal generation circuit 3, microprocessor in the micro-control circuit 2 will deposit the Waveform Control data-carrier store in by the output waveform control data, the Waveform Control data-carrier store outputs to ranks drive signal generation circuit 3 at a high speed with drive control signal under the control of time clock, ranks drive signal generation circuit 3 produces the variable waveform of frequency, bias voltage, dutycycle that liquid crystal needs.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02274823 CN2567588Y (en) | 2002-08-17 | 2002-08-17 | Testing instrument for display performance of liquid crystal display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02274823 CN2567588Y (en) | 2002-08-17 | 2002-08-17 | Testing instrument for display performance of liquid crystal display |
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| Publication Number | Publication Date |
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| CN2567588Y true CN2567588Y (en) | 2003-08-20 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 02274823 Expired - Fee Related CN2567588Y (en) | 2002-08-17 | 2002-08-17 | Testing instrument for display performance of liquid crystal display |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101577078B (en) * | 2009-06-22 | 2011-04-27 | 福建捷联电子有限公司 | Full automatic adjustment and test system for liquid crystal display |
| CN101604077B (en) * | 2008-06-10 | 2011-07-13 | 乐金显示有限公司 | Testing apparatus of liquid crystal display module |
| CN103236242A (en) * | 2013-04-23 | 2013-08-07 | 青岛海信电器股份有限公司 | Signal generating device for display panel testing |
| CN105445642A (en) * | 2014-08-28 | 2016-03-30 | 群创光电股份有限公司 | Drive circuit board, display module and display panel automatic test method |
| CN106297614A (en) * | 2016-08-30 | 2017-01-04 | 苏州华兴源创电子科技有限公司 | A kind of method of testing of LCD product |
| CN111623521A (en) * | 2019-02-28 | 2020-09-04 | 格德斯控股两合公司 | Electric continuous heater and method for operating an electric continuous heater of this type |
-
2002
- 2002-08-17 CN CN 02274823 patent/CN2567588Y/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101604077B (en) * | 2008-06-10 | 2011-07-13 | 乐金显示有限公司 | Testing apparatus of liquid crystal display module |
| CN101577078B (en) * | 2009-06-22 | 2011-04-27 | 福建捷联电子有限公司 | Full automatic adjustment and test system for liquid crystal display |
| CN103236242A (en) * | 2013-04-23 | 2013-08-07 | 青岛海信电器股份有限公司 | Signal generating device for display panel testing |
| CN105445642A (en) * | 2014-08-28 | 2016-03-30 | 群创光电股份有限公司 | Drive circuit board, display module and display panel automatic test method |
| CN105445642B (en) * | 2014-08-28 | 2019-07-05 | 群创光电股份有限公司 | The automated testing method of drive circuit board, display module and display panel |
| CN106297614A (en) * | 2016-08-30 | 2017-01-04 | 苏州华兴源创电子科技有限公司 | A kind of method of testing of LCD product |
| CN111623521A (en) * | 2019-02-28 | 2020-09-04 | 格德斯控股两合公司 | Electric continuous heater and method for operating an electric continuous heater of this type |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |