CN208336209U - Semiconductor package part and its lead frame item used - Google Patents

Semiconductor package part and its lead frame item used Download PDF

Info

Publication number
CN208336209U
CN208336209U CN201821097763.2U CN201821097763U CN208336209U CN 208336209 U CN208336209 U CN 208336209U CN 201821097763 U CN201821097763 U CN 201821097763U CN 208336209 U CN208336209 U CN 208336209U
Authority
CN
China
Prior art keywords
chip
chip mat
lead frame
semiconductor package
drainage trough
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201821097763.2U
Other languages
Chinese (zh)
Inventor
施云云
李刚
王明明
张建华
许志安
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Riyuexin Semiconductor Kunshan Co ltd
Original Assignee
Advanced Semiconductor Engineering Kunshan Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Engineering Kunshan Inc filed Critical Advanced Semiconductor Engineering Kunshan Inc
Priority to CN201821097763.2U priority Critical patent/CN208336209U/en
Application granted granted Critical
Publication of CN208336209U publication Critical patent/CN208336209U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

The utility model is about semiconductor package part and its lead frame item used.Include according to the semiconductor package part of an embodiment of the present invention: chip mat, several pins, integrated circuit component and insulation shell.The upper surface of the chip mat is equipped with Chip Area and an at least drainage trough, which is located on the outside of Chip Area.Several pins are set to the periphery of chip mat.The integrated circuit component is set in Chip Area.The insulation shell covers the chip mat, several pins and integrated circuit component.Mould can effectively be discharged compared to the prior art and flow back to bubble caused by packet for semiconductor package part provided by the embodiment of the utility model and its lead frame item used, to greatly improve the intracorporal empty situation of insulation shell after plastic packaging.

Description

Semiconductor package part and its lead frame item used
Technical field
The utility model relates to technical field of semiconductors, more particularly to semiconductor package part and its lead frame used Item.
Background technique
(SOIC, Small Outline Integrated is encapsulated in semiconductor package part, such as small outline integrated circuit Circuit Package) plastic packaging during, the upper and lower mould stream that structure to be packaged is likely to cause injection mold is uneven, And then cause to flow back to packet phenomenon in the exhaust end generation mould of mold.Mould, which flows back to packet, to cause hole being formed by inside plastic-sealed body Hole causes plastic packaging glue to be layered with structure to be packaged.Especially when structure to be packaged has design of Grounding Connections, mould flows back to packet Caused cavity also will cause wire bond fracture, and then cause semiconductor package part that can not work.
For this problem, is seeking easy, effective method always in the industry and be resolved.
Utility model content
One of the purpose of this utility model is the lead frame item for providing semiconductor package part and its using, the semiconductor Packaging part and its lead frame item used can avoid mould in injection moulding process and flow back to cavity caused by packet, guarantee that the performance of product is steady It is fixed.
An embodiment according to the present utility model, semiconductor packaging part includes: chip mat, several pins, integrated circuit Element and insulation shell.The upper surface of the chip mat is equipped with Chip Area and an at least drainage trough, which is located at patch On the outside of section.Several pins are set to the periphery of chip mat.The integrated circuit component is set in Chip Area.The insulation shell Cover the chip mat, several pins and integrated circuit component.
Another embodiment according to the present utility model, an at least drainage trough are located at the pin rareness side of the chip mat, should The corresponding number of pins in pin rareness side is fewer than other sides of the chip mat.An at least drainage trough may extend to the outer of chip mat Edge.The semiconductor package part can encapsulate for small outline integrated circuit.
The embodiments of the present invention also provide a lead frame item comprising several encapsulation units being arranged in array, And connect several connection straps of the neighbor in several encapsulation units.Wherein each encapsulation unit includes: chip mat, the chip The upper surface of pad is equipped with Chip Area and an at least drainage trough, which is located on the outside of the Chip Area;And several draw Foot is set to the periphery of the chip mat.
An embodiment according to the present utility model, each encapsulation unit can further include connect the chip mat it is several to this The connecting rod of corresponding person in connection strap, an at least drainage trough are located at the connecting rod rareness side of the chip mat, and the connecting rod is rare The corresponding connecting rod number in side is fewer than other sides of the chip mat.
Semiconductor package part and lead frame item provided by the embodiment of the utility model can by way of drainage trough is arranged Effectively discharge mould flows back to bubble caused by packet and semiconductor packages is effectively ensured to avoid the intracorporal cavity of insulation shell after plastic packaging The plastic packaging quality of part.
Detailed description of the invention
It is the schematic top plan view according to the lead frame item of an embodiment of the present invention shown in attached drawing 1
Fig. 2 to Fig. 5 demonstrates the plastic packaging process according to the semiconductor package part of an embodiment of the present invention
Specific embodiment
For the spirit for better understanding the utility model, it is made below in conjunction with the part preferred embodiment of the utility model It further illustrates.
Plastic packaging is the important ring in semiconductor packing process, and mould mobile equilibrium be then determine one of plastic packaging quality it is important Factor.During plastic packaging, some semiconductor package parts, especially SOIC semiconductor package part, due to the reason of structure, Chang Hui Cause the upper and lower mould stream of mold uneven.Upper and lower mould stream is uneven and then will lead in the insulation shell that die venting end is formed There are holes, cause the performance deficiency of semiconductor package part.It can be by reducing the thickness of the integrated circuit component of wanted plastic packaging, adjusting The design of whole lead frame adjusts process parameter to solve the problems, such as this.However these methods are not to all semiconductors Packaging part is all effective.
The utility model embodiment provides the novel solution that can be solved the above problems.According to the present utility model one implements Example, semiconductor packaging part includes: chip mat, several pins, integrated circuit component and insulation shell.The upper surface of the chip mat Equipped with Chip Area and an at least drainage trough, an at least drainage trough are located on the outside of Chip Area.Several pins are set to chip mat Periphery.The integrated circuit component is set in Chip Area.The insulation shell covers the chip mat, several pins and integrated circuit Element.
The embodiments of the present invention also provide a lead frame item comprising several encapsulation units being arranged in array, And connect several connection straps of the neighbor in several encapsulation units.Wherein each encapsulation unit includes: chip mat, the chip The upper surface of pad is equipped with Chip Area and an at least drainage trough, which is located on the outside of the Chip Area;And several draw Foot is set to the periphery of the chip mat.
Semiconductor package part and lead frame item provided by the embodiment of the utility model passes through in lead frame, such as chip mat A upper setting at least drainage trough, effectively can derive bubble in injection moulding process, thus even if when generation mould flows back to packet The bubble situation being formed by insulation shell can also significantly be improved.
It is the schematic top plan view according to the lead frame item 100 of an embodiment of the present invention shown in attached drawing 1.Such as this field It will be understood by the skilled person that in actual production, each lead frame item 100 all includes several encapsulation lists being arranged in array Member 12, the neighbor in several encapsulation units 12 are connected by several connection straps 14.Be in this specification it is clear, for purpose of brevity, Fig. 1 illustrates only one of encapsulation unit 12.
As shown in Figure 1, the encapsulation unit 12 includes chip mat 120, which is connected to connection by connecting rod 122 Item 14.The upper surface of the chip mat 120 is equipped with Chip Area 124 and an at least drainage trough 126, and at least a drainage trough 126 is located at for this 124 outside of Chip Area.The encapsulation unit 12 also may include several pins 128, which may be disposed at the chip mat 120 periphery.
This at least quantity, location and shape of a drainage trough 126 etc. specifically design can according to encapsulation unit 12 structure not It is same and different.Preferably, the potential mould that at least a drainage trough 126 is set to encapsulation unit 12 flows back to Bao Qu.The mould flows back to Structure sparse place of the encapsulation unit 12 at the exhaust end 130 of runner, such as connecting rod 122 and/or pin 128 can be located at by wrapping area Sparse place.Different lead frame items 100 may have different runner designs, and the sparse place of structure is also not quite similar, but ability Field technique personnel can determine that completely possible mould flows back to Bao Qu in design.It does not repeat herein.
In the present embodiment, which is three grooves disposed in parallel, is set to the company of encapsulation unit 12 Extension bar 122 and the sparse place of pin 128, i.e. right side in figure.Each drainage trough 126 may extend to the edge of chip mat 120.Other In embodiment, the lead frame of visual encapsulation unit 120 is designed and at least a drainage trough 126 is set as more or fewer by this Quantity, shape can also have different variations, the drainage trough 126 of for example, two snakelike extensions.
Fig. 2 to Fig. 5 demonstrates the plastic packaging process of the semiconductor package part 300 according to an embodiment of the present invention, should be partly Conductor packaging part 300 can be used to be manufactured according to the lead frame item 100 of the utility model embodiment, such as embodiment illustrated in fig. 1 Lead frame item 100.It is similar, Fig. 2 be into Fig. 5 it is clear, to illustrate only a wherein adjacent encapsulation for purpose of brevity single Member 12.Wherein Fig. 2 is the encapsulation unit 12 to plastic packaging in the schematic side view at injection molding initial stage, and plastic cement 34 is by gum-injecting port (not shown) The encapsulation unit 12 is just flowed into;Fig. 3 is the encapsulation unit 12 to plastic packaging in the schematic side view for being molded mid-term, but plastic cement 34 is also Exhaust end 130 is not reached (with reference to Fig. 1);Fig. 4 is the encapsulation unit 12 to plastic packaging in the schematic side view for being molded mid-term, plastic cement 34 It arrived exhaust end 130;Fig. 5 is the side view of the semiconductor package part 300 after the completion of injection molding.
As shown in Fig. 2 to 5, which is completed, such as patch, routing Deng.Correspondingly, should include chip mat 120 and the integrated circuit being installed on the chip mat 120 member to the encapsulation unit 12 of plastic packaging Part 30.Specifically, the chip mat 120, which is located at the exhaust end 130 of runner, is provided with an at least drainage trough 126, the integrated circuit Element 30 may be disposed in the Chip Area 124 (with reference to Fig. 1) of chip mat 120.
After injection molding starts, plastic cement 34, such as epoxy resin etc. are flowed along runner direction A, are gradually covered from gum-injecting port wait mould The encapsulation unit 12 of envelope, such as the integrated circuit component 30 on chip mat 120.When plastic cement 34 flows at least one drainage When 126 position of slot, the bubble 36 that is generated in injection molding can be guided by drainage trough 126 and in plastic cement 34 and lead frame item 100, such as Chip mat part positioned at exhaust end 130 is completely combined preceding discharge, to can effectively avoid 38 memory of insulation shell in formation Bubble.On the other hand, after due to fluting, what is become at the slotting position of chip mat 120 is coarse, can effectively increase lead frame The associativity of item 100 and plastic cement 34.
As shown in figure 5, the semiconductor package part 300 formed after injection molding includes chip mat 120, several pins 128, integrated electricity Circuit component 30 and insulation shell 28.The upper surface of the chip mat 120 is equipped with Chip Area 124 (referring to Fig. 1) and an at least drainage trough 126, which is located at 124 outside of Chip Area.Several pins 128 are set to the periphery of chip mat 120.It should Integrated circuit component 30 is set in Chip Area 124.As the skilled personnel can understand, although this specification embodiment One integrated circuit component 30 is only shown, so the integrated circuit component 30 can be multiple in other embodiments.The insulation shell 38 cover the chip mat 120, several pins 128 and integrated circuit component 30.
The technology contents and technical characterstic of the utility model have revealed that as above, however those skilled in the art still may be used Can teaching based on the utility model and announcement and make various replacements and modification without departing substantially from the spirit of the present invention.Therefore, originally The protection scope of utility model should be not limited to the revealed content of embodiment, and should include various replacing without departing substantially from the utility model It changes and modifies, and covered by present patent application claims.

Claims (9)

1. a kind of semiconductor package part, it is characterised in that the semiconductor package part includes:
The upper surface of chip mat, the chip mat is equipped with Chip Area and an at least drainage trough, and an at least drainage trough is located at institute It states on the outside of Chip Area;
Several pins are set to the periphery of the chip mat;
Integrated circuit component is set in the Chip Area;And
Insulation shell covers the chip mat, several pins and the integrated circuit component.
2. semiconductor package part as described in claim 1, wherein an at least drainage trough is located at the pin of the chip mat Rare side, the corresponding number of pins in pin rareness side are fewer than other sides of the chip mat.
3. semiconductor package part as described in claim 1, wherein the semiconductor package part is small outline integrated circuit encapsulation.
4. semiconductor package part as described in claim 1, wherein an at least drainage trough extends to the outer of the chip mat Edge.
5. a kind of lead frame item, it is characterised in that the lead frame item includes:
Several encapsulation units being arranged in array, wherein each encapsulation unit includes:
The upper surface of chip mat, the chip mat is equipped with Chip Area and an at least drainage trough, and an at least drainage trough is located at institute It states on the outside of Chip Area;And
Several pins are set to the periphery of the chip mat;And
Several connection straps connect the neighbor in several encapsulation units.
6. lead frame item as claimed in claim 5, wherein the pin that an at least drainage trough is located at the chip mat is dilute Few side, the corresponding number of pins in pin rareness side are fewer than other sides of the chip mat.
7. lead frame item as claimed in claim 5, wherein the lead frame item is configured for use in the integrated electricity of small shape Road encapsulation.
8. lead frame item as claimed in claim 5, wherein each encapsulation unit further includes the connection chip The connecting rod of the corresponding person into several connection straps is padded, the connecting rod that an at least drainage trough is located at the chip mat is rare Side, the corresponding connecting rod number in connecting rod rareness side are fewer than other sides of the chip mat.
9. lead frame item as claimed in claim 5, wherein an at least drainage trough extends to the outer rim of the chip mat.
CN201821097763.2U 2018-07-11 2018-07-11 Semiconductor package part and its lead frame item used Active CN208336209U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201821097763.2U CN208336209U (en) 2018-07-11 2018-07-11 Semiconductor package part and its lead frame item used

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201821097763.2U CN208336209U (en) 2018-07-11 2018-07-11 Semiconductor package part and its lead frame item used

Publications (1)

Publication Number Publication Date
CN208336209U true CN208336209U (en) 2019-01-04

Family

ID=64786721

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201821097763.2U Active CN208336209U (en) 2018-07-11 2018-07-11 Semiconductor package part and its lead frame item used

Country Status (1)

Country Link
CN (1) CN208336209U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108615715A (en) * 2018-07-11 2018-10-02 日月光半导体(昆山)有限公司 Semiconductor package and lead frame strip used by same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108615715A (en) * 2018-07-11 2018-10-02 日月光半导体(昆山)有限公司 Semiconductor package and lead frame strip used by same

Similar Documents

Publication Publication Date Title
CN204102862U (en) A kind of based on bulk technology multi-chip superposition packaging system
CN205177839U (en) System level packaging circuit of airtight type ceramic package
US20070090545A1 (en) Semiconductor device with improved encapsulation
US8415778B2 (en) Non-leaded integrated circuit package system with multiple ground sites
CN208336209U (en) Semiconductor package part and its lead frame item used
CN108615715A (en) Semiconductor package and lead frame strip used by same
US20130071505A1 (en) Molding device for semiconductor chip package
CN208336207U (en) A kind of biradical island lead frame frame and its SOT33-5L packaging part
CN102651360B (en) Packaging body structure capable of realizing copper wire keyed joint and manufacturing method thereof
CN207503966U (en) Suitable for eight row lead frame of TO251 types of continuous filling technique
KR102407742B1 (en) Manufacturing Method of Resin-Molded Lead Frame, Manufacturing Method of Resin-Molded Product and Lead Frame
CN108878299A (en) The preparation method of frame clsss integrated circuit Plastic Package is carried out by laser
CN208674105U (en) Lead frame and the packaging body for using the lead frame
CN107731775A (en) Suitable for the row lead frame of TO251 types eight of continuous filling technique
CN207800552U (en) A kind of integrated circuit packaging mould that modularization is replaceable
CN208507660U (en) Lead frame and semiconductor packing device
CN103594429B (en) Semiconductor packaging structure and heat radiating piece thereof
CN105161479B (en) Lead frame item and the method for packaging semiconductor for using the lead frame item
CN205319144U (en) Encapsulation chip's structure
CN103130173B (en) For MEMS chip encapsulation without little island lead frame, array of leadframes and encapsulating structure
CN212967687U (en) Lead frame
CN208923090U (en) Outline Package TSOP encapsulating structure
CN109360813A (en) A kind of the RF radio frequency products encapsulating structure and packaging method of cavity structure
CN204271072U (en) Lead-frame packages structure
CN209691721U (en) Semiconductor packaging mold and semiconductor element

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant
CP03 Change of name, title or address
CP03 Change of name, title or address

Address after: 215341 No. 497, Huangpujiang South Road, Qiandeng Town, Kunshan City, Suzhou City, Jiangsu Province

Patentee after: Riyuexin semiconductor (Kunshan) Co.,Ltd.

Address before: No.373, Songnan Road, Qiandeng Town, Kunshan City, Suzhou City, Jiangsu Province

Patentee before: ADVANCED SEMICONDUCTOR ENGINEERING (KUNSHAN) Ltd.