CN207965048U - The test system of Imbedded Flash chip - Google Patents
The test system of Imbedded Flash chip Download PDFInfo
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- CN207965048U CN207965048U CN201720507334.7U CN201720507334U CN207965048U CN 207965048 U CN207965048 U CN 207965048U CN 201720507334 U CN201720507334 U CN 201720507334U CN 207965048 U CN207965048 U CN 207965048U
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Abstract
A kind of test system of Imbedded Flash chip, test system include：Test machine, testboard, the first probe card, the second probe card and wafer, wherein：Wafer is arranged on the testboard, is suitable for carrying all Imbedded Flash chips to be tested；Coupling may be selected with the first probe card and the second probe card in test machine, is suitable for control testboard movement, first group of conductive gasket of the Imbedded Flash chip to be tested of selected sets is connect with the first probe card；The Flash modules of the Imbedded Flash chip to be tested of selected sets test until completing the test to the Flash modules of all Imbedded Flash chips to be tested；Control testboard movement, second group of conductive gasket of the Imbedded Flash chip to be tested of selected sets to be connect with the second probe card, other modules in the Imbedded Flash chip to be tested of selected sets in addition to Flash modules are tested, until completing the test to other modules in all Imbedded Flash chips to be tested in addition to Flash modules.Said program can improve test resource utilization ratio.
Description
Technical field
The utility model is related to wafer test field more particularly to a kind of test systems of Imbedded Flash chip.
Background technology
In wafer production process, due to factors such as design, techniques, cause to generate a certain amount of bad chip on wafer.
To reduce packaging cost, the bad chip on wafer can be rejected by wafer test (Chip Probing, CP).Therefore,
Under the premise of ensureing the accuracy of CP, CP efficiency is improved, reduces CP cost ever more importants.
In the prior art, lead to ensure that chip functions are perfect, performance is stablized in the CP stages to embedding Flash chip
Each unit in chip can often be tested.When testing the Flash modules in chip, need to Flash moulds
The storage unit of block carries out various read operations, write operation and erasing operation, to cover in actual use
Each situation.Currently, being tested spent duration to the Flash modules in chip accounts for entire chip testing duration
70%.
It is existing to there is a problem of that test resource utilization ratio is relatively low to the CP methods for embedding Flash chip.
Utility model content
What the utility model embodiment solved is how to improve the test resource utilization ratio of Imbedded Flash chip.
In order to solve the above technical problems, the utility model embodiment provides a kind of test system of Imbedded Flash chip,
Imbedded Flash chip to be tested includes Flash modules, and the conductive gasket of the Imbedded Flash chip to be tested includes first group
Conductive gasket and second group of conductive gasket, first group of conductive gasket are in the Imbedded Flash chip to be tested
Flash modules carry out testing required conductive gasket, and second group of conductive gasket is to the Imbedded Flash chip to be tested
In other modules in addition to Flash modules carry out testing required conductive gasket；All Imbedded Flash chips to be tested are divided
To be multigroup, the test system includes：Test machine, the first probe card, the second probe card and wafer, wherein：The test system
System includes：Test machine, the first probe card, the second probe card and wafer, wherein：The wafer, suitable for carrying described needed
Imbedded Flash chip is tested, the Imbedded Flash chip to be tested is divided into multigroup；The test machine, with the testboard coupling
It connects, and coupling may be selected with first probe card and second probe card, be suitable for controlling the testboard movement, it will
First group of conductive gasket of the Imbedded Flash chip to be tested of selected sets is connect with first probe card；To the selected sets
Imbedded Flash chip to be tested Flash modules test until complete to all Imbedded Flash chips to be tested
The test of Flash modules；The testboard movement is controlled, second group of the Imbedded Flash chip to be tested of selected sets is led
Electricity liner connect with second probe card, in the Imbedded Flash chip to be tested of the selected sets in addition to Flash modules
Other modules tested, until complete to other moulds in all Imbedded Flash chips to be tested in addition to Flash modules
The test of block；First probe card is suitable for first group of conductive gasket with the Imbedded Flash chip to be tested of the selected sets
Connection；Second probe card is suitable for connecting with second group of conductive gasket of the Imbedded Flash chip to be tested of the selected sets
It connects.
Optionally, the Imbedded Flash chip to be tested includes and the serioparallel exchange of the Flash module couples of itself is electric
Road；The test machine, be suitable for being time-multiplexed at least one of serial-parallel conversion circuit interface, to the Flash modules
Multiple interfaces send test signal, are tested with each interface to the Flash modules.
Optionally, the conductive gasket of the Imbedded Flash chip to be tested meets following condition：It is described to be tested embedded
At a distance between projection of the conductive gasket of Flash chip in the vertical direction of the Imbedded Flash chip to be tested ground
More than pre-determined distance, and the edge after the conductive gasket projection of the Imbedded Flash chip to be tested is in straight line or two
On parallel lines.
Optionally, the test system of the Imbedded Flash chip further includes：With the apparatus for baking of test machine coupling；
The test machine sequentially carries out the first test, control suitable for the Flash modules to the group chosen Imbedded Flash chip to be tested
Apparatus for baking processed toasts the wafer, carries out second and tests and obtain test result；First test includes as follows
It is at least one：It writes functional test, read functional test, erasing functional test and BIST functional tests；It is described second test include
It is following at least one：It writes functional test, read Flash moulds after functional test, erasing functional test, BIST functional tests and baking
The test whether data stored in block lose.
Compared with prior art, the technical solution of the utility model embodiment has the advantages that：
When testing Imbedded Flash chip to be tested, controller controls testboard movement so that the first probe card
It is connect with first group of conductive gasket of the Imbedded Flash chip to be tested of selected sets, to the Imbedded Flash core to be tested of selected sets
The Flash modules of piece are tested, and controller repeats the above steps until completing to all Imbedded Flash chips to be tested
Flash modules are tested.Due to when the Flash modules to Imbedded Flash chip to be tested are tested, the first probe card
Only it is connect with first group of conductive gasket of the Imbedded Flash chip to be tested of selected sets, rather than it is to be tested interior with selected sets
All conductive gaskets of embedding Flash chip connect, therefore, be effectively improved the first probe card can connect simultaneously it is to be tested
The quantity of Imbedded Flash chip, namely the same survey number of the first probe card is improved, it is thus possible to improve the utilization of test resource
Efficiency.
Further, it in the serial-parallel conversion circuit of Imbedded Flash chip interior to be tested setting and Flash module couples, presses
According to chronological order, at least one of multiplexing serial-parallel conversion circuit interface sends to multiple interfaces of Flash modules and tests
Signal, realization are tested each interface of Flash modules, are used without each interface for Flash modules
One interface circuit is tested, so as to save the test resource to being used when Flash module testings, therefore can be more into one
Step ground improves the utilization ratio of test resource, and raising is same to survey number.
Description of the drawings
Fig. 1 is a kind of structural schematic diagram of the test system of Imbedded Flash chip in the utility model embodiment；
Fig. 2 is the fundamental diagram of the test system of the Imbedded Flash chip provided in the utility model embodiment；
Fig. 3 is a kind of internal structure chart of Imbedded Flash chip in the utility model embodiment；
Fig. 4 is a kind of internal structure chart of Imbedded Flash chip in the utility model embodiment；
Fig. 5 is a kind of conductive gasket distribution schematic diagram of ideal Imbedded Flash chip；
Fig. 6 is a kind of conductive gasket distribution schematic diagram of underproof Imbedded Flash chip.
Specific implementation mode
In the prior art, lead to ensure that chip functions are perfect, performance is stablized in the CP stages to embedding Flash chip
Each unit in chip can often be tested.When testing the Flash modules in chip, need to Flash moulds
The storage unit of block carries out various read operations, write operation and erasing operation, to cover in actual use
Each situation.
Currently, tested that spent duration accounts for entire chip testing duration to the Flash modules in chip 70%.
When testing embedded Flash chip, the test resource in test machine includes the test money tested Flash modules
Source and the test resource that other modules of non-Flash modules are tested.When testing Flash modules, test
Machine calls the test resource tested Flash modules, the test resource tested other modules of non-Flash modules
In idle state.Therefore, existing to there is a problem of that test resource utilization ratio is relatively low to the CP methods for embedding Flash chip.
In the utility model embodiment, when the Flash modules to Imbedded Flash chip to be tested are tested, the
One probe card is only connect with first group of conductive gasket of the Imbedded Flash chip to be tested of selected sets, rather than with selected sets
All conductive gaskets of Imbedded Flash chip to be tested connect, and therefore, are effectively improved what the first probe card connected simultaneously
The quantity of Imbedded Flash chip to be tested, namely the same survey number of the first probe card is improved, it is thus possible to improve test resource
Utilization ratio.
It is understandable to enable the above-mentioned purpose, feature and advantageous effect of the utility model to become apparent, below in conjunction with the accompanying drawings
Specific embodiment of the utility model is described in detail.
Referring to Fig.1, the structure for giving a kind of test system of Imbedded Flash chip in the utility model embodiment is shown
Be intended to, the Imbedded Flash chip to be tested that the test system is tested includes Flash modules, and remove Flash modules it
Other outer modules.
In specific implementation, the test system of Imbedded Flash chip may include：Test machine 61, testboard 62, first are visited
Needle card 63, the second probe card 64 and wafer 65.
In specific implementation, the wafer 65 is arranged on the testboard 62, is suitable for carrying all to be tested embedded
Flash chip.As shown in Figure 1, on wafer 65, two groups of Imbedded Flash chips to be tested are carried：Chip 66 and chip 67.
It is understood that in practical applications, the group number of the Imbedded Flash chip to be tested carried on wafer 65 can be it is multigroup,
Two groups of Imbedded Flash chips 66 and chip 67 to be tested shown in FIG. 1 are only used for schematically illustrate in the utility model embodiment, and
The group number of Imbedded Flash chip to be tested on wafer 65 is not construed as limiting.
In specific implementation, the test machine 61, with the testboard 62 couple, and respectively with first probe card 63
And coupling may be selected in second probe card 64.During the test, test machine 61 is suitable for the control movement of testboard 62.Due to
Wafer 65 is arranged on testboard 62, and therefore, when testboard 62 moves, wafer 65 moves.Test machine 61 passes through control
Testboard 62 moves that wafer 65 is driven to move, so as to lead first group of the Imbedded Flash chip to be tested of selected sets
Electricity liner is connect with the first probe card 63.When the first probe card 63 and first group of the Imbedded Flash chip to be tested of selected sets
After conductive gasket connection, test machine 61 can export test signal, so as to the Imbedded Flash chip to be tested to selected sets
Flash modules tested.After completing the test to the Flash modules of the Imbedded Flash chip to be tested of selected sets, survey
Test-run a machine 61 can continue to control testboard 62 moves, and drives wafer 65 to move with this, to be tested embedded by next group
First group of conductive gasket of Flash chip is connect with the first probe card 63, to next group of Imbedded Flash chip to be tested
Flash modules are tested.And so on, until completing the survey to the Flash modules of all Imbedded Flash chips to be tested
Examination.
Test machine 61 can control testboard 62 after completing to the Flash tests of all Imbedded Flash chips to be tested
It is mobile, second group of conductive gasket of the Imbedded Flash chip to be tested of selected sets is connect with the second probe card 64.It is empty in figure
Line indicates that the first probe card and the second probe card timesharing use.When the Imbedded Flash to be tested of the second probe card 64 and selected sets
After second group of conductive gasket connection of chip, test machine 61 can be to removing Flash in the Imbedded Flash chip to be tested of selected sets
Other modules except module are tested.Test machine 61 removes in completing to the Imbedded Flash chip to be tested of selected sets
After other modules except Flash are tested, the movement of testboard 62 can be controlled, by next group of Imbedded Flash to be tested
Second group of conductive gasket of chip is connect with the second probe card 64, to being removed in next group of Imbedded Flash chip to be tested
Other modules except Flash modules are tested.And so on, until completing to all Imbedded Flash chips to be tested
Test.
In specific implementation, further include the Flash module couples with itself in the Imbedded Flash chip to be tested
Serial-parallel conversion circuit.Test machine can be according to the sequencing of time, and at least one of the serial-parallel conversion circuit that is time-multiplexed connects
Mouthful, test signal is sent to multiple interfaces of Flash modules, is tested with each interface to Flash modules.
It is understood that in specific implementation, in the test system of Imbedded Flash chip, the number of probe card is not
There is provided in the utility model above-described embodiment two are only limitted to, can also be three or more.For example, Imbedded Flash core
In the test system of piece, including the first probe card, the second probe card and third probe card.In the utility model above-described embodiment
The number of the probe card of offer does not constitute the number of probe card and limits.
It is former to the work of the test system of the Imbedded Flash chip provided in the utility model above-described embodiment with reference to Fig. 2
Reason illustrates.
Step S201, control testboard movement so that the Imbedded Flash chip to be tested of the first probe card and selected sets
First group of conductive gasket connection.
In practical applications, Imbedded Flash built-in chip type to be tested has Flash modules.To Imbedded Flash core to be tested
When piece is tested, for ensure chip can work normally, can to the Flash modules in Imbedded Flash chip to be tested with
And other modules in addition to Flash modules are tested.Imbedded Flash chip to be tested can be distributed on wafer.It is logical
In the case of often, wafer area is larger, and the number of Imbedded Flash chip to be tested thereon is more, therefore, can be in advance by wafer
On Imbedded Flash chip to be tested be divided into it is multigroup.
In practical applications it is found that when the Flash modules to Imbedded Flash chip to be tested are tested, it is only necessary to
The partially electronically conductive liner in Imbedded Flash chip to be tested is used, therefore, in specific implementation, to be tested can will be embedded
Conductive gasket in Flash chip for Flash module testings is known as first group of conductive gasket.To Imbedded Flash to be tested
When chip is grouped, the number of each group of Imbedded Flash chip to be tested can be according to the number of probes in the first probe card
And the number of first group of conductive gasket of every Imbedded Flash chip to be tested determines.
The number of probes in the first probe card is set as N, is surveyed for Flash modules in every Imbedded Flash chip to be tested
The number of first group of conductive gasket of examination is M, then the number of each group of Imbedded Flash chip to be tested is int (N/M), int
(N/M) it is to N/M roundings.
For example, N=40, M=13, then the number of each group of Imbedded Flash chip to be tested is int (40/13)=3,
Namely the number of the Imbedded Flash chip to be tested in each group is 3.
In specific implementation, when testing Imbedded Flash chip to be tested, to be tested embedded as unit of group
Flash chip is tested.When the Imbedded Flash chip to be tested to selected sets is tested, test machine can be controlled first
Testboard moves so that first group of conductive gasket of the Imbedded Flash chip to be tested of the first probe card and selected sets connects, real
First group of conductive gasket foundation of the Imbedded Flash chip to be tested of probe and selected sets in existing first probe card electrically connects
It connects.The Imbedded Flash core to be tested of probe and selected sets since test machine is connect with the first probe card, and in the first probe card
First group of conductive gasket of piece is electrically connected, and is surveyed at this point, test machine can be sent to the Imbedded Flash chip to be tested of selected sets
Trial signal is tested with the Imbedded Flash chip to be tested to selected sets.
That is, during the test, the probe role in the first probe card is by test machine and selected sets
Imbedded Flash chip to be tested establish be electrically connected so that test machine can be to the Imbedded Flash to be tested of selected sets
Chip sends test signal, is tested with the Imbedded Flash chip to be tested to selected sets.
Step S202 tests the Flash modules of the Imbedded Flash chip to be tested of the selected sets.
In specific implementation, the first of the probe in the first probe card and the Imbedded Flash chip to be tested of selected sets
Group conductive gasket is established be electrically connected after, test machine can to the Flash modules of the Imbedded Flash chip to be tested of selected sets into
Row test.
In practical applications it is found that testing Flash modules, may include to the storage units of Flash modules into
The tests such as a series of read operation of row, write operation and erasing operation.
Step S203, control testboard movement so that the of the first probe card and next group of Imbedded Flash chip to be tested
One group of conductive gasket connection, and the Flash modules of described next group Imbedded Flash chip to be tested are tested.
In specific implementation, test machine is in the survey for completing the Flash modules to the Imbedded Flash chip to be tested of selected sets
After examination, testboard movement can be controlled to drive wafer to move so that probe in the first probe card with next group it is to be tested in
First group of conductive gasket of embedding Flash chip connects, and is carried out to the Flash modules of next group of Imbedded Flash chip to be tested
Test.
From the utility model above-described embodiment it is found that Imbedded Flash chip to be tested be divided into it is multigroup.Set selected sets
Imbedded Flash chip to be tested be first group of Imbedded Flash chip to be tested, then in specific implementation, test machine is completed
After the test of the Flash modules of first group of Imbedded Flash chip to be tested, testboard movement can be controlled to drive wafer to move
It is dynamic so that the first probe card is connect with first group of conductive gasket of second group of Imbedded Flash chip to be tested, and is waited for second group
The Flash modules of test Imbedded Flash chip are tested；Complete the Flash to second group of Imbedded Flash chip to be tested
After the test of module, test machine controls testboard movement to drive wafer to move again so that the first probe card and third group are to be measured
Try Imbedded Flash chip first group of conductive gasket connection and to the Flash modules of third group Imbedded Flash chip to be tested into
Row test.And so on, test machine control testboard movement to drive wafer to move so that the first probe card respectively on wafer
First group of conductive gasket of the Imbedded Flash chip to be tested of all groupings connects, to complete to all to be measured on wafer
The Flash modules of examination Imbedded Flash chip are tested.
For example, all Imbedded Flash chips to be tested are divided into n groups.At the t1 moment, test machine control testboard movement with
Driving wafer movement so that the first probe card is connect with first group of conductive gasket of first group of Imbedded Flash chip to be tested, and
The Flash modules of first group of Imbedded Flash chip to be tested are tested.At the t2 moment, test machine completion waits for first group
The test of the Flash modules of Imbedded Flash chip is tested, control testboard movement is to drive wafer to move so that the first probe
Card is connect with first group of conductive gasket of second group of Imbedded Flash chip to be tested, and to second group of Imbedded Flash core to be tested
The Flash modules of piece are tested.Cycle executes the above process, until completing the Imbedded Flash core to be tested to all groupings
The Flash modules of piece are tested.
In specific implementation, test machine is tested in the Flash modules of the Imbedded Flash chip to be tested to selected sets
When, can be the first test, the first test to the test that the Flash modules of the Imbedded Flash chip to be tested of selected sets carry out
May include：Write functional test, read functional test, erasing functional test, it is self-built it is interior test (Built-In Self Test,
BIST) at least one of functional test etc..Namely the Imbedded Flash chip to be tested to selected sets Flash modules into
When row test, surveyed by carrying out reading functional test to Flash modules, writing functional test, erasing functional test and BIST functions
Examination etc., to verify whether Flash modules can work normally.
After completing the first test, test machine can control to be tested Imbedded Flash chip of the apparatus for baking to selected sets
Wafer toasted.After completing to toast, test machine to the Flash modules of the Imbedded Flash chip to be tested of selected sets into
Whether row second is tested, can with verifying the Flash modules of Imbedded Flash chip to be tested of the selected sets after overbaking
Normal work.Second test may include：Write functional test, read functional test, erasing functional test, BIST functional tests and
At least one of the test whether data stored in Flash modules after baking lose.
In practical applications, the first test and the second test can be carried out at different temperatures.For example, being carried out at 85 DEG C
First test carries out the second test at 25 DEG C.
Correspondingly, it when the Flash modules to next group of Imbedded Flash chip to be tested are tested, is referred to
The testing process tested the Flash modules of the Imbedded Flash chip to be tested of selected sets is stated, is not repeated herein.
Step S201~step S203 is executed in cycle, until test machine is completed to all Imbedded Flash chips to be tested
Flash modules tested after, test machine can execute step S204.
Step S204, control testboard movement so that the Imbedded Flash chip to be tested of the second probe card and selected sets
Second group of conductive gasket connection, and to other modules in the Imbedded Flash chip to be tested of selected sets in addition to Flash modules
It is tested.
In practical applications, a usual test machine corresponds to a probe card.Therefore, if the number of test machine is 1,
Testboard movement is controlled to drive wafer to move so that the of the Imbedded Flash chip to be tested of the second probe card and selected sets
Before two groups of conductive gasket connections, the first probe card on test machine is first changed, and change the second probe card.Changing the second spy
After needle card, control testboard movement is to drive wafer to move so that the Imbedded Flash to be tested of the second probe card and selected sets
Second group of conductive gasket of chip connects.
If test machine is multiple, the first probe card is located at different test machines from the second probe card.Executing step
When rapid S204, testboard can be controlled by other test machines for being equipped with the second probe card and moved to drive wafer to move so that
Second group of conductive gasket of the Imbedded Flash chip to be tested of the second probe card and selected sets connects, without changing test machine
On the first probe card, and change the second probe card.
For example, the first probe card is mounted on test machine 1, the second probe card is mounted on test machine 2.Then by test machine 1
Testboard movement is controlled, the operation of step S201~step S203 is completed by the first probe card, testboard is controlled by test machine 2
It is mobile, the operation of step S204~step S205 is completed by the second probe card.
In specific implementation, second group of conductive gasket is in Imbedded Flash chip to be tested in addition to Flash modules
Other module testings needed for conductive gasket.In practical applications, between first group of conductive gasket and second group of conductive gasket
There may be intersections namely partially electronically conductive liner can be not only used for testing Flash modules, can be used for removing Flash
Other modules except module are tested.
In specific implementation, the second probe card and selected sets Imbedded Flash chip to be tested second group of conductive liner
After pad connection, test machine can send test signal to the Imbedded Flash chip to be tested of selected sets, to wait for selected sets
Other modules in test Imbedded Flash chip in addition to Flash modules are tested.
In specific implementation, the first probe card can be arranged with the second probe card on same probe station, or setting exists
On different probe stations.Test machine realizes the first conductive liner on the Imbedded Flash chip to be tested in wafer by probe card
Pad and/or the second conductive gasket and test machine are stably connected with, to realize to each of wafer Imbedded Flash core to be tested
Piece is tested.
In specific implementation, for different Imbedded Flash chips to be tested, other modules in addition to Flash modules
It may be different.In the utility model embodiment, other modules in Imbedded Flash chip to be tested in addition to Flash modules
May include the one or more such as analog-digital converter, low pressure difference linearity voltage regulation unit, reference voltage generation unit, crystal oscillator unit.
In specific implementation, in step S204 the Imbedded Flash chip to be tested of selected sets number, and in step S201
The number of the Imbedded Flash chip to be tested of selected sets can be equal, can not also wait.Selected sets is to be tested in step S201
The number of Imbedded Flash chip, can according in the first probe card number of probes and every Imbedded Flash chip to be tested in
The number of first group of conductive gasket for Flash module testings determines.Correspondingly, in step S204 selected sets it is to be tested in
The number of embedding Flash chip, can be with and according in number of probes in the second probe card and every Imbedded Flash chip to be tested
The number of second group of conductive gasket for other module testings determines.
Step S205, control testboard movement so that the of the second probe card and next group of Imbedded Flash chip to be tested
Two groups of conductive gasket connections, and to other modules in described next group Imbedded Flash chip to be tested in addition to Flash modules
It is tested.
In specific implementation, when test machine complete to the Imbedded Flash chip to be tested of selected sets in except Flash modules it
After other outer modules are tested, testboard movement can be controlled so that the second probe card is to be tested embedded with next group
Second group of conductive gasket of Flash chip connects, so to removed in next group of Imbedded Flash chip to be tested Flash modules it
Other outer modules are tested.Cycle executes step S204~step S205, can complete to all Imbedded Flashs to be tested
Other modules in chip in addition to Flash modules are tested.
In the prior art, when testing Imbedded Flash chip to be tested, control probe card is embedded with to be tested
The conductive gasket of Flash chip establishes connection.First the Flash modules of Imbedded Flash chip to be tested are tested, Zhi Houzai
Other modules in Imbedded Flash chip to be tested in addition to Flash modules are tested.In entire test process, visit
Probe on needle card needs to establish electricity with first group of conductive gasket of Imbedded Flash chip to be tested and second group of conductive gasket
Property connection.
And in the utility model embodiment, when testing Imbedded Flash chip to be tested, control testboard moves
It is dynamic so that the first probe card is connect with first group of conductive gasket of the one group of Imbedded Flash chip to be tested chosen, to what is chosen
The Flash modules of one group of Imbedded Flash chip to be tested are tested, and are repeated the above steps until completing to all to be tested interior
The Flash modules of embedding Flash chip are tested.Due to being tested in the Flash modules to Imbedded Flash chip to be tested
When, the first probe card is only connect with first group of conductive gasket of Imbedded Flash chip to be tested, rather than by the first probe card with
All conductive gaskets of Imbedded Flash chip to be tested connect, and therefore, are effectively improved what the first probe card connected simultaneously
The quantity of Imbedded Flash chip to be tested, namely the same survey number of the first probe card is improved, it is thus possible to improve test resource
Utilization rate, improve the testing efficiency of Imbedded Flash chip to be tested.
For example, when testing Imbedded Flash chip to be tested, leading on every Imbedded Flash chip to be tested
Electricity liner number is 50.The conductive gasket number of first group of required conductive gasket is 13, the conduction of required second group of conductive gasket
It is 40 to pad number, and there are intersections for first group of conductive gasket and second group of conductive gasket.
Number of probes in probe card is set as 500, then uses scheme in the prior art, probe card that can test simultaneously
500/50=10 Imbedded Flash chips to be tested can also test 10 Imbedded Flash chips to be tested simultaneously
Flash modules.And the scheme provided in the utility model embodiment is provided, probe card can be simultaneously to int (500/13)=38
The Flash modules of a Imbedded Flash chip to be tested are tested namely one group of Imbedded Flash chip to be tested can be 38
It is a.
It can be seen that in the case that number of probes on the probe card is constant, the side that is provided in the utility model embodiment
Case can increase substantially the Imbedded Flash number of chips to be tested for being carried out at the same time Flash module testings.
In specific implementation, in Imbedded Flash chip to be tested, the Flash module couples with itself can also be set
Serial-parallel conversion circuit.Test machine when the Flash modules of one group of Imbedded Flash chip to be tested to choosing are tested,
It can be multiplexed at least one of serial-parallel conversion circuit interface according to the sequencing of time, it is to be tested interior to one group chosen
Multiple interfaces of the Flash modules of embedding Flash chip send test signal, with to choose one group of Imbedded Flash core to be tested
Each interface of the Flash modules of piece is tested.
It is illustrated referring to Fig. 3~Fig. 4.
With reference to Fig. 3, a kind of internal structure chart of existing Imbedded Flash chip is given.It is to be tested embedded in Fig. 3
The Flash modules 21 of Flash chip 2 include 21 interfaces, are followed successively by VSS interfaces, VROUT interfaces, High_voltage_neg
Interface, High_voltage_pos interfaces, VDD interfaces, Address interfaces, DIN interfaces, DOUT interfaces, Trig interfaces,
Flash_select interfaces, Tm_en interfaces, Tm_reg interfaces, Program interfaces, page_erase interfaces, Mass_erase connect
Mouth, Amp_en interfaces, Output_en interfaces, Reset interfaces, Info0_en interfaces, Info1_en interfaces and Non_
Volatile_store interfaces, above-mentioned 21 interfaces are coupled with the I/O interfaces in Imbedded Flash chip 2, wherein：VSS interfaces
Channel supply unit (Device Power Supply, DPS) of ground connection, High_voltage_pos interfaces and test machine connects,
High_voltage_neg interfaces are not take up test machine resource in testing, thus remaining 18 interface respectively with the number of test machine
Word channel connects, that is to say, that in the prior art, when testing the Flash modules 21 of Imbedded Flash chip 2 to be tested,
Test machine needs to provide at least 18 digital channels and 1 channel DPS.I/O interfaces, other digital circuits involved in figure,
Other analog circuits, other test circuits are depending on the different size of Imbedded Flash chip, connection relation, circuit function, survey
Examination mode is not done to be introduced one by one.
With reference to Fig. 4, a kind of internal structure of Imbedded Flash chip to be tested in the utility model embodiment is given
Figure.In Fig. 4, Flash modules 21 and the serial-parallel conversion circuit 22 of Imbedded Flash chip 2 to be tested couple, the serial-parallel conversion circuit
22 turn comprising transformation from serial to parallel and parallel serial function.Imbedded Flash chip 2 to be tested include VDD interfaces, VSS interfaces,
High_voltage_pos interfaces, High_voltage_neg interfaces, VROUT interfaces, SMTEN interfaces, SCE interfaces, SCK interfaces
And SDA interfaces.SMTEN interfaces, SCE interfaces, SCK interfaces and the SDA interface of serial-parallel conversion circuit 22 are and Imbedded Flash
I/O interfaces coupling in chip 2, VDD interfaces, VSS interfaces, High_voltage_pos interfaces, the High_ of Flash modules 21
Voltage_neg interfaces, VROUT interfaces are coupled with the I/O interfaces in Imbedded Flash chip 2.Imbedded Flash core to be tested
The VSS interfaces and High_voltage_neg interfaces of piece 2 are not take up the test resource of test machine, and High_voltage_pos connects
Mouth is connect with the channels DPS of test machine, and therefore, the interface that digital channel is occupied on Imbedded Flash chip 2 to be tested is：VDD connects
Mouth, VROUT interfaces, SMTEN interfaces, SCE interfaces, SCK interfaces and SDA interfaces.
Test machine by be multiplexed the High_voltage_neg interfaces of Imbedded Flash chip 2 to be tested, VROUT interfaces,
One or more of SMTEN interfaces, SCE interfaces, SCK interfaces and SDA interfaces, realization connect each of Flash modules 21
Mouth is tested.I/O interfaces, other digital circuits, other analog circuits, other test circuits involved in figure regard embedded
Depending on the different size of Flash chip, connection relation, circuit function, test mode are not done and are introduced one by one.
That is, in the utility model embodiment, test machine only needs to provide 1 channel DPS and 6 numbers are logical
Road, each digital channel correspond to an interface.Test machine can be multiplexed one or more of 6 digital channels, in difference
Period in, test signal is sent to Flash moulds distinct interface in the block successively, with to interface different in Flash modules
It is tested.Correspondingly, test machine the distinct interface of same interface Flash modules feedback signal, it is anti-by receiving
The time difference of feedback signal distinguishes the feedback signal of distinct interface, obtaining corresponding test result, so as to realize pair
The Flash modules of one Imbedded Flash chip to be tested are tested.
It can be seen that the scheme in the utility model embodiment can effectively reduce the need to the test resource of test machine
The number of Imbedded Flash chip to be tested for asking, therefore being effectively increased while testing, namely increase with surveying number.
In specific implementation, the conductive gasket on Imbedded Flash chip to be tested may include first group of conductive gasket with
And second group of conductive gasket, there may be intersection between first group of conductive gasket and second group of conductive gasket.In practical application
In, the conductive gasket on Imbedded Flash chip to be tested may be not limited in first group of conductive gasket and second group is conductive
Liner can also include other conductive gaskets, such as the corresponding conductive gasket of power pins etc..
When carrying out the design of Imbedded Flash chip to be tested, for ease of the Imbedded Flash core to be tested to complete design
Piece is tested, and the distribution of the conductive gasket on Imbedded Flash chip to be tested can meet following condition：It is to be tested embedded
It is more than pre-determined distance at a distance between projection of the conductive gasket of Flash chip in die bottom surface vertical direction, and to be measured
Try the projecting edge of the conductive gasket of Imbedded Flash chip point-blank.
In specific implementation, the conductive gasket of Imbedded Flash chip to be tested with the throwing in die bottom surface vertical direction
The distance between shadow refers to more than pre-determined distance：All conductive gaskets are not deposited between the projection in die bottom surface vertical direction
It is being overlapped.In practical applications, refer to there is no Chong Die between projection of the conductive gasket in die bottom surface vertical direction：Appoint
It is more than 56 μm at a distance between projection of the two adjacent conductive liners of meaning in die bottom surface vertical direction.
In specific implementation, the conductive gasket of Imbedded Flash chip to be tested with the throwing in die bottom surface vertical direction
Shadow edge is point-blank.If for special consideration, the conductive gasket of Imbedded Flash chip to be tested hangs down with die bottom surface
The upward projecting edge of histogram can also be on two parallel lines.
With reference to Fig. 5, a kind of conductive gasket distribution schematic diagram of ideal Imbedded Flash chip is given.In Fig. 5,41 are
With the projection on die bottom surface vertical direction Z.It is known that all conductive gaskets of Imbedded Flash chip to be tested from Fig. 5
Overlapping is not present in projections of the 1~n in Y-axis, and the edge of all conductive gaskets is point-blank.
With reference to Fig. 6, a kind of conductive gasket distribution schematic diagram of underproof Imbedded Flash chip is given.In conjunction with Fig. 5,
From in Fig. 6 it is known that there is overlapping, conductive liner in projection of the conductive gasket 2,3 of Imbedded Flash chip to be tested in Y-axis
There is overlapping in projection of the pad 1,4,5,8 in X-axis, the edge of all 1~n of conductive gasket is not arranged on the same straight line.
In specific implementation, after the design for completing Imbedded Flash chip to be tested, to Imbedded Flash chip to be tested
It is tested.In a particular application, it can design the minimum test completed needed for Flash module testings according to testing requirement and connect
Mouthful.After obtaining the minimum test interface needed for Flash module testings, according to the conductive gasket of Imbedded Flash chip to be tested
Distribution coordinate and test machine resource, come calculate with survey number.According to same survey number, to assess whether that correspondence can be produced
Probe card, and whether the probe card produced match with existing probe station.It, can if evaluating probe card to be difficult to make
It is adjusted with the conductive gasket to Imbedded Flash chip to be tested, and same survey number is adjusted, until completing probe card
Making.
In the utility model embodiment, above-mentioned probe card production process may be used, to make the first probe respectively
Card and the second probe card.
Below by specific application scenarios, to the test system of the Imbedded Flash chip in the utility model embodiment
It is illustrated.
The test resource for setting test machine includes 768 digital channels and 128 channels DPS.In the prior art, in advance
Know that the test resource that all units in an Imbedded Flash chip to be tested are completed needed for test includes：78 numbers are logical
Road and 2 channels DPS.It is thereby achieved that same survey number be 9, namely be carried out at the same time one group of test it is to be tested embedded
The number of Flash chip is 9.
It is required when the Flash modules to Imbedded Flash chip to be tested are tested in the utility model embodiment
Test resource include：6 digital channels and 1 channel DPS, it is thereby achieved that same survey number be 128, namely simultaneously
The number for the one group of Imbedded Flash chip to be tested tested is 128.
In practical applications, Flash module testings are needed, by two procedures, to need to wafer between two procedures
It is toasted, the length of testing speech per procedure is 18s.The test total duration of other modules in addition to Flash modules is 20s.
Therefore, in the prior art, it is average to an Imbedded Flash chip to be tested complete needed for test when it is a length of：(18+18+20)/
8=7s.And the scheme in the utility model embodiment is used, it is average that test institute is completed to an Imbedded Flash chip to be tested
When a length of (the 18+18)/128+20/8=2.8s needed.
It can be seen that the scheme in the utility model embodiment can effectively improve the average test of Imbedded Flash chip
Duration, therefore testing efficiency can be improved.
Although the utility model discloses as above, the utility model is not limited to this.Any those skilled in the art,
It does not depart from the spirit and scope of the utility model, can make various changes or modifications, therefore the scope of protection of the utility model
It should be subject to claim limited range.
Claims (4)
1. a kind of test system of Imbedded Flash chip, Imbedded Flash chip to be tested includes Flash modules, and feature exists
In the conductive gasket of, the Imbedded Flash chip to be tested include first group of conductive gasket and second group of conductive gasket, described the
One group of conductive gasket is to carry out testing required conductive gasket, institute to the Flash modules in the Imbedded Flash chip to be tested
It is to be surveyed to other modules in the Imbedded Flash chip to be tested in addition to Flash modules to state second group of conductive gasket
Conductive gasket needed for examination；The test system includes：Test machine, testboard, the first probe card, the second probe card and crystalline substance
Circle, wherein：The wafer is arranged on the testboard, is suitable for carrying all Imbedded Flash chips to be tested, described all
Imbedded Flash chip to be tested is divided into multigroup；
The test machine is coupled with the testboard, and coupling may be selected with first probe card and second probe card
It connects, is suitable for controlling the testboard movement, by first group of conductive gasket of the Imbedded Flash chip to be tested of selected sets and institute
State the connection of the first probe card；The Flash modules of the Imbedded Flash chip to be tested of the selected sets test until completing
Test to the Flash modules of all Imbedded Flash chips to be tested；The testboard movement is controlled, by waiting for for selected sets
Second group of conductive gasket of test Imbedded Flash chip is connect with second probe card, to the to be tested interior of the selected sets
Other modules in embedding Flash chip in addition to Flash modules are tested, until completing to all Imbedded Flashs to be tested
The test of other modules in chip in addition to Flash modules；
First probe card is suitable for connecting with first group of conductive gasket of the Imbedded Flash chip to be tested of the selected sets；
Second probe card is suitable for connecting with second group of conductive gasket of the Imbedded Flash chip to be tested of the selected sets.
2. the test system of Imbedded Flash chip as described in claim 1, which is characterized in that the Imbedded Flash to be tested
Chip includes the serial-parallel conversion circuit with the Flash module couples of itself；The test machine is suitable for being time-multiplexed the string simultaneously
At least one of conversion circuit interface sends test signal, with to the Flash to multiple interfaces of the Flash modules
Each interface of module is tested.
3. the test system of Imbedded Flash chip as described in claim 1, which is characterized in that the Imbedded Flash to be tested
The conductive gasket of chip meets following condition：The conductive gasket of the Imbedded Flash chip to be tested with it is described it is to be tested in
The distance between projection in the vertical direction of embedding Flash chip ground is more than pre-determined distance, and the Imbedded Flash core to be tested
Edge after the conductive gasket projection of piece is in straight line or on two parallel lines.
4. the test system of Imbedded Flash chip as described in claim 1, which is characterized in that further include：With the test machine
The apparatus for baking of coupling；The test machine, sequentially suitable for the Flash modules to the group chosen Imbedded Flash chip to be tested
The first test of progress, control apparatus for baking toast the wafer, carry out the second test and simultaneously obtain test result；Described
One test includes following at least one：It writes functional test, read functional test, erasing functional test and BIST functional tests；Institute
It includes following at least one to state the second test：Write functional test, read functional test, erasing functional test, BIST functional tests with
And the test whether data stored in Flash modules after baking lose.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109444713A (en) * | 2018-11-13 | 2019-03-08 | 无锡中微腾芯电子有限公司 | A kind of wafer test contact fault diagnostic method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109444713A (en) * | 2018-11-13 | 2019-03-08 | 无锡中微腾芯电子有限公司 | A kind of wafer test contact fault diagnostic method |
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