CN207116437U - A kind of silicon carbide mos pipe of high efficiency high-reliability - Google Patents

Abstract

A kind of silicon carbide mos pipe of high efficiency high-reliability, belongs to technical field of manufacturing semiconductors.Including the drift region above silicon carbide substrates and substrate, base is sequentially formed above drift region, source region and top oxide layer, it is provided through source region, base and the groove for entering drift region, silicon oxide column is arranged side by side above substrate, silicon oxide column passes through source region from source region, base and drift region extend to substrate, groove is opened in inside the silicon oxide column of workspace, in workspace contact hole is offered between adjacent silicon oxide column, contact hole passes through top oxide layer from top to bottom, source region simultaneously enters base, coating metal is connected the source region between adjacent trenches and base to form source electrode by contact hole.With the beneficial effect that conductive effectiveness is high, reliability is high.

Description

A kind of silicon carbide mos pipe of high efficiency high-reliability

Technical field

A kind of silicon carbide mos pipe of high efficiency high-reliability, belongs to technical field of manufacturing semiconductors.

Background technology

The semi-conducting material of the first generation is using silicon, germanium as representative, with the continuous development of semiconductor technology, at present with carborundum Material has been subjected to extensive use for the third generation semi-conducting material of representative.Compare using silicon, germanium to represent first generation semiconductor Material, the third generation semi-conducting material using carbofrax material as representative has forbidden band loose and high temperature resistant, high-tension advantage, so as to Greatly improve the performance and quality of semiconductor devices.

By taking common groove MOS as an example, the structure of groove MOS pipe is as shown in figure 8, including N+ types substrate 9, in N+ types If substrate 9 is sequentially arranged above N-type drift region 8, p-type base 5, offers hondo side by side in the upper surface of p-type base 5 Groove, groove enter N-type drift region 8 through p-type base 5, form N+ types source region 2 in the outer ring of groove, are set at the top of groove Top oxide layer 3, MOS structure is formed, and top is set respectively in the bottom on the top of top oxide layer 3 and N+ types substrate 9 Layer metal level 1 and bottom metal layer 10, then draw the grid, source electrode and drain electrode of metal-oxide-semiconductor.In the prior art, in metal-oxide-semiconductor N-type drift region 8 doping concentration and thickness be N-type drift region 8 and p-type base 5 according to metal-oxide-semiconductor in the case of proof voltage Between it is vague and general above and below the PN junction that is formed when the voltage that is born and design, therefore the impedance of N-type drift region 8 also determines therewith. In the prior art, for improve the PN junction in metal-oxide-semiconductor it is vague and general when the voltage that is born, the doping concentration of N-type drift region 8 often compared with It is low, therefore the impedance for also simultaneously resulting in N-type drift region 8 is higher, i.e. the conducting of electric current is less efficient.

Although metal-oxide-semiconductor made of carbofrax material distinguishes smaller, carbonization with metal-oxide-semiconductor made of silicon materials in structure Silicon materials are in being made, and its requirement to technique is more harsh, specifically：The metal-oxide-semiconductor of silicon materials is in manufacture p-type base 5 and N During+type source region 2 formed by way of ion implanting, for the metal-oxide-semiconductor of silicon materials, the process of ion implanting is more Maturation, but for carbofrax material, if making p-type base 5 and N+ types source region 2 reality by way of ion implanting It is existing, then need to use the superenergy more than 1MeV, while 600 DEG C or so or more of high temperature is needed, it is above-mentioned even in meeting Under the conditions of two, the depth of ion implanting also only has 0.5 μm to 1 μm or so, also needs to use about 1600 DEG C after completing ion implanting High annealing to repair energetic ion injection when caused by wafer damage, active ions it is electrical, and in 1600 DEG C of height Ion spreads very slow in carborundum under warm environment.From the foregoing, carbofrax material is in the fabrication process to technique Occurrence condition requirement is extremely harsh, and in the current country, only possessing in some scientific research institutions and Scientific Research in University Laboratory to expire The equipment of sufficient means suitable, and in most of enterprise, in view of the consideration of cost, only a few enterprise can put into great fund and use In the introduction of equipment, therefore it greatly limit the development of carbofrax material semiconductor devices.In view of the shortcomings of the prior art, at present It is badly in need of the technical scheme that a kind of conductive effectiveness is high, reliability is high.

The content of the invention

The technical problems to be solved in the utility model is：Overcome the deficiencies in the prior art, there is provided a kind of to be aoxidized by setting Silicon column, auxiliary exhaustion region being formed between the outer ring and drift region of silicon oxide column so that the leakage current inside metal-oxide-semiconductor greatly reduces, from And the thickness of drift region can be reduced and increase its concentration, make the impedance of drift region reduce, while reduce grid oxide layer and born Electric field pressure high efficiency high-reliability silicon carbide mos pipe.

The silicon carbide mos pipe of the utility model high efficiency high-reliability, including above silicon carbide substrates and substrate Drift region, base, source region and top oxide layer are sequentially formed above drift region, is provided through source region, base simultaneously Into the groove of drift region, polysilicon is filled in groove and forms MOS structure, it is characterised in that：In the upper of described substrate Some silicon oxide columns are arranged side by side in side, and silicon oxide column is passed down through source region, base and drift region extension from the upper surface of source region To the upper surface of substrate, described groove is opened in inside the silicon oxide column of workspace, the adjacent silica in workspace Contact hole is offered between post, contact hole through top oxide layer, source region and enters base from top to bottom, and coating metal passes through Contact hole is connected the source region between adjacent trenches and base to form source electrode.

Preferably, it is provided with top layer metallic layer above the top oxide layer.

Preferably, it is provided with bottom metal layer below the substrate.

Preferably, described substrate is N+ type substrates, and described drift region is N-type drift region, and described base is p-type base Area, described source region are N+ type source regions.

Preferably, the silicon oxide column opened up in outermost on the outside of fluted silicon oxide column forms terminator.

Preferably, described groove is less than 0.1 ~ 0.5 μm of drift region upper surface.

Preferably, described contact hole bottom is less than 0.1 ~ 0.5 μm of base upper surface.

Compared with prior art, beneficial effect possessed by the utility model is：

1st, in the silicon carbide mos pipe of this high efficiency high-reliability, because silicon oxide column is extended downward at substrate, therefore Auxiliary exhaustion region can be formed between the outer ring and drift region of silicon oxide column, therefore the leakage current inside metal-oxide-semiconductor greatly reduces.While by The exhaustion region formed between the outer ring of silicon oxide column and drift region serves the vague and general effect of aiding in, thus it is identical it is pressure-resistant will On the premise of asking, the thickness of drift region can be reduced and increase its doping concentration, therefore the impedance of drift region reduces, and improves Electrical efficiency during metal-oxide-semiconductor forward conduction.

2nd, vague and general effect is aided in because the exhaustion region formed between the outer ring of silicon oxide column and N-type drift region serves, Therefore the electric field pressure that grid oxide layer is born is greatly reduced, it is ensured that the reliability of gate oxide level long-term work.

3rd, by setting silicon oxide column, the electric capacity Cgd between grid and drain electrode can be preferably minimized, reduces switch damage Consumption, working frequency is lifted, improve power efficiency.

4th, the utility model is overcome when manufacturing silicon carbide semiconductor chip is manufactured in existing process to technological requirement extremely harshness Deficiency, N-type drift region, N+ types source region and p-type are realized using the technology for opening up silicon oxide layer groove and making extension epitaxy The making of base, the present situation that high temperature energetic ion injects and activated at can not be completed, effective shape must be used at present by overcoming Into and control base and source region doping concentration and junction depth, greatly reduce make sic semiconductor device technique is wanted Ask, make the application of silicon carbide device wider.

5th, aforementioned p-type and n type material layer are exchanged, it is identical to can reach P channel metal-oxide-semiconductor based on identical structure fabrication order Beneficial effect.

6th, the utility model is applied to the similar framework of other plough groove type elements, has widely used beneficial effect.

7th, it is equally applicable not limit to the semi-conducting material such as the material of carborundum class, silicon, gallium nitride for the utility model, especially suitable Making for silicon materials semiconductor devices, which has, improves efficiency and widely used beneficial effect.

Brief description of the drawings

Fig. 1 is the silicon carbide mos tubular construction schematic diagram of high efficiency high-reliability.

Fig. 2 ~ Fig. 7 is the silicon carbide mos pipe manufacturing flow chart of high efficiency high-reliability.

Fig. 8 is prior art metal-oxide-semiconductor structural representation.

Wherein：1st, top layer metallic layer 2, N+ types source region 3, top oxide layer 4, contact hole 5, p-type base 6, oxidation Silicon column 7, polysilicon 8, N-type drift region 9, N+ types substrate 10, bottom metal layer 11, the first oxide skin(coating) 12, the first ditch Groove 13, second groove.

Embodiment

Fig. 1 ~ 7 are most preferred embodiments of the present utility model, and 1 ~ 7 pair of the utility model is done furtherly below in conjunction with the accompanying drawings It is bright.

As shown in figure 1, a kind of silicon carbide mos pipe of high efficiency high-reliability, the device by carbofrax material semiconductor It is made, including N+ types substrate 9, the top of N+ types substrate 9 is provided with N-type drift region 8, P is provided with above N-type drift region 8 Type base 5, N+ types source region 2 is provided with the upper surface of p-type base 5.Multiple oxidations have been arranged side by side in the top of N+ types substrate 9 The silicon oxide column 6 of silicon materials, silicon oxide column 6 sequentially pass through N+ types source region 2, p-type base 5 downwards from the upper table of N+ types source region 2 And the upper surface of N+ types substrate 9 is extended downward into after N-type drift region 8.Formed and be filled with multiple silicon oxide columns 6 of inner side The groove of polysilicon 7.Also it is reserved with the outside of the outermost silicon oxide column 6 filled with polysilicon 7 and multiple is not filled by polycrystalline Silicon oxide column 6 of the silicon oxide column 6 of silicon 7 as chip terminator.

Top oxide layer 3, top oxide layer 3 and the outer ring of polysilicon 7 are additionally provided with the upper surface of N+ types source region 2 Silicon oxide layer is combined.Contact hole 4 is offered between the two neighboring silicon oxide column 6 filled with polysilicon 7, contact hole 4 is certainly The upper surface of top oxide layer 3 enters in p-type base 5 after being passed down through top oxide layer 3 and N+ types source region 2.

Top layer metallic layer 1 is additionally provided with the upper surface of top oxide layer 3, is additionally provided with the bottom of N+ types substrate 9 Bottom metal layer 10, top layer metallic layer 1, top oxide layer 3, N+ types source region 2 and p-type base 5 form this silicon carbide mos pipe MOS structure, conductor is filled with above-mentioned contact hole 4, by conductor by N+ types source region 2 and p-type corresponding to contact hole 4 Base 5 is attached and is attached simultaneously with top layer metallic layer 1, and the source of this silicon carbide mos pipe is drawn from top layer metallic layer 1 Pole, the drain electrode of this silicon carbide mos pipe is drawn from bottom metal layer 10, the grid of this silicon carbide mos pipe are drawn from polysilicon 7 Pole.

Specific work process and operation principle are as follows：

In metal-oxide-semiconductor when in use, i.e. the positive pole of external power source and drain electrode（Bottom metal layer 10）It is connected, external power source is born Pole and source electrode（Top layer metallic layer 1）It is connected, the PN junction now formed between N-type drift region 8 and p-type base 5 reversely ends, therefore Electric current flowing is not present in metal-oxide-semiconductor.After forward voltage is added between grid and source electrode, when the magnitude of voltage of forward voltage After the cut-in voltage of metal-oxide-semiconductor, conductive channel is formed in MOS structure, electric current is after conductive channel is from the inflow that drains Flowed out through source electrode.When grid voltage be less than metal-oxide-semiconductor cut-in voltage when metal-oxide-semiconductor conductive channel close except N-type drift region 8 with Formed on the outside of PN junction between p-type base 5 outside exhaustion region, because silicon oxide column 6 is extended downward at N+ types substrate 9, therefore oxygen Exhaustion region can be equally formed between the outer ring of SiClx post 6 and N-type drift region 8, therefore the leakage current inside metal-oxide-semiconductor greatly reduces.Together When the vague and general effect of aiding in served due to the exhaustion region formed between the outer ring of silicon oxide column 6 and N-type drift region 8, therefore On the premise of identical resistance to pressure request, the thickness of N-type drift region 8 can be reduced and increase its doping concentration, therefore N-type drift region 8 Impedance reduce, improve electrical efficiency during metal-oxide-semiconductor forward conduction., can be by grid and drain electrode by setting silicon oxide column 6 Between electric capacity Cgd be preferably minimized, reduce switching loss, lifted working frequency, improve power efficiency.Due to silicon oxide column 6 The exhaustion region formed between outer ring and N-type drift region 8, which serves, aids in vague and general effect, therefore greatly reduces grid oxide layer and held The electric field pressure received, it is ensured that the reliability of gate oxide level long-term work.

As shown in Fig. 2 ~ Fig. 7, the silicon carbide mos pipe of high efficiency high-reliability as shown in Figure 1, including following step is made Suddenly：

Step 1, N+ types substrate 9 is taken, then carrying out silicon oxide deposition in the upper surface of N+ types substrate 9 forms the first oxide Layer 11, the thickness of the first oxide skin(coating) 11 are set according to the doping concentration of the pressure-resistant and N-type drift region 8 needed for chip, such as Fig. 2 It is shown.

Step 2, the first oxide skin(coating) 11 is performed etching, the first oxide skin(coating) 11 is etched into the upper table of N+ types substrate 9 Face, remaining in the first oxide skin(coating) 11 of the upper surface of N+ types substrate 9 turns into above-mentioned silicon oxide column 6, two neighboring silicon oxide column 6 Between interval form first groove 12, as shown in Figure 3.

Step 3, N-type drift region 8, p-type base 5 and N+ types source are grown successively according to predetermined thickness in first groove 12 Area 2, as shown in Figure 4.

Step 4, according to the position of presetting workspace, the silicon oxide column 6 in workspace is performed etching to form second Groove 13, second groove 13 passes through N+ types source region 2 and p-type base 5, and the bottom of second groove 13 is less than the upper table of N-type drift region 8 0.1 ~ 0.5 μm of face, as shown in Figure 5.

Step 5, the second suboxide is made in second groove 13 and forms trench oxides layer, and it is more in trench fill Crystal silicon 7, then the surface of second groove 13 is performed etching, polysilicon 7 is etched into the surface of N+ types source region 2, such as Fig. 6 institutes Show.

Step 6, make third time oxide in the upper surface of N+ types source region 2 and form top oxide layer 3, top oxide Layer 3 is combined with trench oxides layer, then to top oxide layer 3 between two silicon oxide columns 6 adjacent in workspace Carry out being lithographically formed contact hole 4, contact hole 4 is passed down through after top oxide layer 3 and N+ types source region 2 positioned at p-type base 5 At 0.1 ~ 0.5 μm, as shown in Figure 7.

Step 7, top layer metallic layer 1 and bottom metal layer 10 are formed, and draws grid, source electrode and drain electrode, is made such as Fig. 1 institutes The silicon carbide mos pipe of the high efficiency high-reliability shown.

By the manufacture method described in 1 ~ step 7 of above-mentioned steps, manufacture manufacturing silicon carbide semiconductor chip in existing process is overcome When the deficiency extremely harsh to technological requirement, realize N-type using opening up oxide skin(coating) groove and making the technology of extension epitaxy The making of drift region 8, N+ types source region 2 and p-type base 5, overcome must be injected at present using high temperature energetic ion and high temperature from The present situation that son activation can not be completed, the requirement for making sic semiconductor device to technique is greatly reduced, makes its application more Extensively.

It is that example illustrates that carbofrax material described above, which is made using MOS, the utility model be also applied to silicon or other partly Conductor is the various devices of material（Including but do not limit to diode, metal-oxide-semiconductor, IGBT etc.）Making.

It is described above, only it is preferred embodiment of the present utility model, is not that other forms are made to the utility model Limitation, any person skilled in the art is changed or is modified as possibly also with the technology contents of the disclosure above equivalent The equivalent embodiment of change.But it is every without departing from the content of the technical scheme of the utility model, it is real according to technology of the present utility model Any simple modification, equivalent variations and the remodeling that confrontation above example is made, still fall within the guarantor of technical solutions of the utility model Protect scope.

Claims (7)

1. a kind of silicon carbide mos pipe of high efficiency high-reliability, including the drift region above silicon carbide substrates and substrate, are floating Move above area and sequentially form base, source region and top oxide floor（3）, it is provided through source region, base and enters drift The groove in area, fills polysilicon in groove（7）And form MOS structure, it is characterised in that：In the top of described substrate side by side Some silicon oxide columns are set（6）, silicon oxide column（6）Source region, base and drift region extension are passed down through from the upper surface of source region To the upper surface of substrate, described groove is opened in the silicon oxide column of workspace（6）Inside, the adjacent oxidation in workspace Silicon column（6）Between offer contact hole（4）, contact hole（4）Top oxide layer is passed through from top to bottom（3）, source region and enter base Area, contact hole（4）In the source region of relevant position and base are connected filled with conductor.

2. the silicon carbide mos pipe of high efficiency high-reliability according to claim 1, it is characterised in that：In the top layer oxygen Compound layer（3）Top be provided with top layer metallic layer（1）.

3. the silicon carbide mos pipe of high efficiency high-reliability according to claim 1, it is characterised in that：In the substrate Lower section is provided with bottom metal layer（10）.

4. the silicon carbide mos pipe of high efficiency high-reliability according to claim 1, it is characterised in that：Described substrate is N + type substrate（9）, described drift region is N-type drift region（8）, described base is p-type base（5）, described source region is N+ types Source region（2）.

5. the silicon carbide mos pipe of high efficiency high-reliability according to claim 1, it is characterised in that：Opened up in outermost Fluted silicon oxide column（6）The silicon oxide column in outside（6）Form terminator.

6. the silicon carbide mos pipe of high efficiency high-reliability according to claim 1, it is characterised in that：Described groove is low In 0.1 ~ 0.5 μm of drift region upper surface.

7. the silicon carbide mos pipe of high efficiency high-reliability according to claim 1, it is characterised in that：Described contact hole （4）Bottom is less than 0.1 ~ 0.5 μm of base upper surface.