CN207008599U - A kind of server master board test board - Google Patents
A kind of server master board test board Download PDFInfo
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- CN207008599U CN207008599U CN201720998233.4U CN201720998233U CN207008599U CN 207008599 U CN207008599 U CN 207008599U CN 201720998233 U CN201720998233 U CN 201720998233U CN 207008599 U CN207008599 U CN 207008599U
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- Prior art keywords
- test board
- board
- server master
- test
- mainboard
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- 238000012360 testing method Methods 0.000 title claims abstract description 49
- 238000010200 validation analysis Methods 0.000 claims abstract description 6
- 238000000034 method Methods 0.000 abstract description 6
- 238000012795 verification Methods 0.000 abstract description 6
- 238000012827 research and development Methods 0.000 abstract description 2
- 230000006870 function Effects 0.000 description 6
- 238000011161 development Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 238000001816 cooling Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000009131 signaling function Effects 0.000 description 1
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Abstract
The utility model discloses a kind of server master board test board, including test board body, and power connector, the first clock generator, second clock generator and the external IO for carrying out validation test to main board function are provided with test board body.On the one hand this test board provides the start essential condition such as power supply of clock for mainboard, on the other hand external IO is provided for mainboard, validation test can be carried out to the function of mainboard, in the case where not needing complete machine functional verification and positioning problems can be carried out to server master board, save research and development time and human cost, accelerate launch process, be advantageous to the lifting of product competitiveness.
Description
Technical field
It the utility model is related to server test device, and in particular to a kind of test that can be tested server master board
Plate.
Background technology
With the fast development of server field, development time and cost requirement to product also more and more higher.It is general right
For server, in debugging process is researched and developed, if necessary to carry out functional verification and positioning problems, it is necessary to mainboard, backboard, IO
Plate, power panel etc. are assembled into complete machine and could carried out.Development carries out every test in complete machine and functional verification process is cumbersome,
Not only increase time cost, extend time to market (TTM), while also improve the workload and human cost of research staff.
The content of the invention
To solve the above problems, the utility model offer is a kind of to facilitate the test board tested server master board.
The technical solution of the utility model is：A kind of server master board test board, including test board body, test board body
On be provided with power connector, the first clock generator, second clock generator and for main board function carry out validation test
External IO.
Further, external IO includes com interface, USB interface, PICE slots, display screen interface and video interface.
Further, USB interface is provided with two.
Further, PCIE slots include X16 PCIE slots and X8 PCIE slots.
Further, power switch button and SR are additionally provided with test board body.
Further, UID buttons are additionally provided with test board body.
Further, it is additionally provided with status lamp on test board body.
Further, it is additionally provided with fan connector on test board body.
Further, fan connector is provided with four.
On the one hand server master board test board provided by the utility model, test board provide power supply of clock etc. for mainboard and opened
Machine essential condition, external IO on the other hand is provided for mainboard, validation test can be carried out to the function of mainboard, not need complete machine
In the case of can carry out functional verification and positioning problems to server master board, save research and development time and human cost, accelerate production
Product list process, are advantageous to the lifting of product competitiveness.
Brief description of the drawings
Fig. 1 is the utility model specific embodiment theory structure schematic diagram.
In figure, 1- mainboards, 2- test board bodies, 3- fan connectors, 4- display screen interfaces, 5- video interfaces, 6-COM connects
Mouthful, 7-USB interfaces, 8- status lamps, 9-UID buttons, 10- power switch buttons, 11- SRs, 12- power connectors, 13-
PCIE slots, the clock generators of 14- first, 15- second clock generators.
Embodiment
Below in conjunction with the accompanying drawings and the utility model is elaborated by specific embodiment, and following examples are to this
The explanation of utility model, and the utility model is not limited to implementation below.
As shown in figure 1, the server master board test board that the present embodiment provides, including test board body 2, test board body 2
Upper setting power connector 12, power connector 12 can use PSU connectors, and power supply is provided for mainboard 1.Corresponding test board sheet
Power switch button 10 and SR 11 are also set up on body 2.
The present embodiment is provided with BMC chip, PCH to be illustrated applied to the road server of purley platforms 8 on mainboard 1
Chip and clock switching chip.
The first clock generator 14, second clock generator 15 are also set up on test board body 2 and for the function of mainboard 1
Carry out the external IO of validation test.
Wherein the first clock generator 14, second clock generator 15 are connected with the clock switching chip on mainboard 1 respectively,
Two groups of clocks are provided to its clock switching chip for mainboard 1, can both realize that mainboard 1 was started shooting required clock, while can also
The performance and orientation problem of the clock switching chip of fast verification mainboard 1.
External IO on test board body 2 includes com interface 6, USB interface 7, PICE slots, display screen interface 4 and video
Interface 5.
Wherein com interface 6（Cluster communication port, serial communication interface）Can when in use with mainboard
1 BMC chip connection, the print system information in start process, makes tester grasp the start process of mainboard 1 in detail, such as
There is machine situation of delaying in fruit, can be known by Serial Port Information mainboard 1 be stuck in where, then analyzed and determined for problem
Position.
USB interface 7 can be connected with the PCH chips of mainboard 1 when in use, two USB interfaces 7 can be set, for verifying master
The usb signal function of plate 1.
PCIE slots 13 can verify the function of mainboard 1PCIE ports, specifically settable X16 PCIE slots 13 and X8
13 two kinds of PCIE slots 13 of PCIE slots, so as to the function of comprehensive verification mainboard 1PCIE slots 13.
Display screen interface 4 can use OLED display screen interface 4, in use, it can be connected by the BMC chip of I2C and mainboard 1
Connect, for obtaining extraneous required information.
Video interface 5 simultaneously（USB interface, Video Graphics Array）Also the BMC of mainboard 1 is connected to when in use
Chip, for realizing display function.
Preferably, also settable UID buttons 9 on test board body 2, for identifying mainboard 1.Also settable status lamp 8.
In the present embodiment, four fan connectors 3 also can be set on test board body 2, can be that mainboard 1 is done at cooling
Reason.
Described above is only preferred embodiment of the present utility model, it should be pointed out that：For the common skill of the art
For art personnel, on the premise of the utility model principle is not departed from, some improvements and modifications can also be made, these improve and
Retouching also should be regarded as the scope of protection of the utility model.
Claims (9)
1. a kind of server master board test board, it is characterised in that including test board body, power supply company is provided with test board body
Meet device, the first clock generator, second clock generator and the external IO for carrying out validation test to main board function.
2. server master board test board according to claim 1, it is characterised in that external IO includes com interface, USB connects
Mouth, PICE slots, display screen interface and video interface.
3. server master board test board according to claim 2, it is characterised in that USB interface is provided with two.
4. server master board test board according to claim 2, it is characterised in that PCIE slots include X16 PCIE slots
With X8 PCIE slots.
5. according to the server master board test board described in claim any one of 1-4, it is characterised in that also set on test board body
It is equipped with power switch button and SR.
6. according to the server master board test board described in claim any one of 1-4, it is characterised in that also set on test board body
It is equipped with UID buttons.
7. according to the server master board test board described in claim any one of 1-4, it is characterised in that also set on test board body
It is equipped with status lamp.
8. according to the server master board test board described in claim any one of 1-4, it is characterised in that also set on test board body
It is equipped with fan connector.
9. server master board test board according to claim 8, it is characterised in that fan connector is provided with four.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720998233.4U CN207008599U (en) | 2017-08-10 | 2017-08-10 | A kind of server master board test board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720998233.4U CN207008599U (en) | 2017-08-10 | 2017-08-10 | A kind of server master board test board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207008599U true CN207008599U (en) | 2018-02-13 |
Family
ID=61459265
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720998233.4U Expired - Fee Related CN207008599U (en) | 2017-08-10 | 2017-08-10 | A kind of server master board test board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207008599U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108919696A (en) * | 2018-05-29 | 2018-11-30 | 郑州云海信息技术有限公司 | A kind of method of achievable UID-LED multiposition control |
| CN112986789A (en) * | 2019-12-13 | 2021-06-18 | 神讯电脑(昆山)有限公司 | Circuit board function test system and method thereof |
-
2017
- 2017-08-10 CN CN201720998233.4U patent/CN207008599U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108919696A (en) * | 2018-05-29 | 2018-11-30 | 郑州云海信息技术有限公司 | A kind of method of achievable UID-LED multiposition control |
| CN108919696B (en) * | 2018-05-29 | 2020-03-20 | 郑州云海信息技术有限公司 | Method capable of realizing UID-LED multi-state control |
| CN112986789A (en) * | 2019-12-13 | 2021-06-18 | 神讯电脑(昆山)有限公司 | Circuit board function test system and method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20180213 Termination date: 20180810 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |