CN204305035U - A kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment - Google Patents
A kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment Download PDFInfo
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- CN204305035U CN204305035U CN201420866893.3U CN201420866893U CN204305035U CN 204305035 U CN204305035 U CN 204305035U CN 201420866893 U CN201420866893 U CN 201420866893U CN 204305035 U CN204305035 U CN 204305035U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
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Abstract
The utility model belongs to short wave communication Facility Control Terminal technical field, particularly a kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment.This multifunctional digital bus marco terminal comprises: FPGA, arm processor, CPLD, display screen, and described FPGA is provided with RS485 interface, and FPGA is by the RS485 bus of RS485 interface electrical connection short wave communication equipment; Described FPGA is electrically connected arm processor and CPLD respectively by data bus, and described CPLD is electrically connected display screen.The utility model can simplify the manipulation means of short wave communication equipment, optimal inspection environment, improves the debugging of equipment under test and the efficiency of main performance index test.Staff can observe the information content sending data and receive data directly, accurately by display screen, grasp the duty of equipment under test in real time, complete the manipulation to equipment under test.
Description
Technical field
The utility model belongs to short wave communication Facility Control Terminal technical field, particularly a kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment.
Background technology
Along with microcomputer and the increasingly extensive and deep application of microcomputer network technology, make the communication technology constantly ripe and perfect, with the change of the communication technology, interface bus technology has had and has developed rapidly, and become and directly affect communication system functionality, therefore, people it is also proposed higher requirement for the agility of information transmission, reliability and transmission range.At present, control the state of short wave communication equipment, inquire about, debug, main performance index test is all comparatively complicated, the workload of tester is larger.
Utility model content
The purpose of this utility model is to propose a kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment.
For realizing above-mentioned technical purpose, the utility model adopts following technical scheme to be achieved.
The multifunctional digital bus marco terminal being applicable to short wave communication equipment comprises: FPGA, arm processor, CPLD, a display screen, and described FPGA is provided with RS485 interface, and FPGA is by the RS485 bus of RS485 interface electrical connection short wave communication equipment; Described FPGA is electrically connected arm processor and CPLD respectively by data bus, and described CPLD is electrically connected display screen.
Feature of the present utility model and further improvement are:
Described data bus is isa bus or I2C bus.
The described multifunctional digital bus marco terminal being applicable to short wave communication equipment also comprises keyboard, and described CPLD is electrically connected keyboard.
The described multifunctional digital bus marco terminal being applicable to short wave communication equipment also comprises power module, and described power module is respectively used to provide direct supply to FPGA, arm processor, CPLD.
The model of described FPGA is LFXP6C, and the model of described arm processor is Intel PXA255 processor, and the model of described CPLD is XC3S1000.
Described FPGA is for completing the data interaction between short wave communication equipment and arm processor, described arm processor is used for carrying out protocol analysis to the data from FPGA, and the data after protocol analysis are sent to CPLD, described CPLD is for controlling display screen display by the data after protocol analysis.Described CPLD is used for realizing keyboard detection, display screen interface controls.
The beneficial effects of the utility model are: the utility model can simplify the manipulation means of short wave communication equipment, optimal inspection environment, improve stability and the reliability of data transmission, and substantially increase the debugging of equipment under test and the efficiency of main performance index test.Because this terminal has one piece of display screen, staff can observe the information content sending data and receive data directly, accurately by it, grasp the duty of equipment under test in real time, complete the manipulation to equipment under test.The utility model also reduces short wave communication equipment in the man-hour of developing and in test process, also reduces the cost that short wave communication establishes research and production.Shorten the research and production cycle.
Accompanying drawing explanation
Fig. 1 is a kind of structural representation being applicable to the multifunctional digital bus marco terminal of short wave communication equipment of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in further detail:
With reference to Fig. 1, it is a kind of structural representation being applicable to the multifunctional digital bus marco terminal of short wave communication equipment of the present utility model.In the utility model, multifunctional digital bus marco terminal adopts synchronous 485 buses as communication mode, primarily of compositions such as panel unit, main control unit and cabinets.Panel unit is independent power source management and button/display two parts again; The general controls platform that it is processor with Intel PXA255 that master control adopts.
Panel unit, as independent one integral piece, is made up of colour liquid crystal display device, power switch, PTT key and 21 buttons (being referred to as keyboard) etc.Panel unit mainly completes keyboard interface, display, driving, power supply and PTT and controls; Complete counter plate simultaneously and carry out unified management, and carry out message exchange with main control unit.The display screen of panel unit adopts jumbo colour liquid crystal display device, the various information such as the duty of selected channel number, channel frequency, working method and short wave communication module can be shown, the various control operation of short wave communication module can be carried out according to Chinese prompt simultaneously.Power switch is used for controlling the on/off of multifunctional digital bus marco terminal.PTT key be used for control controlled device receipts/send out conversion.
In the utility model embodiment, main control unit is the central control unit of equipment, mainly complete to the management of the panel of multifunctional digital bus marco terminal and various control, comprise control enclosure by synchronous serial interface external communicate, control, monitoring etc.Main control unit comprises FPGA, arm processor, CPLD, FLASH memory, sdram memory.FPGA is provided with RS485 interface, FPGA is by the RS485 bus of RS485 interface electrical connection short wave communication equipment, FPGA can to short wave communication equipment sending data thus, also the data from short wave communication equipment can be received, FPGA is electrically connected arm processor and CPLD respectively by data bus, and described CPLD is electrically connected display screen.The model of CPLD is that XC3S1000, CPLD are used for realizing keyboard detection, display screen interface controls.Display screen is LCDs (LCD).Above-mentioned data bus is isa bus or I2C bus, the model of FPGA is LFXP6C, for completing the data interaction between short wave communication equipment and arm processor, FPGA major function is the data conversion between RS485 bus and the utility model internal bus interface, completes the functions such as the transport layer ACK mechanism between RS485 bus application-specific integrated circuit D data receiver packing process, subpackage transmission and bus port.Specifically, after FPGA receives the data from short wave communication equipment, carry out packing to it and process and obtain corresponding reception FIFO, afterwards according to reception FIFO (First Input First Output), the data after packing process are sent in arm processor.When after the data that FPGA receives from arm processor, obtain corresponding transmission FIFO, FPGA, according to transmission FIFO, carries out subpackage process to the data from arm processor and is sent to RS485 bus.
In the utility model embodiment, arm processor is used for carrying out protocol analysis to the data from FPGA, and the data after protocol analysis are sent to CPLD, and described CPLD is for controlling display screen display by the data after protocol analysis.Specifically, the model of arm processor is Intel PXA255 processor, and its major function has been the process of multibus Data Analysis, display and control, data store.In the utility model embodiment, also be provided with FLASH memory and sdram memory, FLASH memory is for storing the routine data used needed for arm processor, sdram memory is mainly used in providing data buffer storage to arm processor, the model of FLASH memory is S29GI512N, sdram memory is 32M cache chip or 64M cache chip, and such as, the model of sdram memory is IS42SI160160B.Main control part of the present utility model adopts ARM XScale embedded system, uses Intel PXA255 processor, adopts FLASH memory (NOR FLASH disk) storage program and core data.
Main control platform of the present utility model builds based on ARM XScale, and this main control platform has the hardware interfaces such as RS485 synchronous data bus serial ports, display screen, can reduce as required or increase, and this platform uses FPGA to increase the flexibility ratio of system.Be convenient to increase new interface.Arm processor dominant frequency can be changed to reduce power consumption, can reduce arm processor dominant frequency in low-power dissipation system.
In the utility model embodiment, main control platform also comprises power module, and described power module is respectively used to provide direct supply to FPGA, arm processor, CPLD.Power module comprises the modules such as the first power management chip, second source managing chip, sram memory and real-time clock, the model of the first power management chip is BQ2201, the model of sram memory is M68A031, the model of real-time clock is PCF85631, and the model of second source managing chip is TPS65022.First power management chip is electrically connected sram memory and real-time clock respectively, and sram memory and real-time clock are connected the BUS bus in main control platform respectively, and second source managing chip for receiving outside power supply, and is electrically connected the BUS bus in main control platform.In the utility model embodiment, the level of each digital interface in main control platform is 3.3VCMOS level, and the scope of the amplitude of the simulating signal that main control platform receives is 0 to 6V.
In the utility model embodiment, short wave communication equipment is that shortwave power amplifier or shortwave sky are adjusted, the front-end interface that main control platform can complete shortwave power amplifier under CNI framework or shortwave sky are adjusted controls, BIT status poll (comprises function BIT, module BIT and state BIT), query facility identity information is (as title, model, numbering, software version number, manufacturer etc.), the duty that shortwave power amplifier or shortwave sky are adjusted can be monitored in real time, by display screen, product information and state are fed back to operating personnel, operating personnel are enable accurately to grasp product working status, be convenient to the test of shortwave power amplifier and shortwave sky tune, safeguard and inspection.
In the utility model embodiment, main control unit is packaged in cabinet, the design of cabinet follows that volume is little, lightweight, structural member is few, easy to use and easy-disassembling-assembling principle of design, its physical dimension is 210.5 (length) × 120 (height) × 28 (wide), and weight of the present utility model is about 1.0kg.The body structure of cabinet mainly adopts duralumin machine add-on type, ensure that the precision of casing and firm intermodule joint bolt hole adopt steel wire gong cover to reinforce, and decreases because repeatedly turn stroke button impact brought; Connector selects resistant material, casing surface lacquer adopts three anti-paints, meets mould, salt-fog test requirement.For making the utility model meet electromagnetic Compatibility Design, in the printed board in cabinet, disturb large module to adopt mask frame to carry out shadow shield, each device adopts hermetically-sealed construction, and structural member junction adds conductive rubber strip, ensure that Electro Magnetic Compatibility.Cabinet of the present utility model comprises panel, light guide plate, pressing plate, back cover and support etc.
The following describes workflow of the present utility model.
Complete initial work, initialization content comprises the initialization of terminal hardware, liquid crystal display, versabus controller.Sending function monitoring and receiving function monitoring are carried out simultaneously to the multifunctional digital bus marco terminal being applicable to short wave communication equipment of the present utility model.When carrying out sending function monitoring, pressing sending function monitoring switch, when detecting that corresponding switch key has action executing, completing corresponding feature operation, and Graphics Processing is carried out in this action, being shown by liquid crystal display; Meanwhile, the data message of the representative of this action is sent to tested product by versabus controller.When carrying out receiving function monitoring, in real time RS485 accepting state of making the county prosperous is monitored, when detecting that status data information inputs, information is sent to arm processor, complete the protocol analysis to data message, data message after protocol analysis completes, after Graphics Processing, in liquid crystal screen display, can be checked for staff.
The utility model has long transmission distance, and reliability is high, and antijamming capability is strong, can be with the advantages such as multi-load; Secondly, RS485 interface network structure is simple, and wiring cost is low, has the higher ratio of performance to price.Can the external short wave communication equipment of more than two be controlled, inquire about and be managed simultaneously, owing to adopting the display of LED colour, this terminal directly can show transmission instruction and back information, less demanding to the level professional technology of operating personnel, has feature that is easy to operate, that easily understand.
Obviously, those skilled in the art can carry out various change and modification to the utility model and not depart from spirit and scope of the present utility model.Like this, if these amendments of the present utility model and modification belong within the scope of the utility model claim and equivalent technologies thereof, then the utility model is also intended to comprise these change and modification.
Claims (5)
1. one kind is applicable to the multifunctional digital bus marco terminal of short wave communication equipment, it is characterized in that, comprise: FPGA, arm processor, CPLD, display screen, described FPGA is provided with RS485 interface, and FPGA is by the RS485 bus of RS485 interface electrical connection short wave communication equipment; Described FPGA is electrically connected arm processor and CPLD respectively by data bus, and described CPLD is electrically connected display screen.
2. a kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment as claimed in claim 1, it is characterized in that, described data bus is isa bus or I2C bus.
3. a kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment as claimed in claim 1, is characterized in that, also comprise keyboard, and described CPLD is electrically connected keyboard.
4. a kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment as claimed in claim 1, it is characterized in that, also comprise power module, described power module is respectively used to provide direct supply to FPGA, arm processor, CPLD.
5. a kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment as claimed in claim 1, it is characterized in that, the model of described FPGA is LFXP6C, and the model of described arm processor is Intel PXA255 processor, and the model of described CPLD is XC3S1000.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420866893.3U CN204305035U (en) | 2014-12-31 | 2014-12-31 | A kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201420866893.3U CN204305035U (en) | 2014-12-31 | 2014-12-31 | A kind of multifunctional digital bus marco terminal being applicable to short wave communication equipment |
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| CN204305035U true CN204305035U (en) | 2015-04-29 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105356955A (en) * | 2015-12-01 | 2016-02-24 | 陕西烽火实业有限公司 | Business simulation device applicable to network performance test and method |
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2014
- 2014-12-31 CN CN201420866893.3U patent/CN204305035U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105356955A (en) * | 2015-12-01 | 2016-02-24 | 陕西烽火实业有限公司 | Business simulation device applicable to network performance test and method |
| CN105356955B (en) * | 2015-12-01 | 2018-05-04 | 陕西烽火实业有限公司 | Suitable for the service analogue apparatus and method of short-wave radio set applied in network performance test |
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